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(parent: e711c6f) | patch
According to "Intel 64 and IA-32 Architectures Software Developer's Manual
authorAlexander Motin <mav@FreeBSD.org>
Sun, 30 Nov 2008 00:10:55 +0000 (00:10 +0000)
committerAlexander Motin <mav@FreeBSD.org>
Sun, 30 Nov 2008 00:10:55 +0000 (00:10 +0000)
commit9ee5eabc3fd924deb11debfa0fbf68ded7afba48
treeed347a6d1f2d7be24a5bb3568b178f299bba36b6tree | snapshot
parente711c6f0d1a2d607a37a5532355b89254240d85ecommit | diff
According to "Intel 64 and IA-32 Architectures Software Developer's Manual
Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model
above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant
TSC.
sys/amd64/amd64/identcpu.c diff | blob | history
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