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(parent: 45e57c6) | patch
For cheetah-class CPUs ensure that the dt512_0 is set to hold 8k pages
authormarius <marius@FreeBSD.org>
Mon, 8 Sep 2008 21:24:25 +0000 (21:24 +0000)
committermarius <marius@FreeBSD.org>
Mon, 8 Sep 2008 21:24:25 +0000 (21:24 +0000)
commitb484b97e7766f8d643ff205558ce5176240c6765
tree8de24e7dfb4d5986202a232027c3d33dc8601617tree | snapshot
parent45e57c6bd280ab3f6744865db7ee4888c8b2e08bcommit | diff
For cheetah-class CPUs ensure that the dt512_0 is set to hold 8k pages
for all three contexts and configure the dt512_1 to hold 4MB pages for
them (e.g. for direct mappings).
This might allow for additional optimization by using the faulting
page sizes provided by AA_DMMU_TAG_ACCESS_EXT for bypassing the page
size walker for the dt512 in the superpage support code.

Submitted by: nwhitehorn (initial patch)
sys/sparc64/include/asi.h diff | blob | history
sys/sparc64/include/tlb.h diff | blob | history
sys/sparc64/sparc64/cheetah.c diff | blob | history
sys/sparc64/sparc64/genassym.c diff | blob | history
sys/sparc64/sparc64/pmap.c diff | blob | history
sys/sparc64/sparc64/swtch.S diff | blob | history
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