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(parent: 67feec5) | patch
Fix the offset for the CPU0 MPIC registers.
authorLuiz Otavio O Souza <loos@FreeBSD.org>
Wed, 17 May 2017 22:05:07 +0000 (22:05 +0000)
committerLuiz Otavio O Souza <loos@FreeBSD.org>
Wed, 17 May 2017 22:05:07 +0000 (22:05 +0000)
commitc1212a7a74d33a6e844bc869bcb7e42cbb7c1a91
tree261782247b42b33c03791a04a3db3bfa5401c8bdtree | snapshot
parent67feec504576aacb04baaab0db77c475500c399ecommit | diff
Fix the offset for the CPU0 MPIC registers.

Please note that only a subset of CPU0 registers are exported.  CPU1
registers are not touched.

Obtained from: ARMADA38X Functional Specifications
Sponsored by: Rubicon Communications, LLC (Netgate)
sys/boot/fdt/dts/arm/armada-38x.dtsi diff | blob | history
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