MFC r204363,204365-204367,204539-204540:

MFC r204363,204365-204367,204539-204540:
r204363:
  Optimize inserting LE for TX checksum computation. Controller does
  not require checksum LE configuration if checksum start and write
  position is the same as before. So keep track last checksum start
  and write position and insert new LE whenever the position is
  changed. This reduces number of LEs used in TX path as well as
  slightly enhance TX performance.

r204365:
  Don't hardcod register offset to set PCIe max read request size.
  The register offset is not valid on 88E8072 controller. Also don't
  blindly increase max read request size to 4096, instead, use 2048
  which seems to be more sane value and only change the value if the
  hardware default size(512) was used on that register.
  For PCIX controllers, use system defined constant rather than using
  magic value.
  While I'm here stop showing negotiated link width.

r204366:
  Allocate single MSI message. msk(4) used to allocate 2 MSI messages
  for controllers like 88E8053 which reports two MSI messages.
  Because we don't get anything useful things with 2 MSI messages,
  allocating 1 MSI message would be more sane approach.
  While I'm here, enable MSI for dual-port controllers too. Because
  status block is shared for dual-port controllers, I don't think
  msk(4) will encounter problem for using MSI on dual-port
  controllers.

r204367:
  Remove trailing white spaces.

r204539:
  Properly sync status LEs after processing.

r204540:
  Make sure to enable flow-control only if established link is
  full-duplex. Previously msk(4) used to allow flow-control on
  1000baseT half-duplex media. Also GMAC pause is enabled if link
  partner is capable of handling it.
  While I'm here use IFM_OPTIONS instead of using IFM_GMASK to check
  optional flags of link.