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(parent: 3a8e849) | patch
Since all generations of Intel CPUs have errata which causes hang on
authorkib <kib@FreeBSD.org>
Fri, 27 Feb 2015 11:13:46 +0000 (11:13 +0000)
committerkib <kib@FreeBSD.org>
Fri, 27 Feb 2015 11:13:46 +0000 (11:13 +0000)
commitf38c6a3d8ecd504a59893d9f64329ede64944816
tree1a2b22b35011a8540cd3acd4fa0d5ae1ac28ea3dtree | snapshot
parent3a8e849c57a1c62fc3547e372b7eb756c12c27e9commit | diff
Since all generations of Intel CPUs have errata which causes hang on
the cache line flush in the LAPIC page, keep direct map page covering
LAPIC mapped uncached.

To have the (incomplete) check for the LAPIC range in
pmap_invalidate_cache_range() working, lapic_paddr must be initialized
in x2APIC mode too.

Sponsored by: The FreeBSD Foundation
MFC after: 2 months
sys/x86/x86/local_apic.c diff | blob | history
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