ian [Wed, 31 Dec 2014 16:15:43 +0000 (16:15 +0000)]
A couple small fixes to make clang 3.5 happy... Move END(sigcode) to the
end of the actual instruction sequence for the function but before some
misc data in the text segment. This eliminates a strange "size must be
constant" error from the integrated assembler. Also, the build_pagetables
function was missing an END(), but really the problem is that it shouldn't
have an ASENTRY() because it's not a function that needs to be a global
symbol with unwind info and all, it's just a little private subroutine
used in very early kernel init.
marius [Wed, 31 Dec 2014 16:06:26 +0000 (16:06 +0000)]
- Switching the mode of Ricoh R5CE823 to SD2.0 causes their PCI device ID
to change to 0xe822, which may be persistent across reboots and, thus,
confuse other OSes. Therefore, restore the original mode and frequency
setting on detach and shutdown.
- Report Ricoh R5CE822 as such.
- According to Linux, Ricoh R5CE822 also need SDHCI_QUIRK_LOWER_FREQUENCY.
- Nuke an unused softc member.
smh [Wed, 31 Dec 2014 04:54:48 +0000 (04:54 +0000)]
Correct zpool list displaying invalid EXPANDSZ for unavailable pool vdevs
When pools are unavailable their vdevs are also unavailable which means
that vdev_max_asize remains at the default zero. This default was being
used to calculate vs_esize resulting in a negative number as vdev_asize >
vdev_max_asize, which caused zpool list -v to display 16.0E for EXPANDSZ
of these vdevs.
smh [Wed, 31 Dec 2014 04:11:29 +0000 (04:11 +0000)]
Use the correct state name for unavailable pools in zpool list
This corrects inconsitencies between zpool list and zpool status which are
both described as displaying the pool <state> however zpool list would use
this hardcoded FAULTED instead of the correct UNAVAIL.
ian [Wed, 31 Dec 2014 02:38:23 +0000 (02:38 +0000)]
Change the order of operations for the initial cache setup. Turning off
the cache before clean/invalidate ensured that no new lines can come into
the cache or migrate between levels during the operation, but may not be
safe on some chips. Instead, if the cache was enabled on entry, do the
wbinv while it's still enabled, and then disable it and do a separate
invalidate pass. After the intitial writeback we know there are no
dirty lines left and no new dirty lines can be created as long as we
carefully avoid touching memory before turning the cache off. Add a
comment about that so no new code gets inserted between those points.
alc [Wed, 31 Dec 2014 00:54:38 +0000 (00:54 +0000)]
The physical memory allocator supports the use of distinct free lists for
managing pages from different address ranges. Generally speaking, this
feature is used to increase the likelihood that physical pages are
available that can meet special DMA requirements or can be accessed through
a limited-coverage direct mapping (e.g., MIPS). However, prior to this
change, the configuration of the free lists was static, i.e., it was
determined at compile time. Consequentally, free lists could be created
for address ranges that held no actual pages, for example, on 32-bit MIPS-
based systems with 512 MB or less of physical memory. This change makes
the creation of the free lists dynamic, i.e., it is based on the available
physical memory at boot time.
On 64-bit x86-based systems with 64 GB or more of physical memory, create
free lists for managing pages with physical addresses below 4 GB. This
change is to address reported problems with initializing devices that
require the allocation of physical pages below 4 GB on some systems with
128 GB or more of physical memory.
neel [Tue, 30 Dec 2014 23:38:31 +0000 (23:38 +0000)]
Initialize all fields of 'struct vm_exception exception' before passing it to
vm_inject_exception(). This fixes the issue that 'exception.cpuid' is
uninitialized when calling 'vm_inject_exception()'.
However, in practice this change is a no-op because vm_inject_exception()
does not use 'exception.cpuid' for anything.
Reported by: Coverity Scan
CID: 1261297
MFC after: 3 days
neel [Tue, 30 Dec 2014 22:19:34 +0000 (22:19 +0000)]
Replace bhyve's minimal RTC emulation with a fully featured one in vmm.ko.
The new RTC emulation supports all interrupt modes: periodic, update ended
and alarm. It is also capable of maintaining the date/time and NVRAM contents
across virtual machine reset. Also, the date/time fields can now be modified
by the guest.
Since bhyve now emulates both the PIT and the RTC there is no need for
"Legacy Replacement Routing" in the HPET so get rid of it.
The RTC device state can be inspected via bhyvectl as follows:
bhyvectl --vm=vm --get-rtc-time
bhyvectl --vm=vm --set-rtc-time=<unix_time_secs>
bhyvectl --vm=vm --rtc-nvram-offset=<offset> --get-rtc-nvram
bhyvectl --vm=vm --rtc-nvram-offset=<offset> --set-rtc-nvram=<value>
emaste [Tue, 30 Dec 2014 22:04:24 +0000 (22:04 +0000)]
Check for multiplication integer overflow in CHECK_EHDR
The initial fix in r276374 is valid only for 64-bit objects. Revert it
and return an error in CHECK_EHDR if the multiplication would overflow.
The original buffer overflow issue was found with the security/afl
fuzzer and has upstream elftoolchain ticket 462. The 32-bit object issue
with r276374 found by antoine@ during an i386 exp-run.
wblock [Tue, 30 Dec 2014 20:20:18 +0000 (20:20 +0000)]
Move the explanation for examples before the example itself. Add
numerous QEMU examples and explanations supplied by sbruno, with thanks
to Ingo Schwarze for help with the mdoc markup. Code, text, testing,
proofreading, cinematography, stunts, and the haunting theme song
supplied by sbruno.
nwhitehorn [Tue, 30 Dec 2014 16:55:53 +0000 (16:55 +0000)]
Fix loader's ability to read the 10.1 release PowerPC ISOs. There appears to
be some kind of problem with the version of makefs used for these disks.
There may be a better way to handle this problem, so I've set the MFC
timer for a fairly long time period.
hselasky [Tue, 30 Dec 2014 09:20:29 +0000 (09:20 +0000)]
Allow systems having a page size greater than 4K to use fewer
scatter-gather XHCI TRB entries for its payload data. The XHCI
controller can handle at least 65536 bytes per scatter-gather list
entry.
hselasky [Tue, 30 Dec 2014 08:33:51 +0000 (08:33 +0000)]
Add missed flushing of data which can happen when "xhci_configure_mask()"
is called from "xhci_configure_reset_endpoint()". Ensure the 3-strikes
error feature is always enabled except for ISOCHRONOUS transfers.
emaste [Tue, 30 Dec 2014 03:25:42 +0000 (03:25 +0000)]
Update elftoolchain to upstream rev 3136
This fixes two strip(1) issues found during ports exp-run and adds a
string hash implementation which significantly speeds up certain
operations on objects with large numbers of symbols.
This also improves libdwarf handling for stripped objects with
.eh_frame or .debug_frame (but not other debug) sections.
ian [Tue, 30 Dec 2014 03:19:46 +0000 (03:19 +0000)]
Add a new locore.S that #includes the right (v4 or v6) implementation.
The kernel build machinery really wants the entry point to be in a file
named locore.S so doing this avoids a bunch of changes to the build system
for relatively little benefit.
ian [Tue, 30 Dec 2014 03:17:53 +0000 (03:17 +0000)]
Rename locore.S to locore-v4.S and add a new locore-v6.S for starting up
armv6/7 systems. We need to use some new armv6/7 features at startup
and splitting the implemenations to separate files will be more maintainable
than adding even more #ifdef sections to locore.S.
Because of the standardized interfaces to cache and MMU operations in armv7,
we can tolerate the kernel being entered with caches enabled. This allows
running u-boot and loader(8) with caches enabled, and the performance
improvement can be dramatic (boot times can be cut from over a minute
to under 30 seconds). The new implementation also has more robust cache
and mmu sequences for launching AP cores, and it paves the way for
upcoming changes to the pmap code which will use the TEX remap feature.
Changes in mp_machdep.c work with the new behavior in locore-v6 mp_entry,
and also reuse the original boot-time page tables to get transitioned
from physical to virtual addressing before installing the normal tables.
Submitted by Svatopluk Kraus and Michal Meloun with some changes by me.
ian [Tue, 30 Dec 2014 02:56:31 +0000 (02:56 +0000)]
Add armv6 implementations of these cache operations to avoid duplicating
the #ifdef stuff at multiple points the functions are called from. Also
rework the armv7 implementations so that the invalidate operations work
from outermost to innermost cache level, and the writeback works from
inner to outer levels.
ian [Tue, 30 Dec 2014 02:51:04 +0000 (02:51 +0000)]
Add arm option ARM_NEW_PMAP, to allow us to begin adding the new pmap
code alongside the existing implementation and quickly toggle between
the two implementations when testing. Once the new code is past its
teething stage we can remove this option.
imp [Tue, 30 Dec 2014 02:39:44 +0000 (02:39 +0000)]
The sn driver doesn't actually include microcode at the current time,
although it may in the future. Or not since the ositech cards that
might need it have become perhaps too rare to support.
marius [Mon, 29 Dec 2014 20:33:34 +0000 (20:33 +0000)]
- No longer exclude malo(4) and mwl(4), they have been fixed in r275870
and r275871 respectively to build with PAE enabled.
- For the PAE kernel configuration file, no longer exclude devices that
are known to be 64-bit DMA clean from amd64.
emaste [Mon, 29 Dec 2014 19:38:12 +0000 (19:38 +0000)]
Rename DT_FEATURE_1 to DT_FEATURE
Track r270303:
This provides a minor cleanup in elfdump; there are otherwise no
consumers in the tree. Old SUN documentation can be found for either
variant, but GNU binutils switched to DT_FEATURE around 2000.
emaste [Mon, 29 Dec 2014 19:16:40 +0000 (19:16 +0000)]
Update elftoolchain to upstream rev 3130
This includes a number of libdwarf improvements (particularly DWARF4
related) and updates to elftoolchain tools such as strip(1). It also
includes a large number of miscellaneous fixes (memory leaks, sign and
cast warnings, integer overflow and underflow, etc.).
This is a merge of r276167,276170-276172 from the
projects/elftoolchain-update-r3130 branch.
dim [Mon, 29 Dec 2014 00:10:43 +0000 (00:10 +0000)]
In contrib/binutils/bfd/elf32-ppc.c, avoid warnings about case values
not being in the enumerated type 'enum elf_ppc_reloc_type', by casting
the switch argument to int.
marius [Sun, 28 Dec 2014 21:36:20 +0000 (21:36 +0000)]
Don't use a sub-device/-vendor wildcard for probing MCS9922 as other
chips with the same device and vendor IDs actually may provide different
functionality. While at it, canonicalize the description to match other
MosChip UARTs.
rmacklem [Sun, 28 Dec 2014 21:13:52 +0000 (21:13 +0000)]
r245508 modified the NFS client's Setattr RPC to
use VA_UTIMES_NULL to indicate whether it should
set the time to the current tod on the server.
This had the side effect of making the NFS client
use the client's timestamp for exclusive create,
starting with FreeBSD9.2.
Unfortunately a bug in some Solaris NFS servers
causes these servers to return NFS_OK to the
Setattr RPC done during exclusive create, but not
actually set the file's mode, leaving the file's
mode == 0.
This patch restores the NFS client's behaviour to
use the server's tod for the exclusive open's
Setattr RPC, to avoid the Solaris server bug and
to restore the pre-FreeBSD9.2 NFS behaviour.
Discussed on: freebsd-fs
PR: 186293
MFC after: 3 months
dim [Sun, 28 Dec 2014 19:55:44 +0000 (19:55 +0000)]
Fix the following -Werror warning from clang 3.5.0, while building
rtld-elf for powerpc 32 bit:
libexec/rtld-elf/powerpc/reloc.c:486:6: error: taking the absolute value of unsigned type 'Elf_Addr' (aka 'unsigned int') has no effect [-Werror,-Wabsolute-value]
if (abs(offset) < 32*1024*1024) { /* inside 32MB? */
^
libexec/rtld-elf/powerpc/reloc.c:486:6: note: remove the call to 'abs' since unsigned values cannot be negative
if (abs(offset) < 32*1024*1024) { /* inside 32MB? */
^~~
1 error generated.
Cast 'offset' to int, since that was intended, and should be safe to do
on architectures with 32-bit two's complement ints.
ian [Sun, 28 Dec 2014 18:38:25 +0000 (18:38 +0000)]
Add cache maintenance functions which will be used by startup code to
initially set up the MMU. Some day they may also be useful as part of
suspend/resume handling, when we get better at power management.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>,
Michal Meloun <meloun@miracle.cz
ian [Sun, 28 Dec 2014 18:19:05 +0000 (18:19 +0000)]
Add new TLB and cache maintainence functions for armv6 and armv7. These
are inline functions that handle all the routine maintenance operations
except the flush-all and invalidate-all routines which are required only
during early kernel init.
These inline functions should be very much faster than the old mechanism
that involved jumping through the big cpufuncs table, especially for
common operations such as invalidating a single TLB entry. Note that
nothing is calling these yet, this just is just required infrastructure
for upcoming changes to the pmap-v6 code.
ian [Sun, 28 Dec 2014 18:12:56 +0000 (18:12 +0000)]
Add new code to read and parse cpu identification data using the new CPUID
mechanism defined for armv7 (and also present on some armv6 chips including
the arm1176 used on rpi). The information is parsed into a global cpuinfo
structure, which will be used by (upcoming) new cache and tlb maintenance
code to handle cpu-specific variations of the maintence sequences.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>,
Michal Meloun <meloun@miracle.cz
jhibbits [Sun, 28 Dec 2014 06:41:13 +0000 (06:41 +0000)]
Add PowerPC64 function descriptor support for dt_link.c
Summary:
PowerPC64 uses function descriptors in a section .opd, exporting the descriptors
to the symbol table. This adds support for these into dt_link.c so that dtrace
USDT probes can be compiled.
Test Plan:
Tested only on powerpc64. No regression testing has been performed, so I want
someone with x86 hardware to regression test this.
dim [Sun, 28 Dec 2014 02:30:03 +0000 (02:30 +0000)]
Pull in r224890 from upstream llvm trunk (by David Majnemer):
PowerPC: CTR shouldn't fire if a TLS call is in the loop
Determining the address of a TLS variable results in a function call in
certain TLS models. This means that a simple ICmpInst might actually
result in invalidating the CTR register.
In such cases, do not attempt to rely on the CTR register for loop
optimization purposes.
kib [Sat, 27 Dec 2014 23:19:08 +0000 (23:19 +0000)]
Change the way the lcall $7,$0 is reflected to usermode. Instead of
setting call gate, which must be 64 bit, put a code segment descriptor
into ldt slot 0.
This way, syscall shim does not switch temporary to 64bit trampoline,
and does not create a window where signal delivery interrupts 64 bit
mode (signal handler cannot return). The cost is shim running with
non-zero based segment in %cs, which requires vfork() handling make
more assumptions.
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
marius [Sat, 27 Dec 2014 21:50:47 +0000 (21:50 +0000)]
Improve/fix interrupt allocation/setup/release:
- Simplify MSI allocation to what is actually needed for a single one.
- Release the MSI and the corresponding bus resource as appropriate when
either the interrupt resource cannot be allocated or setting up the
interrupt fails.
- Error out when interrupt allocation or setup fails and polling is
disabled.
- Release the MSI after the corresponding bus resource so the former is
not leaked on detach.
- Remove a redundant softc member.
marius [Sat, 27 Dec 2014 17:10:35 +0000 (17:10 +0000)]
Use the same 6000 series g2{a,b} firmware versions when embedding these
images into the kernel as currently included into iwn6000g2{a,b}fw.ko
and delete the old files, missed in r254199 and r259135 respectively.
dim [Sat, 27 Dec 2014 14:50:53 +0000 (14:50 +0000)]
Pull in r221703 from upstream llvm trunk (by Bill Schmidt):
[PowerPC] Replace foul hackery with real calls to __tls_get_addr
My original support for the general dynamic and local dynamic TLS
models contained some fairly obtuse hacks to generate calls to
__tls_get_addr when lowering a TargetGlobalAddress. Rather than
generating real calls, special GET_TLS_ADDR nodes were used to wrap
the calls and only reveal them at assembly time. I attempted to
provide correct parameter and return values by chaining CopyToReg and
CopyFromReg nodes onto the GET_TLS_ADDR nodes, but this was also not
fully correct. Problems were seen with two back-to-back stores to TLS
variables, where the call sequences ended up overlapping with unhappy
results. Additionally, since these weren't real calls, the proper
register side effects of a call were not recorded, so clobbered values
were kept live across the calls.
The proper thing to do is to lower these into calls in the first
place. This is relatively straightforward; see the changes to
PPCTargetLowering::LowerGlobalTLSAddress() in PPCISelLowering.cpp.
The changes here are standard call lowering, except that we need to
track the fact that these calls will require a relocation. This is
done by adding a machine operand flag of MO_TLSLD or MO_TLSGD to the
TargetGlobalAddress operand that appears earlier in the sequence.
The calls to LowerCallTo() eventually find their way to
LowerCall_64SVR4() or LowerCall_32SVR4(), which call FinishCall(),
which calls PrepareCall(). In PrepareCall(), we detect the calls to
__tls_get_addr and immediately snag the TargetGlobalTLSAddress with
the annotated relocation information. This becomes an extra operand
on the call following the callee, which is expected for nodes of type
tlscall. We change the call opcode to CALL_TLS for this case. Back
in FinishCall(), we change it again to CALL_NOP_TLS for 64-bit only,
since we require a TOC-restore nop following the call for the 64-bit
ABIs.
During selection, patterns in PPCInstrInfo.td and PPCInstr64Bit.td
convert the CALL_TLS nodes into BL_TLS nodes, and convert the
CALL_NOP_TLS nodes into BL8_NOP_TLS nodes. This replaces the code
removed from PPCAsmPrinter.cpp, as the BL_TLS or BL8_NOP_TLS
nodes can now be emitted normally using their patterns and the
associated printTLSCall print method.
Finally, as a result of these changes, all references to get-tls-addr
in its various guises are no longer used, so they have been removed.
There are existing TLS tests to verify the changes haven't messed
anything up). I've added one new test that verifies that the problem
with the original code has been fixed.
This fixes a fatal "Bad machine code" error when compiling parts of
libgomp for 32-bit PowerPC.
marius [Sat, 27 Dec 2014 14:26:18 +0000 (14:26 +0000)]
- Make PCI_QUIRK_MSI_INTX_BUG work by using the ID of the actual PCI device
for the lookup.
- For devices affected by PCI_QUIRK_MSI_INTX_BUG, ensure PCIM_CMD_INTxDIS
is cleared when using MSI/MSI-X.
- Employ PCI_QUIRK_MSI_INTX_BUG for BCM5714(S)/BCM5715(S)/BCM5780(S) rather
than clearing PCIM_CMD_INTxDIS unconditionally for all devices in bge(4).
loos [Sat, 27 Dec 2014 13:52:33 +0000 (13:52 +0000)]
On interrupt handler, save the actual data read from mbox. The previous
macro wasn't needed and was being used with swapped arguments which always
give the same result (0) defeating the overflow check.
On initialization, do not use bcm_mbox_intr() to read the pending messages,
with the new semaphore based implementation this will lead to semaphore
being incremented on the channels that contain pending data and will make
the first read for that channel return stale data.
This fixes the hang that happens on boot while initializing the cpufreq on
Raspberry Pi.