Mitchell Horne [Thu, 25 May 2023 17:07:49 +0000 (14:07 -0300)]
riscv timer: use stimecmp CSR when available
The Sstc extension defines a new stimecmp CSR, allowing supervisor
software to set the timer, rather than just read it. When supported,
using this avoids the frequent trips through the SBI every time the
CPU's timer expires.
Reviewed by: jhb
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D40241
Mitchell Horne [Mon, 22 May 2023 23:54:36 +0000 (20:54 -0300)]
riscv: Print less CPU info
Change the reporting strategy to more closely follow what arm64
implements:
- Always print the one-line CPU summary when a core comes online
- Only print the additional fields (e.g. ISA) when they differ from the
CPU before it
In the common case of identical CPUs this results in informative but
non-repetitive output. For example, in QEMU:
CPU 0 : Vendor=Unspecified Core=Unknown (Hart 0)
marchid=0x80032, mimpid=0x80032
MMU: 0x7<Sv39,Sv48,Sv57>
ISA: 0x112d<Atomic,Compressed,Double,Float,Mult/Div>
real memory = 8589934592 (8192 MB)
avail memory = 8332300288 (7946 MB)
FreeBSD/SMP: Multiprocessor System Detected: 6 CPUs
CPU 1 : Vendor=Unspecified Core=Unknown (Hart 1)
CPU 2 : Vendor=Unspecified Core=Unknown (Hart 2)
CPU 3 : Vendor=Unspecified Core=Unknown (Hart 3)
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D40024
Mitchell Horne [Mon, 22 May 2023 23:53:43 +0000 (20:53 -0300)]
riscv: MMU detection
Detect and report the supported MMU for each CPU. Export the
capabilities to the rest of the kernel and use it in pmap_bootstrap() to
check for Sv48 support.
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39814
Mitchell Horne [Mon, 22 May 2023 23:51:44 +0000 (20:51 -0300)]
riscv: Rework CPU identification (second part)
Modify when and how we perform parsing and reporting. Most notably,
everything now executes on CPU 0.
The de-facto standard way to enumerate CPU features (ISA extensions) on
RISC-V is by parsing each CPU's ISA string. We currently obtain this
information from the device tree, and in the future will be able to pull
it from ACPI tables.
Eliminate the SYSINIT from identcpu.c. We still need to walk the /cpus
list in the device tree, but now do this one CPU at a time, as a step in
the identify_cpu() procedure. This is slightly less error prone, and
allows us to parse ISA features for CPU 0 much earlier.
Make use of the SMP hooks cpu_mp_start() and cpu_mp_announce() to
identify and print secondary CPU info, respectively. This causes
secondary processor identification to be printed much earlier in boot;
everything is done by SI_SUB_CPU, SI_ORDER_THIRD. Adjust some other
printf() calls so that we get enough useful info to debug under
bootverbose.
Reviewed by: markj (slightly earlier version)
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39811
Mitchell Horne [Mon, 22 May 2023 23:50:09 +0000 (20:50 -0300)]
riscv: Call identify_cpu() earlier for CPU 0
It is advantageous to have knowledge of ISA features as early as
possible. For example, the presence of newer virtual memory extensions
may be useful to pmap_bootstrap().
To achieve this, split out the printf() parts of identify_cpu() into a
separate function, printcpuinfo(). This latter function will be called
later in boot after the console has been initialized.
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39810
Mitchell Horne [Mon, 22 May 2023 23:48:41 +0000 (20:48 -0300)]
riscv: Rework CPU identification (first part)
Make better use of the RISC-V identification CSRs: mvendorid, marchid,
and mimpid. This code was written before these registers were
well-specified, or even available to the kernel. It currently fails to
recognize any CPU or platform.
Per the privileged specification, mvendorid contains the JEDEC vendor ID,
or zero.
The marchid register denotes the CPU microarchitecture. This is either
one of the globally allocated open-source implementation IDs, or the
field has a custom encoding. Therefore, for known vendors (SiFive) we
can also maintain a list of known marchid values. If we can not give a
name to the CPU but marchid is non-zero, then just print its value in
the report.
The mimpid (implementation ID) could be used in the future to more
uniquely identify the micro-architecture, but it really remains to be
seen how it gets used. For now we just print its value.
Thank you to Danjel Qyteza <danq1222@gmail.com> who submitted an early
version of this change to me, although it has been almost entirely
rewritten.
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39809
Tetsuya Uemura [Sun, 28 May 2023 12:56:21 +0000 (09:56 -0300)]
bcm2835_gpio: Handle BCM2711 pin configuration
Add support for GPIO internal pull up/down configuration on RPi4 family.
BCM2711 SoC on 4th generation Raspberry Pi changed the way to configure
its GPIO pins' internal pull up/down resistors. NetBSD already have
support for this change, and port it to FreeBSD is trivial.
This patch, based on the NetBSD commit adds the appropriate method for
BCM2711 and now we can properly configure the GPIO pins' pull status.
Mitchell Horne [Wed, 10 May 2023 12:52:47 +0000 (09:52 -0300)]
hier(7): drop list of /usr/include subdirectories
It is nice to have, however, the location of this information means that
it will naturally be missed by developers adding or removing directories
to the layout, so it trends out-of-date and it is out-of-date.
The target audience for hier(7) is users and administrators. It is not
expected to be a place that programmers should go to learn about the
purposes of the different C headers provided by FreeBSD.
Program authors needing FreeBSD-specific interfaces or libraries
(#include <sys/queue.h>, for instance) will either be following a more
detailed man page, or consulting the header contents directly. Folks
targeting standardized headers (#include <sys/time.h>) will not need
hier(7) to tell them where those headers are under /usr/include.
In other words, this is more detail than necessary for this document.
I'd go as far as to say that many of the existing entries in this list
do little more than parrot the name of the directory.
With all this in mind, let's drop the maintenance burden.
Reviewed by: imp, emaste
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D40000
riscv: Use PMAP_MAPDEV_EARLY_SIZE in locore and pmap_bootstrap
Use PMAP_MAPDEV_EARLY_SIZE instead of assuming that its value is always
L2_SIZE. Add compile-time assertions to check that the size matches the
expectations in locore.
Mykola Hohsadze [Mon, 8 May 2023 13:39:09 +0000 (10:39 -0300)]
arm64/disassem.c: Add detection of xzr and sp
Added support to distinguish between XZR/WZR and SP/WSP registers.
Add new OP_ flags to indicate if the instruction allows the use of SP
for a given register field. "wSP" and "SP" are removed from w_reg and
x_reg, and helper functions are introduced for this purpose of detecting
the correct name of the x31 register.
mhorne: While here, adjust some whitespace issues from a previous
commit.
Mitchell Horne [Wed, 24 May 2023 13:27:55 +0000 (10:27 -0300)]
ofw_cpu: quiet secondary CPU devices
We already do plenty to announce the different CPUs in dmesg. Follow the
ACPI CPU strategy of reporting the first CPU device, but quieting the
rest for non-verbose boot. This cuts down slightly on dmesg output.
Reviewed by: manu, jhb
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D40243
Mitchell Horne [Fri, 5 May 2023 21:59:41 +0000 (18:59 -0300)]
hwpmc: remove stub pmd_switch_{in,out} methods
Most platforms (non-x86) don't require these methods and implement stub
versions. If we initialize the pmc_mdep structure to always point to the
generic versions, then we can purge the duplicate stubs.
Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39913
Mitchell Horne [Fri, 5 May 2023 22:00:02 +0000 (19:00 -0300)]
hwpmc: pass pmc pointer to more class methods
In many cases this avoids an extra lookup, since the callers always have
pm at hand. We can also eliminate several assertions, mostly for pm !=
NULL. The class methods are an internal interface, and the callers
already handle such a scenario. No functional change intended.
Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39915
Mitchell Horne [Fri, 5 May 2023 21:59:01 +0000 (18:59 -0300)]
hwpmc: use kstack_contains()
This existing helper function is preferable to the hand-rolled
calculation of the kstack bounds.
Make some small style improvements while here. Notably, rename every
instance of "r", the return address, to "ra". Tidy the includes in the
affected files.
Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39909
Mitchell Horne [Fri, 5 May 2023 21:59:27 +0000 (18:59 -0300)]
hwpmc_logging: less macro magic for type names
Provide the log type names in their entirely, rather than relying on the
macro to prepend the prefix. This improves their searchability; for
example, if I see PMCLOG_TYPE_PMCALLOCATE in libpmc I will now be able
to find where that is emitted in the kernel with a simple grep.
Reviewed by: jkoshy, emaste
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39911
Mitchell Horne [Fri, 5 May 2023 21:56:55 +0000 (18:56 -0300)]
pmc_events.h: update event list comment
This comment is no longer in sync with the contents of __PMC_EVENTS().
Update to reflect the removal of various Intel event definitions from
this list; these event definitions now come from Linux and live in
lib/libpmc/pmu-events/.
Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39902
Mitchell Horne [Fri, 5 May 2023 21:56:34 +0000 (18:56 -0300)]
hwpmc: remove remaining UCP event definitions
Although this block has remained in __PMC_EVENTS(), there is no handling
of UCP in libpmc/libpmc.c, so it is not possible to select one of these
events. It should therefore be impossible to trigger the code removed
from ucp_start_pmc(). Note that the GQ_SNOOP_MSF MSR exists only for
Nehalem and Westmere architectures, and the related events do not exist
for later generations.
The Uncore support in hwpmc has severely atrophied in general. We have
uncore event definitions in pmu-events, but the kernel support was
written against Intel Performance Measurement Architecture version 2,
and is disabled for processor generations later than Westmere. Nehalem
and Westmere lack uncore event definitions in pmu-events. I'd be
surprised if Uncore support is usable on any machine in its current
state.
Reviewed by: jkoshy
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39901
The bit values are numbers given in octal representation, not decimal,
as one might assume from the description. Same goes for the base,
although this has an example.
Reviewed by: emaste
MFC after: 3 days
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D39815
arm64/disassem.c: Fix typo sxts to sxts and amount for TYPE_02
The current implementation is wrong, since it unconditionally sets the
amount equal to the <size> field of the instruction. However, when the
<S> bit (scale) is not set, it must be zero.
Also fix a typo, sxts to sxtx, according to the Arm64 documentation.
Stefan Eßer [Thu, 8 Jun 2023 14:45:11 +0000 (16:45 +0200)]
usr.bin/bc: fix build issue of version 6.6.0 on MIPS
The update removed MIPS and POWERPC64 from the list of architectures
that cannot use LTO to build this software.
Restore the previous exception list and do not use LTO on MIPS,
MIPS64, POWERPC64, and RISCV64. This is necessary due to differences
in compiler support for LTO in -CURRENT vs. 13-STABLE.
This release that fixes an infinite loop bug in the (non-standard)
extended math library functions root() and cbrt(), fixes a bug with
BC_LINE_LENGTH=0, and adds the fib() function to the extended math
library to calculate Fibonacci numbers.
Ed Maste [Wed, 8 Feb 2023 13:16:53 +0000 (08:16 -0500)]
ssh: fix leak and apply style(9) to hostname canonicalization
Fixes: bf2e2524a2ce ("ssh: canonicize the host name before...")
Fixes: 3e74849a1ee2 ("ssh: canonicize the host name before...")
Reviewed by: rew
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D38441
Ed Maste [Wed, 7 Sep 2022 14:12:37 +0000 (10:12 -0400)]
Cirrus-CI: move QEMU pkg installation to test script
Occasionally the QEMU package fails to build and isn't available on
-CURRENT using the Latest package set. Move the package installation
to the test script, so that if the package isn't available we at least
still perform a build test.
Ed Maste [Tue, 9 May 2023 18:26:47 +0000 (14:26 -0400)]
Cirrus-CI: add gcc12 automatic task on primary GitHub mirror
We want to get GCC coverage via Cirrus-CI, but don't want to trigger
excessive runs across all forks and branches. Create a duplicate gcc12
task to run automatically for freebsd/freebsd-src.
Reviewed by: jhb
Sponsored by: The FreeBSD Foundation
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