sgalabov [Mon, 29 Feb 2016 07:47:04 +0000 (07:47 +0000)]
This review aims at introducing ubldr (loader with U-Boot interface) for MIPS
(32 and 64-bit, LE and BE).
The changes were tested with QEMU's 'mips' target.
Most of the implementation was lifted from the ARM version, the appropriate
MIPS-specific things were implemented.
With these changes I am able to go all the way through the u-boot->ubldr->kernel
boot chain in QEMU on all combinations of bit-ness and endian-ness.
For the tests I've used FAT32 disk images (as FAT32 is supported by U-boot),
which include /boot/kernel/kernel and /boot/kernel/ubldr.bin
In U-boot I do:
fatload ide 0 <LOAD_ADDR> /boot/kernel/ubldr.bin; go <LOAD_ADDR>
where LOAD_ADDR is 80800000 for 32-bit and ffffffff80800000 for 64-bit
Then it's the usual ubldr that takes over and loads and starts a kernel.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5313
sgalabov [Mon, 29 Feb 2016 07:27:49 +0000 (07:27 +0000)]
These changes attempt to put things in order before the introduction of MIPS
ubldr.
The changes are mostly dealing with removing unnecessary casts from the U-Boot
API (we're passing only pointers, no obvious reason to cast them to uint32_t),
cleaning up some compiler warnings and using the proper printf format
specifiers in order to be able to compile cleanly for both 32-bit and 64-bit
MIPS targets.
Reviewed by: imp
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5312
sephe [Mon, 29 Feb 2016 04:58:40 +0000 (04:58 +0000)]
hyperv: Use proper fence function to keep store-load order for msgs
sfence only makes sure about the store-store order, which is not
sufficient here. Use atomic_thread_fence_seq_cst() as suggested
jhb and kib (a locked op in the nutshell, which should have the
Reviewed by: jhb, kib, Jun Su <junsu microsoft com>
MFC after: 1 week
Sponsored by: Microsoft OSTC
Differential Revision: https://reviews.freebsd.org/D5436
sephe [Mon, 29 Feb 2016 03:54:51 +0000 (03:54 +0000)]
buf_ring/drbr: Add buf_ring_peek_clear_sc and use it in drbr_peek
Unlike buf_ring_peek, it only supports single consumer mode, and it
clears the cons_head if DEBUG_BUFRING/INVARIANTS is defined.
The normal use case of drbr_peek for network drivers is:
m = drbr_peek(br);
err = hw_spec_encap(&m); /* could m_defrag/m_collapse */
(*)
if (err) {
if (m == NULL)
drbr_advance(br);
else
drbr_putback(br, m);
/* break the loop */
}
drbr_advance(br);
The race is:
If hw_spec_encap() m_defrag or m_collapse the mbuf, i.e. the old mbuf
was freed, or like the Hyper-V's network driver, that transmission-
done does not even require the TX lock; then on the other CPU at the
(*) time, the freed mbuf could be recycled and being drbr_enqueue even
before the current CPU had the chance to call drbr_{advance,putback}.
This triggers a panic in drbr_enqueue duplicated element check, if
DEBUG_BUFRING/INVARIANTS is defined.
Use buf_ring_peek_clear_sc() in drbr_peek() to fix the above race.
This change is a NO-OP, if neither DEBUG_BUFRING nor INVARIANTS are
defined.
jhibbits [Mon, 29 Feb 2016 03:38:00 +0000 (03:38 +0000)]
Add support for the Freescale dTSEC DPAA-based ethernet controller.
Freescale's QorIQ line includes a new ethernet controller, based on their
Datapath Acceleration Architecture (DPAA). This uses a combination of a Frame
manager, Buffer manager, and Queue manager to improve performance across all
interfaces by being able to pass data directly between hardware acceleration
interfaces.
As part of this import, Freescale's Netcomm Software (ncsw) driver is imported.
This was an attempt by Freescale to create an OS-agnostic sub-driver for
managing the hardware, using shims to interface to the OS-specific APIs. This
work was abandoned, and Freescale's primary work is in the Linux driver (dual
BSD/GPL license). Hence, this was imported directly to sys/contrib, rather than
going through the vendor area. Going forward, FreeBSD-specific changes may be
made to the ncsw code, diverging from the upstream in potentially incompatible
ways. An alternative could be to import the Linux driver itself, using the
linuxKPI layer, as that would maintain parity with the vendor-maintained driver.
However, the Linux driver has not been evaluated for reliability yet, and may
have issues with the import, whereas the ncsw-based driver in this commit was
completed by Semihalf 4 years ago, and is very stable.
Other SoC modules based on DPAA, which could be added in the future:
* Security and Encryption engine (SEC4.x, SEC5.x)
* RAID engine
Additional work to be done:
* Implement polling mode
* Test vlan support
* Add support for the Pattern Matching Engine, which can do regular expression
matching on packets.
This driver has been tested on the P5020 QorIQ SoC. Others listed in the
dtsec(4) manual page are expected to work as the same DPAA engine is included in
all.
Obtained from: Semihalf
Relnotes: Yes
Sponsored by: Alex Perez/Inertial Computing
avos [Sun, 28 Feb 2016 23:48:34 +0000 (23:48 +0000)]
net80211: remove redundant locking.
All callers of ieee80211_promisc()/ieee80211_allmulti()
(ieee80211_vap_detach(), ieee80211_ioctl(), ap_start() and ap_end())
already hold the com_lock while calling them.
Tested with RTL8188EU, STA mode.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D5475
kib [Sun, 28 Feb 2016 17:52:33 +0000 (17:52 +0000)]
Implement process-shared locks support for libthr.so.3, without
breaking the ABI. Special value is stored in the lock pointer to
indicate shared lock, and offline page in the shared memory is
allocated to store the actual lock.
Reviewed by: vangyzen (previous version)
Discussed with: deischen, emaste, jhb, rwatson,
Martin Simmons <martin@lispworks.com>
Tested by: pho
Sponsored by: The FreeBSD Foundation
andrew [Sun, 28 Feb 2016 13:43:58 +0000 (13:43 +0000)]
Add SMP support to the ARM PLATFORM code. This will allow us to have
different methods to start the secondary cores in a kernel built for
multiple SoCs, e.g. with the Allwinner A20 and A31.
Sponsored by: ABT systems Ltd
Differential Revision: https://reviews.freebsd.org/D5466
trasz [Sun, 28 Feb 2016 10:27:12 +0000 (10:27 +0000)]
Add speed limit to dd(1). This is useful for testing RCTL disk io limits
(when they actually get committed, that is), and might also come in handy
in other situations.
Reviewed by: wblock@ (man page)
MFC after: 1 month
Sponsored by: The FreeBSD Foundation
adrian [Sun, 28 Feb 2016 06:29:07 +0000 (06:29 +0000)]
Begin abstracting out the access method for ath(4) ioctls.
Each of the ath* commands do their own direct socket/ioctl calls,
which makes it difficult to forklift upgrade things.
So, this is the beginning of abstracting out the stats API calls
in the hope that I can migrate things to use a /dev/athX file for
ioctls and use a more general interface.
jmcneill [Sat, 27 Feb 2016 22:26:05 +0000 (22:26 +0000)]
Fix PIO mode on A31 and later SoCs.
Newer Allwinner MMC implementations use a different FIFO register offset
(0x200 instead of 0x100). Since the FDT uses the same compat string for
both cases, base the decision on which FIFO offset to use on the Allwinner
SoC family.
jhibbits [Sat, 27 Feb 2016 20:39:36 +0000 (20:39 +0000)]
Implement pmap_change_attr() for PowerPC (Book-E only for now)
Summary:
Some drivers need special memory requirements. X86 solves this with a
pmap_change_attr() API, which DRM uses for changing the mapping of the GART and
other memory regions. Implement the same function for PowerPC. AIM currently
does not need this, but will in the future for DRM, so a default is added for
that, for business as usual. Book-E has some drivers coming down that do
require non-default memory coherency. In this case, the Datapath Acceleration
Architecture (DPAA) based ethernet controller has 2 regions for the buffer
portals: cache-inhibited, and cache-enabled. By default, device memory is
cache-inhibited. If the cache-enabled memory regions are mapped
cache-inhibited, an alignment exception is thrown on access.
Test Plan:
Tested with a new driver to be added after this (DPAA dTSEC ethernet driver).
No alignment exceptions thrown, driver works as expected with this.
skra [Sat, 27 Feb 2016 12:03:07 +0000 (12:03 +0000)]
Move IPI related parts back to (ARM) machine specific file now, when
the interrupt framework is also going to be used by another (MIPS)
architecture. IPI implementations may vary much across different
architectures.
An IPI implementation should still define INTR_IPI_COUNT and use
intr_ipi_setup_counters() to setup IPI counters which are inside of
intrcnt[] and intrnames[] arrays. Those are used for sysctl and ddb.
Then, intr_ipi_increment_count() should be used to increment obtained
counter.
jhibbits [Sat, 27 Feb 2016 03:35:28 +0000 (03:35 +0000)]
Add the bus_alloc_resource_anywhere() convenience function.
Summary:
Many instances of bus_alloc_resource() simply use 0 and ~0 for start and end to
denote 'anywhere' with a given count. To clean this up, introduce a
bus_alloc_resource_anywhere() convenience function.
bdrewery [Fri, 26 Feb 2016 22:14:08 +0000 (22:14 +0000)]
Remove unneeded lines.
- WARNS can be inherited from lib/Makefile.inc
- CFLAGS referred to a non-existent directory and this shouldn't be needed
anyhow due to the build picking up includes from WORLDTMP.
bdrewery [Fri, 26 Feb 2016 22:13:52 +0000 (22:13 +0000)]
Move PROGS logic to proper place and remove redundant and unneeded logic.
- bsd.progs.mk is safe to include regardless of PROGS/PROGS_CXX/SCRIPTS
being set.
- bsd.progs.mk includes bsd.prog.mk always and will bring in
bsd.files.mk and bsd.obj.mk.
- DIRDEPS_BUILD: There's no need for _SKIP_BUILD or _SKIP_STAGING as the
PROGS were implicitly being built by the staging dependency anyway. This
was also preventing other objects from building if they were not part of
the staging sets.
- DIRDEPS_BUILD: This fixes PROGS without bsd.test.mk not staging.
andrew [Fri, 26 Feb 2016 18:54:26 +0000 (18:54 +0000)]
Make the CUBIEBOARD config include the A10 config with a few needed
additions. This is used by the release scripts so we need to keep it
around for now.
marcel [Fri, 26 Feb 2016 16:18:47 +0000 (16:18 +0000)]
Bump VM_MAX_MEMSEGS from 2 to 3 to match the number of VM segment
identifiers present in vmmapi.h. In particular, it's now possible
to create a VM_FRAMEBUFFER segment.
andrew [Fri, 26 Feb 2016 16:04:47 +0000 (16:04 +0000)]
Almost all copies of platform_mp_init_secondary just called
intr_pic_init_secondary. Replace them with a direct call. On BCM2836
and ARMADA XP we need to add this function, but it can be empty.
marcel [Fri, 26 Feb 2016 16:00:16 +0000 (16:00 +0000)]
Add vm_set_register() and vm_set_desc() callbacks. These callbacks
translate directly into calls to their namesake API functions in
libvmmapi.
It is an improvement over the existing setreg(), setmsr(), setcr()
setgdt() and exec() callbacks in that the new additions give full
control and don't assume we're booting FreeBSD, like exec() and
don't assume one only wants to set the value of RSP, like setreg().
andrew [Fri, 26 Feb 2016 15:54:34 +0000 (15:54 +0000)]
Remove platform_mp_probe as it's almost identical on most ARM SoCs, and
slightly wrong on the others. We should just check if mp_ncpus is set to
more than one CPU as we may wish to run on a single core even when SMP is
available.
Reviewed by: ian
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D5458
marcel [Fri, 26 Feb 2016 15:52:55 +0000 (15:52 +0000)]
Check that the userboot version is at least 3, rather than
3 exactly. The structure may be of a newer version and as
long as it is backward compatible with 3, we can work with
it.
wma [Fri, 26 Feb 2016 12:16:11 +0000 (12:16 +0000)]
Restore ThunderX Pass1.1 PCI changes removed by r295962
If Enhanced Allocation is not used, we can't allocate any random
range. All internal devices have hardcoded place where they can
be located within PCI address space. Fortunately, we can read
this value from BAR.
sgalabov [Fri, 26 Feb 2016 08:06:25 +0000 (08:06 +0000)]
Currently BERI's loader is including the 32-bit version of the FICL MIPS sysdep.h (sys/boot/ficl/mips/sysdep.h) instead of the 64-bit version (sys/boot/ficl/mips64/sysdep.h).
Although this may not be an issue in practice, it would be more correct if the 64-bit version was used. Also, using the 64-bit version would make it easier to add support for 64-bit ubldr on MIPS.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D5310
adrian [Fri, 26 Feb 2016 03:34:08 +0000 (03:34 +0000)]
Bring over the initial rewrite of the broadcom bus support found in their
SoCs and various chips (including, famously, their wifi chips.)
This is "just" (all 20,000 lines of it) code to enumerate the various
versions of busses inside these devices, including the PCI bridge and
the direct SIBA bridge found in MIPS chips.
It also includes shared code for some bus operations (suspend, resume, etc);
EEPROM/SROM/etc parsing and other things that are shared between chips.
Eventually this'll replace the code that bwi/bwn uses for the internal
bus, as well as some apparently upcoming mips74k broadcom SoC support
which uses bwn!
Thanks to Landon Fuller <landonf@landonf.org> for all this work!
projects / FreeBSD / FreeBSD.git / log