CyberLeo.Net >> Repos - FreeBSD/FreeBSD.git/tree - contrib/llvm-project/llvm/lib/Target/RISCV/

drwxr-xr-x		..
drwxr-xr-x	-	AsmParser	tree \| history
drwxr-xr-x	-	Disassembler	tree \| history
drwxr-xr-x	-	MCTargetDesc	tree \| history
-rw-r--r--	2185	RISCV.h	blob \| history \| raw
-rw-r--r--	26458	RISCV.td	blob \| history \| raw
-rw-r--r--	6759	RISCVAsmPrinter.cpp	blob \| history \| raw
-rw-r--r--	1697	RISCVCallLowering.cpp	blob \| history \| raw
-rw-r--r--	1499	RISCVCallLowering.h	blob \| history \| raw
-rw-r--r--	2322	RISCVCallingConv.td	blob \| history \| raw
-rw-r--r--	21804	RISCVExpandAtomicPseudoInsts.cpp	blob \| history \| raw
-rw-r--r--	14078	RISCVExpandPseudoInsts.cpp	blob \| history \| raw
-rw-r--r--	46567	RISCVFrameLowering.cpp	blob \| history \| raw
-rw-r--r--	3659	RISCVFrameLowering.h	blob \| history \| raw
-rw-r--r--	17336	RISCVGatherScatterLowering.cpp	blob \| history \| raw
-rw-r--r--	81471	RISCVISelDAGToDAG.cpp	blob \| history \| raw
-rw-r--r--	5939	RISCVISelDAGToDAG.h	blob \| history \| raw
-rw-r--r--	445315	RISCVISelLowering.cpp	blob \| history \| raw
-rw-r--r--	29350	RISCVISelLowering.h	blob \| history \| raw
-rw-r--r--	40291	RISCVInsertVSETVLI.cpp	blob \| history \| raw
-rw-r--r--	17304	RISCVInstrFormats.td	blob \| history \| raw
-rw-r--r--	5099	RISCVInstrFormatsC.td	blob \| history \| raw
-rw-r--r--	8576	RISCVInstrFormatsV.td	blob \| history \| raw
-rw-r--r--	67983	RISCVInstrInfo.cpp	blob \| history \| raw
-rw-r--r--	7730	RISCVInstrInfo.h	blob \| history \| raw
-rw-r--r--	61820	RISCVInstrInfo.td	blob \| history \| raw
-rw-r--r--	17949	RISCVInstrInfoA.td	blob \| history \| raw
-rw-r--r--	34901	RISCVInstrInfoC.td	blob \| history \| raw
-rw-r--r--	18429	RISCVInstrInfoD.td	blob \| history \| raw
-rw-r--r--	26981	RISCVInstrInfoF.td	blob \| history \| raw
-rw-r--r--	4878	RISCVInstrInfoM.td	blob \| history \| raw
-rw-r--r--	67188	RISCVInstrInfoV.td	blob \| history \| raw
-rw-r--r--	214393	RISCVInstrInfoVPseudos.td	blob \| history \| raw
-rw-r--r--	44912	RISCVInstrInfoVSDPatterns.td	blob \| history \| raw
-rw-r--r--	88332	RISCVInstrInfoVVLPatterns.td	blob \| history \| raw
-rw-r--r--	51419	RISCVInstrInfoZb.td	blob \| history \| raw
-rw-r--r--	18591	RISCVInstrInfoZfh.td	blob \| history \| raw
-rw-r--r--	7978	RISCVInstrInfoZk.td	blob \| history \| raw
-rw-r--r--	3230	RISCVInstructionSelector.cpp	blob \| history \| raw
-rw-r--r--	895	RISCVLegalizerInfo.cpp	blob \| history \| raw
-rw-r--r--	1000	RISCVLegalizerInfo.h	blob \| history \| raw
-rw-r--r--	8097	RISCVMCInstLower.cpp	blob \| history \| raw
-rw-r--r--	1145	RISCVMachineFunctionInfo.cpp	blob \| history \| raw
-rw-r--r--	4021	RISCVMachineFunctionInfo.h	blob \| history \| raw
-rw-r--r--	11480	RISCVMergeBaseOffset.cpp	blob \| history \| raw
-rw-r--r--	1068	RISCVRegisterBankInfo.cpp	blob \| history \| raw
-rw-r--r--	1248	RISCVRegisterBankInfo.h	blob \| history \| raw
-rw-r--r--	537	RISCVRegisterBanks.td	blob \| history \| raw
-rw-r--r--	13425	RISCVRegisterInfo.cpp	blob \| history \| raw
-rw-r--r--	2528	RISCVRegisterInfo.h	blob \| history \| raw
-rw-r--r--	23251	RISCVRegisterInfo.td	blob \| history \| raw
-rw-r--r--	8275	RISCVSExtWRemoval.cpp	blob \| history \| raw
-rw-r--r--	8683	RISCVSchedRocket.td	blob \| history \| raw
-rw-r--r--	8333	RISCVSchedSiFive7.td	blob \| history \| raw
-rw-r--r--	11014	RISCVSchedule.td	blob \| history \| raw
-rw-r--r--	3926	RISCVScheduleB.td	blob \| history \| raw
-rw-r--r--	30060	RISCVScheduleV.td	blob \| history \| raw
-rw-r--r--	8351	RISCVSubtarget.cpp	blob \| history \| raw
-rw-r--r--	9552	RISCVSubtarget.h	blob \| history \| raw
-rw-r--r--	13710	RISCVSystemOperands.td	blob \| history \| raw
-rw-r--r--	8215	RISCVTargetMachine.cpp	blob \| history \| raw
-rw-r--r--	2417	RISCVTargetMachine.h	blob \| history \| raw
-rw-r--r--	4282	RISCVTargetObjectFile.cpp	blob \| history \| raw
-rw-r--r--	1695	RISCVTargetObjectFile.h	blob \| history \| raw
-rw-r--r--	10548	RISCVTargetTransformInfo.cpp	blob \| history \| raw
-rw-r--r--	7121	RISCVTargetTransformInfo.h	blob \| history \| raw
drwxr-xr-x	-	TargetInfo	tree \| history