contrib/llvm/lib/Target/Mips/Mips16ISelLowering.h

   1 //===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // Subclass of MipsTargetLowering specialized for mips16.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef Mips16ISELLOWERING_H
  15 #define Mips16ISELLOWERING_H
  16
  17 #include "MipsISelLowering.h"
  18
  19 namespace llvm {
  20   class Mips16TargetLowering : public MipsTargetLowering  {
  21   public:
  22     explicit Mips16TargetLowering(MipsTargetMachine &TM);
  23
  24     virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const;
  25
  26     virtual MachineBasicBlock *
  27     EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const;
  28
  29   private:
  30     virtual bool
  31     isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
  32                                       unsigned NextStackOffset,
  33                                       const MipsFunctionInfo& FI) const;
  34
  35     void setMips16HardFloatLibCalls();
  36
  37     unsigned int
  38       getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
  39
  40     const char *getMips16HelperFunction
  41       (Type* RetTy, ArgListTy &Args, bool &needHelper) const;
  42
  43     virtual void
  44     getOpndList(SmallVectorImpl<SDValue> &Ops,
  45                 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
  46                 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
  47                 CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const;
  48
  49     MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr *MI,
  50                                  MachineBasicBlock *BB) const;
  51
  52     MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
  53                                    MachineInstr *MI,
  54                                    MachineBasicBlock *BB) const;
  55
  56     MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
  57                                   MachineInstr *MI,
  58                                   MachineBasicBlock *BB) const;
  59
  60     MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
  61                                            MachineInstr *MI,
  62                                            MachineBasicBlock *BB) const;
  63
  64     MachineBasicBlock *emitFEXT_T8I8I16_ins(
  65       unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc, bool ImmSigned,
  66       MachineInstr *MI,  MachineBasicBlock *BB) const;
  67
  68     MachineBasicBlock *emitFEXT_CCRX16_ins(
  69       unsigned SltOpc,
  70       MachineInstr *MI,  MachineBasicBlock *BB) const;
  71
  72     MachineBasicBlock *emitFEXT_CCRXI16_ins(
  73       unsigned SltiOpc, unsigned SltiXOpc,
  74       MachineInstr *MI,  MachineBasicBlock *BB )const;
  75   };
  76 }
  77
  78 #endif // Mips16ISELLOWERING_H