contrib/llvm/patches/patch-r275759-clang-r221170-ppc-vaarg.diff

   1 Pull in r221170 from upstream clang trunk (by Roman Divacky):
   2
   3   Implement vaarg lowering for ppc32. Lowering of scalars and
   4   aggregates is supported. Complex numbers are not.
   5
   6 Pull in r221174 from upstream clang trunk (by Roman Divacky):
   7
   8   Require asserts to unbreak the buildbots.
   9
  10 Pull in r221284 from upstream clang trunk (by Roman Divacky):
  11
  12   Rewrite the test to not require asserts.
  13
  14 Pull in r221285 from upstream clang trunk (by Roman Divacky):
  15
  16   Since the file has both ppc and ppc64 tests in it rename it.
  17
  18 This adds va_args support for PowerPC (32 bit) to clang.
  19
  20 Introduced here: http://svnweb.freebsd.org/changeset/base/275759
  21
  22 Index: tools/clang/lib/CodeGen/TargetInfo.cpp
  23 ===================================================================
  24 --- tools/clang/lib/CodeGen/TargetInfo.cpp
  25 +++ tools/clang/lib/CodeGen/TargetInfo.cpp
  26 @@ -2733,12 +2733,20 @@ llvm::Value *NaClX86_64ABIInfo::EmitVAArg(llvm::Va
  27
  28
  29  // PowerPC-32
  30 -
  31  namespace {
  32 -class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
  33 +/// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information.
  34 +class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
  35  public:
  36 -  PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
  37 +  PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
  38
  39 +  llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
  40 +                         CodeGenFunction &CGF) const;
  41 +};
  42 +
  43 +class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
  44 +public:
  45 +  PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT)) {}
  46 +
  47    int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
  48      // This is recovered from gcc output.
  49      return 1; // r1 is the dedicated stack pointer
  50 @@ -2750,6 +2758,96 @@ namespace {
  51
  52  }
  53
  54 +llvm::Value *PPC32_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr,
  55 +                                           QualType Ty,
  56 +                                           CodeGenFunction &CGF) const {
  57 +  if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
  58 +    // TODO: Implement this. For now ignore.
  59 +    (void)CTy;
  60 +    return NULL;
  61 +  }
  62 +
  63 +  bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
  64 +  bool isInt = Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType();
  65 +  llvm::Type *CharPtr = CGF.Int8PtrTy;
  66 +  llvm::Type *CharPtrPtr = CGF.Int8PtrPtrTy;
  67 +
  68 +  CGBuilderTy &Builder = CGF.Builder;
  69 +  llvm::Value *GPRPtr = Builder.CreateBitCast(VAListAddr, CharPtr, "gprptr");
  70 +  llvm::Value *GPRPtrAsInt = Builder.CreatePtrToInt(GPRPtr, CGF.Int32Ty);
  71 +  llvm::Value *FPRPtrAsInt = Builder.CreateAdd(GPRPtrAsInt, Builder.getInt32(1));
  72 +  llvm::Value *FPRPtr = Builder.CreateIntToPtr(FPRPtrAsInt, CharPtr);
  73 +  llvm::Value *OverflowAreaPtrAsInt = Builder.CreateAdd(FPRPtrAsInt, Builder.getInt32(3));
  74 +  llvm::Value *OverflowAreaPtr = Builder.CreateIntToPtr(OverflowAreaPtrAsInt, CharPtrPtr);
  75 +  llvm::Value *RegsaveAreaPtrAsInt = Builder.CreateAdd(OverflowAreaPtrAsInt, Builder.getInt32(4));
  76 +  llvm::Value *RegsaveAreaPtr = Builder.CreateIntToPtr(RegsaveAreaPtrAsInt, CharPtrPtr);
  77 +  llvm::Value *GPR = Builder.CreateLoad(GPRPtr, false, "gpr");
  78 +  // Align GPR when TY is i64.
  79 +  if (isI64) {
  80 +    llvm::Value *GPRAnd = Builder.CreateAnd(GPR, Builder.getInt8(1));
  81 +    llvm::Value *CC64 = Builder.CreateICmpEQ(GPRAnd, Builder.getInt8(1));
  82 +    llvm::Value *GPRPlusOne = Builder.CreateAdd(GPR, Builder.getInt8(1));
  83 +    GPR = Builder.CreateSelect(CC64, GPRPlusOne, GPR);
  84 +  }
  85 +  llvm::Value *FPR = Builder.CreateLoad(FPRPtr, false, "fpr");
  86 +  llvm::Value *OverflowArea = Builder.CreateLoad(OverflowAreaPtr, false, "overflow_area");
  87 +  llvm::Value *OverflowAreaAsInt = Builder.CreatePtrToInt(OverflowArea, CGF.Int32Ty);
  88 +  llvm::Value *RegsaveArea = Builder.CreateLoad(RegsaveAreaPtr, false, "regsave_area");
  89 +  llvm::Value *RegsaveAreaAsInt = Builder.CreatePtrToInt(RegsaveArea, CGF.Int32Ty);
  90 +
  91 +  llvm::Value *CC = Builder.CreateICmpULT(isInt ? GPR : FPR,
  92 +                                          Builder.getInt8(8), "cond");
  93 +
  94 +  llvm::Value *RegConstant = Builder.CreateMul(isInt ? GPR : FPR,
  95 +                                               Builder.getInt8(isInt ? 4 : 8));
  96 +
  97 +  llvm::Value *OurReg = Builder.CreateAdd(RegsaveAreaAsInt, Builder.CreateSExt(RegConstant, CGF.Int32Ty));
  98 +
  99 +  if (Ty->isFloatingType())
 100 +    OurReg = Builder.CreateAdd(OurReg, Builder.getInt32(32));
 101 +
 102 +  llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs");
 103 +  llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow");
 104 +  llvm::BasicBlock *Cont = CGF.createBasicBlock("cont");
 105 +
 106 +  Builder.CreateCondBr(CC, UsingRegs, UsingOverflow);
 107 +
 108 +  CGF.EmitBlock(UsingRegs);
 109 +
 110 +  llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
 111 +  llvm::Value *Result1 = Builder.CreateIntToPtr(OurReg, PTy);
 112 +  // Increase the GPR/FPR indexes.
 113 +  if (isInt) {
 114 +    GPR = Builder.CreateAdd(GPR, Builder.getInt8(isI64 ? 2 : 1));
 115 +    Builder.CreateStore(GPR, GPRPtr);
 116 +  } else {
 117 +    FPR = Builder.CreateAdd(FPR, Builder.getInt8(1));
 118 +    Builder.CreateStore(FPR, FPRPtr);
 119 +  }
 120 +  CGF.EmitBranch(Cont);
 121 +
 122 +  CGF.EmitBlock(UsingOverflow);
 123 +
 124 +  // Increase the overflow area.
 125 +  llvm::Value *Result2 = Builder.CreateIntToPtr(OverflowAreaAsInt, PTy);
 126 +  OverflowAreaAsInt = Builder.CreateAdd(OverflowAreaAsInt, Builder.getInt32(isInt ? 4 : 8));
 127 +  Builder.CreateStore(Builder.CreateIntToPtr(OverflowAreaAsInt, CharPtr), OverflowAreaPtr);
 128 +  CGF.EmitBranch(Cont);
 129 +
 130 +  CGF.EmitBlock(Cont);
 131 +
 132 +  llvm::PHINode *Result = CGF.Builder.CreatePHI(PTy, 2, "vaarg.addr");
 133 +  Result->addIncoming(Result1, UsingRegs);
 134 +  Result->addIncoming(Result2, UsingOverflow);
 135 +
 136 +  if (Ty->isAggregateType()) {
 137 +    llvm::Value *AGGPtr = Builder.CreateBitCast(Result, CharPtrPtr, "aggrptr")  ;
 138 +    return Builder.CreateLoad(AGGPtr, false, "aggr");
 139 +  }
 140 +
 141 +  return Result;
 142 +}
 143 +
 144  bool
 145  PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
 146                                                  llvm::Value *Address) const {
 147 Index: tools/clang/test/CodeGen/ppc64-varargs-struct.c
 148 ===================================================================
 149 --- tools/clang/test/CodeGen/ppc64-varargs-struct.c
 150 +++ tools/clang/test/CodeGen/ppc64-varargs-struct.c
 151 @@ -1,30 +0,0 @@
 152 -// REQUIRES: ppc64-registered-target
 153 -// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
 154 -
 155 -#include <stdarg.h>
 156 -
 157 -struct x {
 158 -  long a;
 159 -  double b;
 160 -};
 161 -
 162 -void testva (int n, ...)
 163 -{
 164 -  va_list ap;
 165 -
 166 -  struct x t = va_arg (ap, struct x);
 167 -// CHECK: bitcast i8* %{{[a-z.0-9]*}} to %struct.x*
 168 -// CHECK: bitcast %struct.x* %t to i8*
 169 -// CHECK: bitcast %struct.x* %{{[0-9]+}} to i8*
 170 -// CHECK: call void @llvm.memcpy
 171 -
 172 -  int v = va_arg (ap, int);
 173 -// CHECK: ptrtoint i8* %{{[a-z.0-9]*}} to i64
 174 -// CHECK: add i64 %{{[0-9]+}}, 4
 175 -// CHECK: inttoptr i64 %{{[0-9]+}} to i8*
 176 -// CHECK: bitcast i8* %{{[0-9]+}} to i32*
 177 -
 178 -  __int128_t u = va_arg (ap, __int128_t);
 179 -// CHECK: bitcast i8* %{{[a-z.0-9]+}} to i128*
 180 -// CHECK-NEXT: load i128* %{{[0-9]+}}
 181 -}
 182 Index: tools/clang/test/CodeGen/ppc-varargs-struct.c
 183 ===================================================================
 184 --- tools/clang/test/CodeGen/ppc-varargs-struct.c
 185 +++ tools/clang/test/CodeGen/ppc-varargs-struct.c
 186 @@ -0,0 +1,112 @@
 187 +// REQUIRES: ppc64-registered-target
 188 +// REQUIRES: asserts
 189 +// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
 190 +// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-PPC
 191 +
 192 +#include <stdarg.h>
 193 +
 194 +struct x {
 195 +  long a;
 196 +  double b;
 197 +};
 198 +
 199 +void testva (int n, ...)
 200 +{
 201 +  va_list ap;
 202 +
 203 +  struct x t = va_arg (ap, struct x);
 204 +// CHECK: bitcast i8* %{{[a-z.0-9]*}} to %struct.x*
 205 +// CHECK: bitcast %struct.x* %t to i8*
 206 +// CHECK: bitcast %struct.x* %{{[0-9]+}} to i8*
 207 +// CHECK: call void @llvm.memcpy
 208 +// CHECK-PPC:  [[ARRAYDECAY:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
 209 +// CHECK-PPC-NEXT:  [[GPRPTR:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY]] to i8*
 210 +// CHECK-PPC-NEXT:  [[ZERO:%[0-9]+]] = ptrtoint i8* [[GPRPTR]] to i32
 211 +// CHECK-PPC-NEXT:  [[ONE:%[0-9]+]] = add i32 [[ZERO]], 1
 212 +// CHECK-PPC-NEXT:  [[TWO:%[0-9]+]] = inttoptr i32 [[ONE]] to i8*
 213 +// CHECK-PPC-NEXT:  [[THREE:%[0-9]+]] = add i32 [[ONE]], 3
 214 +// CHECK-PPC-NEXT:  [[FOUR:%[0-9]+]] = inttoptr i32 [[THREE]] to i8**
 215 +// CHECK-PPC-NEXT:  [[FIVE:%[0-9]+]] = add i32 [[THREE]], 4
 216 +// CHECK-PPC-NEXT:  [[SIX:%[0-9]+]] = inttoptr i32 [[FIVE]] to i8**
 217 +// CHECK-PPC-NEXT:  [[GPR:%[a-z0-9]+]] = load i8* [[GPRPTR]]
 218 +// CHECK-PPC-NEXT:  [[FPR:%[a-z0-9]+]] = load i8* [[TWO]]
 219 +// CHECK-PPC-NEXT:  [[OVERFLOW_AREA:%[a-z_0-9]+]] = load i8** [[FOUR]]
 220 +// CHECK-PPC-NEXT:  [[SEVEN:%[0-9]+]] = ptrtoint i8* [[OVERFLOW_AREA]] to i32
 221 +// CHECK-PPC-NEXT:  [[REGSAVE_AREA:%[a-z_0-9]+]] = load i8** [[SIX]]
 222 +// CHECK-PPC-NEXT:  [[EIGHT:%[0-9]+]] = ptrtoint i8* [[REGSAVE_AREA]] to i32
 223 +// CHECK-PPC-NEXT:  [[COND:%[a-z0-9]+]] = icmp ult i8 [[GPR]], 8
 224 +// CHECK-PPC-NEXT:  [[NINE:%[0-9]+]] = mul i8 [[GPR]], 4
 225 +// CHECK-PPC-NEXT:  [[TEN:%[0-9]+]] = sext i8 [[NINE]] to i32
 226 +// CHECK-PPC-NEXT:  [[ELEVEN:%[0-9]+]] = add i32 [[EIGHT]], [[TEN]]
 227 +// CHECK-PPC-NEXT:  br i1 [[COND]], label [[USING_REGS:%[a-z_0-9]+]], label [[USING_OVERFLOW:%[a-z_0-9]+]]
 228 +//
 229 +// CHECK-PPC1:[[USING_REGS]]
 230 +// CHECK-PPC:  [[TWELVE:%[0-9]+]] = inttoptr i32 [[ELEVEN]] to %struct.x*
 231 +// CHECK-PPC-NEXT:  [[THIRTEEN:%[0-9]+]] = add i8 [[GPR]], 1
 232 +// CHECK-PPC-NEXT:  store i8 [[THIRTEEN]], i8* [[GPRPTR]]
 233 +// CHECK-PPC-NEXT:  br label [[CONT:%[a-z0-9]+]]
 234 +//
 235 +// CHECK-PPC1:[[USING_OVERFLOW]]
 236 +// CHECK-PPC:  [[FOURTEEN:%[0-9]+]] = inttoptr i32 [[SEVEN]] to %struct.x*
 237 +// CHECK-PPC-NEXT:  [[FIFTEEN:%[0-9]+]] = add i32 [[SEVEN]], 4
 238 +// CHECK-PPC-NEXT:  [[SIXTEEN:%[0-9]+]] = inttoptr i32 [[FIFTEEN]] to i8*
 239 +// CHECK-PPC-NEXT:  store i8* [[SIXTEEN]], i8** [[FOUR]]
 240 +// CHECK-PPC-NEXT:  br label [[CONT]]
 241 +//
 242 +// CHECK-PPC1:[[CONT]]
 243 +// CHECK-PPC:  [[VAARG_ADDR:%[a-z.0-9]+]] = phi %struct.x* [ [[TWELVE]], [[USING_REGS]] ], [ [[FOURTEEN]], [[USING_OVERFLOW]] ]
 244 +// CHECK-PPC-NEXT:  [[AGGRPTR:%[a-z0-9]+]] = bitcast %struct.x* [[VAARG_ADDR]] to i8**
 245 +// CHECK-PPC-NEXT:  [[AGGR:%[a-z0-9]+]] = load i8** [[AGGRPTR]]
 246 +// CHECK-PPC-NEXT:  [[SEVENTEEN:%[0-9]+]] = bitcast %struct.x* %t to i8*
 247 +// CHECK-PPC-NEXT:  call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[SEVENTEEN]], i8* [[AGGR]], i32 16, i32 8, i1 false)
 248 +
 249 +  int v = va_arg (ap, int);
 250 +// CHECK: ptrtoint i8* %{{[a-z.0-9]*}} to i64
 251 +// CHECK: add i64 %{{[0-9]+}}, 4
 252 +// CHECK: inttoptr i64 %{{[0-9]+}} to i8*
 253 +// CHECK: bitcast i8* %{{[0-9]+}} to i32*
 254 +// CHECK-PPC:  [[ARRAYDECAY1:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
 255 +// CHECK-PPC-NEXT:  [[GPRPTR1:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY1]] to i8*
 256 +// CHECK-PPC-NEXT:  [[EIGHTEEN:%[0-9]+]] = ptrtoint i8* [[GPRPTR1]] to i32
 257 +// CHECK-PPC-NEXT:  [[NINETEEN:%[0-9]+]] = add i32 [[EIGHTEEN]], 1
 258 +// CHECK-PPC-NEXT:  [[TWENTY:%[0-9]+]] = inttoptr i32 [[NINETEEN]] to i8*
 259 +// CHECK-PPC-NEXT:  [[TWENTYONE:%[0-9]+]] = add i32 [[NINETEEN]], 3
 260 +// CHECK-PPC-NEXT:  [[TWENTYTWO:%[0-9]+]] = inttoptr i32 [[TWENTYONE]] to i8**
 261 +// CHECK-PPC-NEXT:  [[TWENTYTHREE:%[0-9]+]] = add i32 [[TWENTYONE]], 4
 262 +// CHECK-PPC-NEXT:  [[TWENTYFOUR:%[0-9]+]] = inttoptr i32 [[TWENTYTHREE]] to i8**
 263 +// CHECK-PPC-NEXT:  [[GPR1:%[a-z0-9]+]] = load i8* [[GPRPTR1]]
 264 +// CHECK-PPC-NEXT:  [[FPR1:%[a-z0-9]+]] = load i8* [[TWENTY]]
 265 +// CHECK-PPC-NEXT:  [[OVERFLOW_AREA1:%[a-z_0-9]+]] = load i8** [[TWENTYTWO]]
 266 +// CHECK-PPC-NEXT:  [[TWENTYFIVE:%[0-9]+]] = ptrtoint i8* [[OVERFLOW_AREA1]] to i32
 267 +// CHECK-PPC-NEXT:  [[REGSAVE_AREA1:%[a-z_0-9]+]] = load i8** [[TWENTYFOUR]]
 268 +// CHECK-PPC-NEXT:  [[TWENTYSIX:%[0-9]+]] = ptrtoint i8* [[REGSAVE_AREA1]] to i32
 269 +// CHECK-PPC-NEXT:  [[COND1:%[a-z0-9]+]] = icmp ult i8 [[GPR1]], 8
 270 +// CHECK-PPC-NEXT:  [[TWENTYSEVEN:%[0-9]+]] = mul i8 [[GPR1]], 4
 271 +// CHECK-PPC-NEXT:  [[TWENTYEIGHT:%[0-9]+]] = sext i8 [[TWENTYSEVEN]] to i32
 272 +// CHECK-PPC-NEXT:  [[TWENTYNINE:%[0-9]+]] = add i32 [[TWENTYSIX]], [[TWENTYEIGHT]]
 273 +// CHECK-PPC-NEXT:  br i1 [[COND1]], label [[USING_REGS1:%[a-z_0-9]+]], label [[USING_OVERFLOW1:%[a-z_0-9]+]]
 274 +//
 275 +// CHECK-PPC1:[[USING_REGS1]]:
 276 +// CHECK-PPC:  [[THIRTY:%[0-9]+]] = inttoptr i32 [[TWENTYNINE]] to i32*
 277 +// CHECK-PPC-NEXT:  [[THIRTYONE:%[0-9]+]] = add i8 [[GPR1]], 1
 278 +// CHECK-PPC-NEXT:  store i8 [[THIRTYONE]], i8* [[GPRPTR1]]
 279 +// CHECK-PPC-NEXT:  br label [[CONT1:%[a-z0-9]+]]
 280 +//
 281 +// CHECK-PPC1:[[USING_OVERFLOW1]]:
 282 +// CHECK-PPC:  [[THIRTYTWO:%[0-9]+]] = inttoptr i32 [[TWENTYFIVE]] to i32*
 283 +// CHECK-PPC-NEXT:  [[THIRTYTHREE:%[0-9]+]] = add i32 [[TWENTYFIVE]], 4
 284 +// CHECK-PPC-NEXT:  [[THIRTYFOUR:%[0-9]+]] = inttoptr i32 [[THIRTYTHREE]] to i8*
 285 +// CHECK-PPC-NEXT:  store i8* [[THIRTYFOUR]], i8** [[TWENTYTWO]]
 286 +// CHECK-PPC-NEXT:  br label [[CONT1]]
 287 +//
 288 +// CHECK-PPC1:[[CONT1]]:
 289 +// CHECK-PPC:  [[VAARG_ADDR1:%[a-z.0-9]+]] = phi i32* [ [[THIRTY]], [[USING_REGS1]] ], [ [[THIRTYTWO]], [[USING_OVERFLOW1]] ]
 290 +// CHECK-PPC-NEXT:  [[THIRTYFIVE:%[0-9]+]] = load i32* [[VAARG_ADDR1]]
 291 +// CHECK-PPC-NEXT:  store i32 [[THIRTYFIVE]], i32* %v, align 4
 292 +
 293 +#ifdef __powerpc64__
 294 +  __int128_t u = va_arg (ap, __int128_t);
 295 +#endif
 296 +// CHECK: bitcast i8* %{{[a-z.0-9]+}} to i128*
 297 +// CHECK-NEXT: load i128* %{{[0-9]+}}
 298 +}