contrib/llvm/tools/lldb/source/Plugins/Process/POSIX/RegisterInfos_i386.h

   1 //===-- RegisterInfos_i386.h -----------------------------------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===---------------------------------------------------------------------===//
   9 #include "llvm/Support/Compiler.h"
  10
  11 #ifdef DECLARE_REGISTER_INFOS_I386_STRUCT
  12
  13 // Computes the offset of the given GPR in the user data area.
  14 #define GPR_OFFSET(regname) \
  15     (LLVM_EXTENSION offsetof(GPR, regname))
  16
  17 // Computes the offset of the given FPR in the extended data area.
  18 #define FPR_OFFSET(regname)  \
  19     (LLVM_EXTENSION offsetof(FPR, xstate) + \
  20      LLVM_EXTENSION offsetof(FXSAVE, regname))
  21
  22 // Computes the offset of the YMM register assembled from register halves.
  23 #define YMM_OFFSET(regname) \
  24     (LLVM_EXTENSION offsetof(YMM, regname))
  25
  26 // Number of bytes needed to represent a FPR.
  27 #define FPR_SIZE(reg) sizeof(((FXSAVE*)NULL)->reg)
  28
  29 // Number of bytes needed to represent the i'th FP register.
  30 #define FP_SIZE sizeof(((MMSReg*)NULL)->bytes)
  31
  32 // Number of bytes needed to represent an XMM register.
  33 #define XMM_SIZE sizeof(XMMReg)
  34
  35 // Number of bytes needed to represent a YMM register.
  36 #define YMM_SIZE sizeof(YMMReg)
  37
  38 // Note that the size and offset will be updated by platform-specific classes.
  39 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)            \
  40     { #reg, alt, sizeof(GPR::reg), GPR_OFFSET(reg), eEncodingUint,  \
  41       eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_i386 }, NULL, NULL }
  42
  43 #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)           \
  44     { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint,   \
  45       eFormatHex, { kind1, kind2, kind3, kind4, fpu_##name##_i386 }, NULL, NULL }
  46
  47 // RegisterKind: GCC, DWARF, Generic, GDB, LLDB
  48
  49 #define DEFINE_FP_ST(reg, i)                                       \
  50     { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]),    \
  51       eEncodingVector, eFormatVectorOfUInt8,                       \
  52       { gcc_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, gdb_st##i##_i386, fpu_st##i##_i386 }, \
  53       NULL, NULL }
  54
  55 #define DEFINE_FP_MM(reg, i)                                                \
  56     { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
  57       eEncodingUint, eFormatHex,                                            \
  58       { gcc_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, gdb_mm##i##_i386, fpu_mm##i##_i386 }, \
  59       NULL, NULL }
  60
  61 #define DEFINE_XMM(reg, i)                                         \
  62     { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]),   \
  63       eEncodingVector, eFormatVectorOfUInt8,                       \
  64       { gcc_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, gdb_##reg##i##_i386, fpu_##reg##i##_i386}, \
  65       NULL, NULL }
  66
  67 // I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then differentiate based on register size.
  68 #define DEFINE_YMM(reg, i)                                         \
  69     { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(reg[i]),   \
  70       eEncodingVector, eFormatVectorOfUInt8,                       \
  71       { LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, LLDB_INVALID_REGNUM, gdb_##reg##i##h_i386, fpu_##reg##i##_i386 }, \
  72       NULL, NULL }
  73
  74 #define DEFINE_DR(reg, i)                                               \
  75     { #reg#i, NULL, DR_SIZE, DR_OFFSET(i), eEncodingUint, eFormatHex,   \
  76       { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,  \
  77         LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL }
  78
  79 #define DEFINE_GPR_PSEUDO_16(reg16, reg32)                  \
  80     { #reg16, NULL, 2, GPR_OFFSET(reg32), eEncodingUint,    \
  81       eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg16##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
  82 #define DEFINE_GPR_PSEUDO_8H(reg8, reg32)                   \
  83     { #reg8, NULL, 1, GPR_OFFSET(reg32)+1, eEncodingUint,   \
  84       eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
  85 #define DEFINE_GPR_PSEUDO_8L(reg8, reg32)                   \
  86     { #reg8, NULL, 1, GPR_OFFSET(reg32), eEncodingUint,     \
  87       eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
  88
  89 static RegisterInfo
  90 g_register_infos_i386[] =
  91 {
  92     // General purpose registers.
  93     DEFINE_GPR(eax,    NULL,    gcc_eax_i386,        dwarf_eax_i386,      LLDB_INVALID_REGNUM,       gdb_eax_i386),
  94     DEFINE_GPR(ebx,    NULL,    gcc_ebx_i386,        dwarf_ebx_i386,      LLDB_INVALID_REGNUM,       gdb_ebx_i386),
  95     DEFINE_GPR(ecx,    NULL,    gcc_ecx_i386,        dwarf_ecx_i386,      LLDB_INVALID_REGNUM,       gdb_ecx_i386),
  96     DEFINE_GPR(edx,    NULL,    gcc_edx_i386,        dwarf_edx_i386,      LLDB_INVALID_REGNUM,       gdb_edx_i386),
  97     DEFINE_GPR(edi,    NULL,    gcc_edi_i386,        dwarf_edi_i386,      LLDB_INVALID_REGNUM,       gdb_edi_i386),
  98     DEFINE_GPR(esi,    NULL,    gcc_esi_i386,        dwarf_esi_i386,      LLDB_INVALID_REGNUM,       gdb_esi_i386),
  99     DEFINE_GPR(ebp,    "fp",    gcc_ebp_i386,        dwarf_ebp_i386,      LLDB_REGNUM_GENERIC_FP,    gdb_ebp_i386),
 100     DEFINE_GPR(esp,    "sp",    gcc_esp_i386,        dwarf_esp_i386,      LLDB_REGNUM_GENERIC_SP,    gdb_esp_i386),
 101     DEFINE_GPR(eip,    "pc",    gcc_eip_i386,        dwarf_eip_i386,      LLDB_REGNUM_GENERIC_PC,    gdb_eip_i386),
 102     DEFINE_GPR(eflags, "flags", gcc_eflags_i386,     dwarf_eflags_i386,   LLDB_REGNUM_GENERIC_FLAGS, gdb_eflags_i386),
 103     DEFINE_GPR(cs,     NULL,    LLDB_INVALID_REGNUM, dwarf_cs_i386,       LLDB_INVALID_REGNUM,       gdb_cs_i386),
 104     DEFINE_GPR(fs,     NULL,    LLDB_INVALID_REGNUM, dwarf_fs_i386,       LLDB_INVALID_REGNUM,       gdb_fs_i386),
 105     DEFINE_GPR(gs,     NULL,    LLDB_INVALID_REGNUM, dwarf_gs_i386,       LLDB_INVALID_REGNUM,       gdb_gs_i386),
 106     DEFINE_GPR(ss,     NULL,    LLDB_INVALID_REGNUM, dwarf_ss_i386,       LLDB_INVALID_REGNUM,       gdb_ss_i386),
 107     DEFINE_GPR(ds,     NULL,    LLDB_INVALID_REGNUM, dwarf_ds_i386,       LLDB_INVALID_REGNUM,       gdb_ds_i386),
 108     DEFINE_GPR(es,     NULL,    LLDB_INVALID_REGNUM, dwarf_es_i386,       LLDB_INVALID_REGNUM,       gdb_es_i386),
 109
 110     DEFINE_GPR_PSEUDO_16(ax,  eax),
 111     DEFINE_GPR_PSEUDO_16(bx,  ebx),
 112     DEFINE_GPR_PSEUDO_16(cx,  ecx),
 113     DEFINE_GPR_PSEUDO_16(dx,  edx),
 114     DEFINE_GPR_PSEUDO_16(di,  edi),
 115     DEFINE_GPR_PSEUDO_16(si,  esi),
 116     DEFINE_GPR_PSEUDO_16(bp,  ebp),
 117     DEFINE_GPR_PSEUDO_16(sp,  esp),
 118     DEFINE_GPR_PSEUDO_8H(ah,  eax),
 119     DEFINE_GPR_PSEUDO_8H(bh,  ebx),
 120     DEFINE_GPR_PSEUDO_8H(ch,  ecx),
 121     DEFINE_GPR_PSEUDO_8H(dh,  edx),
 122     DEFINE_GPR_PSEUDO_8L(al,  eax),
 123     DEFINE_GPR_PSEUDO_8L(bl,  ebx),
 124     DEFINE_GPR_PSEUDO_8L(cl,  ecx),
 125     DEFINE_GPR_PSEUDO_8L(dl,  edx),
 126
 127     // i387 Floating point registers.
 128     DEFINE_FPR(fctrl,     fctrl,          LLDB_INVALID_REGNUM, dwarf_fctrl_i386,    LLDB_INVALID_REGNUM, gdb_fctrl_i386),
 129     DEFINE_FPR(fstat,     fstat,          LLDB_INVALID_REGNUM, dwarf_fstat_i386,    LLDB_INVALID_REGNUM, gdb_fstat_i386),
 130     DEFINE_FPR(ftag,      ftag,           LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ftag_i386),
 131     DEFINE_FPR(fop,       fop,            LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fop_i386),
 132     DEFINE_FPR(fiseg,     ptr.i386.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fiseg_i386),
 133     DEFINE_FPR(fioff,     ptr.i386.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fioff_i386),
 134     DEFINE_FPR(foseg,     ptr.i386.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_foseg_i386),
 135     DEFINE_FPR(fooff,     ptr.i386.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fooff_i386),
 136     DEFINE_FPR(mxcsr,     mxcsr,          LLDB_INVALID_REGNUM, dwarf_mxcsr_i386,    LLDB_INVALID_REGNUM, gdb_mxcsr_i386),
 137     DEFINE_FPR(mxcsrmask, mxcsrmask,      LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
 138
 139     // FP registers.
 140     DEFINE_FP_ST(st, 0),
 141     DEFINE_FP_ST(st, 1),
 142     DEFINE_FP_ST(st, 2),
 143     DEFINE_FP_ST(st, 3),
 144     DEFINE_FP_ST(st, 4),
 145     DEFINE_FP_ST(st, 5),
 146     DEFINE_FP_ST(st, 6),
 147     DEFINE_FP_ST(st, 7),
 148     DEFINE_FP_MM(mm, 0),
 149     DEFINE_FP_MM(mm, 1),
 150     DEFINE_FP_MM(mm, 2),
 151     DEFINE_FP_MM(mm, 3),
 152     DEFINE_FP_MM(mm, 4),
 153     DEFINE_FP_MM(mm, 5),
 154     DEFINE_FP_MM(mm, 6),
 155     DEFINE_FP_MM(mm, 7),
 156
 157     // XMM registers
 158     DEFINE_XMM(xmm, 0),
 159     DEFINE_XMM(xmm, 1),
 160     DEFINE_XMM(xmm, 2),
 161     DEFINE_XMM(xmm, 3),
 162     DEFINE_XMM(xmm, 4),
 163     DEFINE_XMM(xmm, 5),
 164     DEFINE_XMM(xmm, 6),
 165     DEFINE_XMM(xmm, 7),
 166
 167     // Copy of YMM registers assembled from xmm and ymmh
 168     DEFINE_YMM(ymm, 0),
 169     DEFINE_YMM(ymm, 1),
 170     DEFINE_YMM(ymm, 2),
 171     DEFINE_YMM(ymm, 3),
 172     DEFINE_YMM(ymm, 4),
 173     DEFINE_YMM(ymm, 5),
 174     DEFINE_YMM(ymm, 6),
 175     DEFINE_YMM(ymm, 7),
 176
 177     // Debug registers for lldb internal use
 178     DEFINE_DR(dr, 0),
 179     DEFINE_DR(dr, 1),
 180     DEFINE_DR(dr, 2),
 181     DEFINE_DR(dr, 3),
 182     DEFINE_DR(dr, 4),
 183     DEFINE_DR(dr, 5),
 184     DEFINE_DR(dr, 6),
 185     DEFINE_DR(dr, 7)
 186 };
 187 static_assert((sizeof(g_register_infos_i386) / sizeof(g_register_infos_i386[0])) == k_num_registers_i386,
 188     "g_register_infos_x86_64 has wrong number of register infos");
 189
 190 #undef GPR_OFFSET
 191 #undef FPR_OFFSET
 192 #undef YMM_OFFSET
 193 #undef FPR_SIZE
 194 #undef FP_SIZE
 195 #undef XMM_SIZE
 196 #undef YMM_SIZE
 197 #undef DEFINE_GPR
 198 #undef DEFINE_FPR
 199 #undef DEFINE_FP
 200 #undef DEFINE_XMM
 201 #undef DEFINE_YMM
 202 #undef DEFINE_DR
 203 #undef DEFINE_GPR_PSEUDO_16
 204 #undef DEFINE_GPR_PSEUDO_8H
 205 #undef DEFINE_GPR_PSEUDO_8L
 206
 207 #endif // DECLARE_REGISTER_INFOS_I386_STRUCT