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31 .Nd measurement events for
41 Intel P4 PMCs are present in Intel
45 processors that use the
49 These PMCs are documented in
51 .%B "IA-32 Intel(R) Architecture Software Developer's Manual"
52 .%T "Volume 3: System Programming Guide"
53 .%N "Order Number 245472-012"
55 .%Q "Intel Corporation"
57 Further information about using these PMCs may be found in
59 .%B "IA-32 Intel(R) Architecture Optimization Guide"
61 .%N "Order Number 248966-009"
62 .%Q "Intel Corporation"
64 Some of these events are affected by processor errata described in
66 .%B "Intel(R) Pentium(R) 4 Processor Specification Update"
67 .%N "Document Number: 249199-059"
69 .%Q "Intel Corporation"
72 Intel Pentium 4 PMCs are 40 bits wide.
73 Each CPU contains 18 PMCs, divided into 4 groups with 4, 4, 4 and 6
75 On processors with hyperthreading support, PMC resources are shared
76 between logical processors.
77 These PMCs support the following capabilities:
78 .Bl -column "PMC_CAP_INTERRUPT" "Support"
79 .It Em Capability Ta Em Support
80 .It PMC_CAP_CASCADE Ta Yes
81 .It PMC_CAP_EDGE Ta Yes
82 .It PMC_CAP_INTERRUPT Ta Yes
83 .It PMC_CAP_INVERT Ta Yes
84 .It PMC_CAP_READ Ta Yes
85 .It PMC_CAP_PRECISE Ta Unimplemented
86 .It PMC_CAP_SYSTEM Ta Yes
87 .It PMC_CAP_TAGGING Ta Yes
88 .It PMC_CAP_THRESHOLD Ta Yes
89 .It PMC_CAP_USER Ta Yes
90 .It PMC_CAP_WRITE Ta Yes
93 Event specifiers for Intel P4 PMCs can have the following common
95 .Bl -tag -width indent
96 .It Li active= Ns Ar choice
97 (On P4 HTT CPUs) Filter event counting based on which logical
98 processors are active.
103 .Bl -tag -width indent -compact
105 Count when either logical processor is active.
107 Count when both logical processors are active.
109 Count only when neither logical processor is active.
111 Count only when one logical processor is active.
117 Configure the PMC to cascade onto its partner.
119 .Sx "Cascading P4 PMCs"
120 below for more information.
122 Configure the counter to count false to true transitions of the threshold
124 This qualifier only takes effect if a threshold qualifier has also been
127 Configure the counter to increment only when the event count seen is
128 less than the threshold qualifier value specified.
129 .It Li mask= Ns Ar qualifier
130 Many event specifiers for Intel P4 PMCs need to be additionally
131 qualified using a mask qualifier.
132 The allowed syntax for these qualifiers is event specific and is
133 described along with the events.
135 Configure the PMC to count when the CPL of the processor is 0.
137 Select precise event based sampling.
138 Precise sampling is supported by the hardware for a limited set of
140 .It Li tag= Ns Ar value
141 Configure the PMC to tag the internal uop selected by the other
142 fields in this event specifier with value
144 This feature is used when cascading PMCs.
145 .It Li threshold= Ns Ar value
146 Configure the PMC to increment only when the event counts seen are
147 greater than the specified threshold value
150 Configure the PMC to count when the CPL of the processor is 1, 2 or 3.
157 qualifiers are specified, the default is to enable both.
159 On Intel Pentium 4 processors with HTT, events are
160 divided into two classes:
162 .Bl -tag -width indent -compact
164 are those where hardware can differentiate between events
165 generated on one logical processor from those generated on the
168 are those where hardware cannot differentiate between events
169 generated by multiple logical processors in a package.
172 Only TS events are allowed for use with process-mode PMCs on
175 The event specifiers supported by Intel P4 PMCs are:
176 .Bl -tag -width indent
177 .It Li p4-128bit-mmx-uop Op Li ,mask= Ns Ar flags
179 Count integer SIMD SSE2 instructions that operate on 128 bit SIMD
183 can take the following value (which is also the default):
185 .Bl -tag -width indent -compact
187 Count all uops operating on 128 bit SIMD integer operands in memory or
191 If an instruction contains more than one 128 bit MMX uop, then each
193 .It Li p4-64bit-mmx-uop Op Li ,mask= Ns Ar flags
195 Count MMX instructions that operate on 64 bit SIMD operands.
198 can take the following value (which is also the default):
200 .Bl -tag -width indent -compact
202 Count all uops operating on 64 bit SIMD integer operands in memory or
206 If an instruction contains more than one 64 bit MMX uop, then each
210 Count back-to-back bus cycles.
211 Further documentation for this event is unavailable.
214 Count bus-not-ready conditions.
215 Further documentation for this event is unavailable.
216 .It Li p4-bpu-fetch-request Op Li ,mask= Ns Ar qualifier
218 Count instruction fetch requests qualified by additional
221 At this point only one flag is supported:
223 .Bl -tag -width indent -compact
225 Count trace cache lookup misses.
228 The default qualifier is also
230 .It Li p4-branch-retired Op Li ,mask= Ns Ar flags
232 Counts retired branches.
235 is a list of the following
239 .Bl -tag -width indent -compact
241 Count branches not-taken and predicted.
243 Count branches not-taken and mis-predicted.
245 Count branches taken and predicted.
247 Count branches taken and mis-predicted.
250 The default qualifier counts all four kinds of branches.
251 .It Li p4-bsq-active-entries Op Li ,mask= Ns Ar qualifier
253 Count the number of entries (clipped at 15) currently active in the
259 separated set of the following flags:
261 .Bl -tag -width indent -compact
262 .It Li req-type0 , Li req-type1
263 Forms a 2-bit number used to select the request type encoding:
265 .Bl -tag -width indent -compact
267 reads excluding read invalidate
271 writes other than writebacks
278 is the MSB for this two bit number.
279 .It Li req-len0 , Li req-len1
280 Forms a two-bit number that specifies the request length encoding:
282 .Bl -tag -width indent -compact
293 is the MSB for this two bit number.
295 Count requests that are input or output requests.
297 Count requests that lock the bus.
298 .It Li req-lock-cache
299 Count requests that lock the cache.
300 .It Li req-split-type
301 Count requests that is a bus 8-byte chunk that is split across an
304 Count requests that are demand (not prefetches) if set.
305 Count requests that are prefetches if not set.
307 Count requests that are ordered.
308 .It Li mem-type0 , Li mem-type1 , Li mem-type2
309 Forms a 3-bit number that specifies a memory type encoding:
311 .Bl -tag -width indent -compact
326 is the MSB of this 3-bit number.
329 The default qualifier has all the above bits set.
331 Edge triggering using the
333 qualifier should not be used with this event when counting cycles.
334 .It Li p4-bsq-allocation Op Li ,mask= Ns Ar qualifier
336 Count allocations in the bus sequence unit according to the flags
341 separated set of the following flags:
343 .Bl -tag -width indent -compact
344 .It Li req-type0 , Li req-type1
345 Forms a 2-bit number used to select the request type encoding:
347 .Bl -tag -width indent -compact
349 reads excluding read invalidate
353 writes other than writebacks
360 is the MSB for this two bit number.
361 .It Li req-len0 , Li req-len1
362 Forms a two-bit number that specifies the request length encoding:
364 .Bl -tag -width indent -compact
375 is the MSB for this two bit number.
377 Count requests that are input or output requests.
379 Count requests that lock the bus.
380 .It Li req-lock-cache
381 Count requests that lock the cache.
382 .It Li req-split-type
383 Count requests that is a bus 8-byte chunk that is split across an
386 Count requests that are demand (not prefetches) if set.
387 Count requests that are prefetches if not set.
389 Count requests that are ordered.
390 .It Li mem-type0 , Li mem-type1 , Li mem-type2
391 Forms a 3-bit number that specifies a memory type encoding:
393 .Bl -tag -width indent -compact
408 is the MSB of this 3-bit number.
411 The default qualifier has all the above bits set.
413 This event is usually used along with the
415 qualifier to avoid multiple counting.
416 .It Li p4-bsq-cache-reference Op Li ,mask= Ns Ar qualifier
418 Count cache references as seen by the bus unit (2nd or 3rd level
424 separated list of the following keywords:
426 .Bl -tag -width indent -compact
428 Count 2nd level cache hits in the shared state.
430 Count 2nd level cache hits in the exclusive state.
432 Count 2nd level cache hits in the modified state.
434 Count 3rd level cache hits in the shared state.
436 Count 3rd level cache hits in the exclusive state.
438 Count 3rd level cache hits in the modified state.
440 Count 2nd level cache misses.
442 Count 3rd level cache misses.
444 Count write-back lookups from the data access cache that miss the 2nd
448 The default is to count all the above events.
449 .It Li p4-execution-event Op Li ,mask= Ns Ar flags
451 Count the retirement of tagged uops selected through the execution
455 can contain the following strings separated by
459 .Bl -tag -width indent -compact
460 .It Li nbogus0 , Li nbogus1 , Li nbogus2 , Li nbogus3
461 The marked uops are not bogus.
462 .It Li bogus0 , Li bogus1 , Li bogus2 , Li bogus3
463 The marked uops are bogus.
466 This event requires additional (upstream) events to be allocated to
467 perform the desired uop tagging.
468 The default is to set all the above flags.
469 This event can be used for precise event based sampling.
470 .It Li p4-front-end-event Op Li ,mask= Ns Ar flags
472 Count the retirement of tagged uops selected through the front-end
476 can contain the following strings separated by
480 .Bl -tag -width indent -compact
482 The marked uops are not bogus.
484 The marked uops are bogus.
487 This event requires additional (upstream) events to be allocated to
488 perform the desired uop tagging.
489 The default is to select both kinds of events.
490 This event can be used for precise event based sampling.
491 .It Li p4-fsb-data-activity Op Li ,mask= Ns Ar flags
493 Count each DBSY or DRDY event selected by qualifier
499 separated set of the following flags:
501 .Bl -tag -width indent -compact
503 Count when this processor is driving data onto the bus.
505 Count when this processor is reading data from the bus.
507 Count when data is on the bus but not being sampled by this processor.
509 Count when this processor reserves the bus for use in the next cycle
510 in order to drive data.
512 Count when some agent reserves the bus for use in the next bus cycle
513 to drive data that this processor will sample.
515 Count when some agent reserves the bus for use in the next bus cycle
516 to drive data that this processor will not sample.
523 are mutually exclusive.
528 are mutually exclusive.
529 The default value for
532 .Dq Li drdy-drv+drdy-own+dbsy-drv+dbsy-own .
533 .It Li p4-global-power-events Op Li ,mask= Ns Ar flags
535 Count cycles during which the processor is not stopped.
538 can take the following value (which is also the default):
540 .Bl -tag -width indent -compact
542 Count cycles when the processor is active.
545 .It Li p4-instr-retired Op Li ,mask= Ns Ar flags
547 Count instructions retired during a clock cycle.
550 comprises of the following strings separated by
554 .Bl -tag -width indent -compact
556 Count non-bogus instructions that are not tagged.
558 Count non-bogus instructions that are tagged.
560 Count bogus instructions that are not tagged.
562 Count bogus instructions that are tagged.
565 The default qualifier counts all the above kinds of instructions.
566 .It Li p4-ioq-active-entries Xo
567 .Op Li ,mask= Ns Ar qualifier
568 .Op Li ,busreqtype= Ns Ar req-type
571 Count the number of entries (clipped at 15) in the IOQ that are
573 The event masks are specified by qualifier
582 separated set of the following flags:
584 .Bl -tag -width indent -compact
590 Count entries accessing un-cacheable memory.
592 Count entries accessing write-combining memory.
594 Count entries accessing write-through memory.
596 Count entries accessing write-protected memory
598 Count entries accessing write-back memory.
600 Count store requests driven by the processor (i.e., not by other
601 processors or by DMA).
603 Count store requests driven by other processors or by DMA.
605 Include hardware and software prefetch requests in the count.
608 The default value for
610 is to enable all the above flags.
614 qualifier is a 5-bit number can be additionally used to select a
615 specific bus request type.
620 qualifier should not be used when counting cycles with this event.
621 The exact behavior of this event depends on the processor revision.
622 .It Li p4-ioq-allocation Xo
623 .Op Li ,mask= Ns Ar qualifier
624 .Op Li ,busreqtype= Ns Ar req-type
627 Count various types of transactions on the bus matching the flags set
637 separated set of the following flags:
639 .Bl -tag -width indent -compact
645 Count entries accessing un-cacheable memory.
647 Count entries accessing write-combining memory.
649 Count entries accessing write-through memory.
651 Count entries accessing write-protected memory
653 Count entries accessing write-back memory.
655 Count store requests driven by the processor (i.e., not by other
656 processors or by DMA).
658 Count store requests driven by other processors or by DMA.
660 Include hardware and software prefetch requests in the count.
663 The default value for
665 is to enable all the above flags.
669 qualifier is a 5-bit number can be additionally used to select a
670 specific bus request type.
675 qualifier is normally used with this event to prevent multiple
677 The exact behavior of this event depends on the processor revision.
678 .It Li p4-itlb-reference Op mask= Ns Ar qualifier
680 Count translations using the instruction translation look-aside
684 argument is a list of the following strings separated by
688 .Bl -tag -width indent -compact
694 Count un-cacheable ITLB hits.
699 is specified the default is to count all the three kinds of ITLB
701 .It Li p4-load-port-replay Op Li ,mask= Ns Ar qualifier
703 Count replayed events at the load port.
706 can take on one value:
708 .Bl -tag -width indent -compact
713 The default value for
717 .It Li p4-mispred-branch-retired Op Li ,mask= Ns Ar flags
719 Count mispredicted IA-32 branch instructions.
722 can take the following value (which is also the default):
724 .Bl -tag -width indent -compact
726 Count non-bogus retired branch instructions.
728 .It Li p4-machine-clear Op Li ,mask= Ns Ar flags
730 Count the number of pipeline clears seen by the processor.
733 is a list of the following strings separated by
737 .Bl -tag -width indent -compact
739 Count for a portion of the many cycles when the machine is being
740 cleared for any reason.
742 Count machine clears due to memory ordering issues.
744 Count machine clears due to self-modifying code.
749 to get a count of occurrences of machine clears.
750 The default qualifier is
752 .It Li p4-memory-cancel Op Li ,mask= Ns Ar event-list
754 Count the canceling of various kinds of requests in the data cache
755 address control unit of the CPU.
758 is a list of the following strings separated by
762 .Bl -tag -width indent -compact
764 Requests cancelled because no store request buffer was available.
766 Requests that conflict due to 64K aliasing.
771 is not specified, then the default is to count both kinds of events.
772 .It Li p4-memory-complete Op Li ,mask= Ns Ar event-list
774 Count the completion of load split, store split, un-cacheable split and
775 un-cacheable load operations selected by qualifier
781 separated list of the following flags:
783 .Bl -tag -width indent -compact
785 Count load splits completed, excluding loads from un-cacheable or
786 write-combining areas.
788 Count any split stores completed.
791 The default is to count both kinds of operations.
792 .It Li p4-mob-load-replay Op Li ,mask= Ns Ar qualifier
794 Count load replays triggered by the memory order buffer.
799 separated list of the following flags:
801 .Bl -tag -width indent -compact
803 Count replays because of unknown store addresses.
805 Count replays because of unknown store data.
807 Count replays because of partially overlapped data accesses between
808 load and store operations.
810 Count replays because of mismatches in the lower 4 bits of load and
814 The default qualifier is
815 .Ar no-sta+no-std+partial-data+unalgn-addr .
816 .It Li p4-packed-dp-uop Op Li ,mask= Ns Ar flags
818 Count packed double-precision uops.
821 can take the following value (which is also the default):
823 .Bl -tag -width indent -compact
825 Count all uops operating on packed double-precision operands.
827 .It Li p4-packed-sp-uop Op Li ,mask= Ns Ar flags
829 Count packed single-precision uops.
832 can take the following value (which is also the default):
834 .Bl -tag -width indent -compact
836 Count all uops operating on packed single-precision operands.
838 .It Li p4-page-walk-type Op Li ,mask= Ns Ar qualifier
840 Count page walks performed by the page miss handler.
845 separated list of the following keywords:
847 .Bl -tag -width indent -compact
849 Count page walks for data TLB misses.
851 Count page walks for instruction TLB misses.
854 The default value for
857 .Dq Li dtmiss+itmiss .
858 .It Li p4-replay-event Op Li ,mask= Ns Ar flags
860 Count the retirement of tagged uops selected through the replay
866 separated set of the following strings:
868 .Bl -tag -width indent -compact
870 The marked uops are not bogus.
872 The marked uops are bogus.
875 This event requires additional (upstream) events to be allocated to
876 perform the desired uop tagging.
877 The default qualifier counts both kinds of uops.
878 This event can be used for precise event based sampling.
879 .It Li p4-resource-stall Op Li ,mask= Ns Ar flags
881 Count the occurrence or latency of stalls in the allocator.
884 can take the following value (which is also the default):
886 .Bl -tag -width indent -compact
888 A stall due to the lack of store buffers.
892 Count different types of responses.
893 Further documentation on this event is not available.
894 .It Li p4-retired-branch-type Op Li ,mask= Ns Ar flags
896 Count branches retired.
901 separated list of strings:
903 .Bl -tag -width indent -compact
905 Count conditional jumps.
907 Count direct and indirect call branches.
909 Count return branches.
911 Count returns, indirect calls or indirect jumps.
914 The default qualifier counts all the above branch types.
915 .It Li p4-retired-mispred-branch-type Op Li ,mask= Ns Ar flags
917 Count mispredicted branches retired.
922 separated list of strings:
924 .Bl -tag -width indent -compact
926 Count conditional jumps.
928 Count indirect call branches.
930 Count return branches.
932 Count returns, indirect calls or indirect jumps.
935 The default qualifier counts all the above branch types.
936 .It Li p4-scalar-dp-uop Op Li ,mask= Ns Ar flags
938 Count the number of scalar double-precision uops.
941 can take the following value (which is also the default):
943 .Bl -tag -width indent -compact
945 Count the number of scalar double-precision uops.
947 .It Li p4-scalar-sp-uop Op Li ,mask= Ns Ar flags
949 Count the number of scalar single-precision uops.
952 can take the following value (which is also the default):
954 .Bl -tag -width indent -compact
956 Count all uops operating on scalar single-precision operands.
961 Further documentation on this event is not available.
962 .It Li p4-sse-input-assist Op Li ,mask= Ns Ar flags
964 Count the number of times an assist is required to handle problems
965 with the operands for SSE and SSE2 operations.
968 can take the following value (which is also the default):
970 .Bl -tag -width indent -compact
972 Count assists for all SSE and SSE2 uops.
974 .It Li p4-store-port-replay Op Li ,mask= Ns Ar qualifier
976 Count events replayed at the store port.
979 can take on one value:
981 .Bl -tag -width indent -compact
986 The default value for
990 .It Li p4-tc-deliver-mode Op Li ,mask= Ns Ar qualifier
992 Count the duration in cycles of operating modes of the trace cache and
994 The desired operating mode is selected by
996 which is a list of the following strings separated by
1000 .Bl -tag -width indent -compact
1002 Both logical processors are in deliver mode.
1004 Logical processor 0 is in deliver mode while logical processor 1 is in
1007 Logical processor 0 is in deliver mode while logical processor 1 is
1008 halted, or in machine clear, or transitioning to a long microcode
1011 Logical processor 0 is in build mode while logical processor 1 is in
1014 Both logical processors are in build mode.
1016 Logical processor 0 is in build mode while logical processor 1 is
1017 halted, or in machine clear or transitioning to a long microcode
1020 Logical processor 0 is halted, or in machine clear or transitioning to
1021 a long microcode flow while logical processor 1 is in deliver mode.
1023 Logical processor 0 is halted, or in machine clear or transitioning to
1024 a long microcode flow while logical processor 1 is in build mode.
1027 If there is only one logical processor in the processor package then
1028 the qualifier for logical processor 1 is ignored.
1029 If no qualifier is specified, the default qualifier is
1030 .Dq Li DD+DB+DI+BD+BB+BI+ID+IB .
1031 .It Li p4-tc-ms-xfer Op Li ,mask= Ns Ar flags
1033 Count the number of times uop delivery changed from the trace cache to
1037 can take the following value (which is also the default):
1039 .Bl -tag -width indent -compact
1041 Count TC to MS transfers.
1043 .It Li p4-uop-queue-writes Op Li ,mask= Ns Ar flags
1045 Count the number of valid uops written to the uop queue.
1048 is a list of the following strings, separated by
1052 .Bl -tag -width indent -compact
1053 .It Li from-tc-build
1054 Count uops being written from the trace cache in build mode.
1055 .It Li from-tc-deliver
1056 Count uops being written from the trace cache in deliver mode.
1058 Count uops being written from microcode ROM.
1061 The default qualifier counts all the above kinds of uops.
1062 .It Li p4-uop-type Op Li ,mask= Ns Ar flags
1064 This event is used in conjunction with the front-end at-retirement
1065 mechanism to tag load and store uops.
1068 comprises the following strings separated by
1072 .Bl -tag -width indent -compact
1074 Mark uops that are load operations.
1076 Mark uops that are store operations.
1079 The default qualifier counts both kinds of uops.
1080 .It Li p4-uops-retired Op Li ,mask= Ns Ar flags
1082 Count uops retired during a clock cycle.
1085 comprises the following strings separated by
1089 .Bl -tag -width indent -compact
1091 Count marked uops that are not bogus.
1093 Count marked uops that are bogus.
1096 The default qualifier counts both kinds of uops.
1097 .It Li p4-wc-buffer Op Li ,mask= Ns Ar flags
1099 Count write-combining buffer operations.
1102 contains the following strings separated by
1106 .Bl -tag -width indent -compact
1108 WC buffer evictions due to any cause.
1109 .It Li wcb-full-evict
1110 WC buffer evictions due to no WC buffer being available.
1113 The default qualifier counts both kinds of evictions.
1114 .It Li p4-x87-assist Op Li ,mask= Ns Ar flags
1116 Count the retirement of x87 instructions that required special
1120 contains the following strings separated by
1124 .Bl -tag -width indent -compact
1126 Count instructions that saw an FP stack underflow.
1128 Count instructions that saw an FP stack overflow.
1130 Count instructions that saw an x87 output overflow.
1132 Count instructions that saw an x87 output underflow.
1134 Count instructions that needed an x87 input assist.
1137 The default qualifier counts all the above types of instruction
1139 .It Li p4-x87-fp-uop Op Li ,mask= Ns Ar flags
1141 Count x87 floating-point uops.
1144 can take the following value (which is also the default):
1146 .Bl -tag -width indent -compact
1148 Count all x87 floating-point uops.
1151 If an instruction contains more than one x87 floating-point uops, then
1152 all x87 floating-point uops will be counted.
1153 This event does not count x87 floating-point data movement operations.
1154 .It Li p4-x87-simd-moves-uop Op Li ,mask= Ns Ar flags
1156 Count each x87 FPU, MMX, SSE, or SSE2 uops that load data or store
1157 data or perform register-to-register moves.
1158 This event does not count integer move uops.
1161 may contain the following keywords separated by
1165 .Bl -tag -width indent -compact
1167 Count all x87 and SIMD store and move uops.
1169 Count all x87 and SIMD load uops.
1172 The default is to count all uops.
1174 This event may be affected by processor errata N43.
1176 .Ss "Cascading P4 PMCs"
1177 PMC cascading support is currently poorly implemented.
1178 While individual event counters may be allocated with a
1180 qualifier, the current API does not offer the ability
1181 to name and allocate all the resources needed for a
1182 cascaded event counter pair in a single operation.
1183 .Ss "Precise Event Based Sampling"
1184 Support for precise event based sampling is currently
1186 .Ss Event Name Aliases
1187 The following table shows the mapping between the PMC-independent
1188 aliases supported by
1190 and the underlying hardware events used.
1191 .Bl -column "branch-mispredicts" "Description"
1192 .It Em Alias Ta Em Event
1193 .It Li branches Ta Li p4-branch-retired,mask=mmtp+mmtm
1194 .It Li branch-mispredicts Ta Li p4-mispred-branch-retired
1195 .It Li dc-misses Ta (unsupported)
1196 .It Li ic-misses Ta (unsupported)
1197 .It Li instructions Ta Li p4-instr-retired,mask=nbogusntag+nbogustag
1198 .It Li interrupts Ta Li (unsupported)
1199 .It Li unhalted-cycles Ta Li p4-global-power-events
1218 library first appeared in
1223 library was written by
1225 .Aq jkoshy@FreeBSD.org .
projects / FreeBSD / releng / 10.2.git / blob