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35 .Nm atomic_readandclear ,
44 .Fn atomic_add_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
46 .Fn atomic_clear_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
48 .Fo atomic_cmpset_[acq_|rel_]<type>
49 .Fa "volatile <type> *dst"
54 .Fn atomic_fetchadd_<type> "volatile <type> *p" "<type> v"
56 .Fn atomic_load_acq_<type> "volatile <type> *p"
58 .Fn atomic_readandclear_<type> "volatile <type> *p"
60 .Fn atomic_set_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
62 .Fn atomic_subtract_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
64 .Fn atomic_store_rel_<type> "volatile <type> *p" "<type> v"
66 .Fn atomic_swap_<type> "volatile <type> *p" "<type> v"
68 .Fn atomic_testandset_<type> "volatile <type> *p" "u_int v"
70 Each of the atomic operations is guaranteed to be atomic in the presence of
72 They can be used to implement reference counts or as building blocks for more
73 advanced synchronization primitives such as mutexes.
75 Each atomic operation operates on a specific
77 The type to use is indicated in the function name.
78 The available types that can be used are:
80 .Bl -tag -offset indent -width short -compact
86 unsigned integer the size of a pointer
88 unsigned 32-bit integer
90 unsigned 64-bit integer
93 For example, the function to atomically add two integers is called
96 Certain architectures also provide operations for types smaller than
99 .Bl -tag -offset indent -width short -compact
103 unsigned short integer
105 unsigned 8-bit integer
107 unsigned 16-bit integer
110 These must not be used in MI code because the instructions to implement them
111 efficiently may not be available.
113 Memory barriers are used to guarantee the order of data accesses in
115 First, they specify hints to the compiler to not re-order or optimize the
117 Second, on architectures that do not guarantee ordered data accesses,
118 special instructions or special variants of instructions are used to indicate
119 to the processor that data accesses need to occur in a certain order.
120 As a result, most of the atomic operations have three variants in order to
121 include optional memory barriers.
122 The first form just performs the operation without any explicit barriers.
123 The second form uses a read memory barrier, and the third variant uses a write
126 The second variant of each operation includes an
129 This barrier ensures that the effects of this operation are completed before the
130 effects of any later data accesses.
131 As a result, the operation is said to have acquire semantics as it acquires a
132 pseudo-lock requiring further operations to wait until it has completed.
133 To denote this, the suffix
135 is inserted into the function name immediately prior to the
136 .Dq Li _ Ns Aq Fa type
138 For example, to subtract two integers ensuring that any later writes will
139 happen after the subtraction is performed, use
140 .Fn atomic_subtract_acq_int .
142 The third variant of each operation includes a
145 This ensures that all effects of all previous data accesses are completed
146 before this operation takes place.
147 As a result, the operation is said to have release semantics as it releases
148 any pending data accesses to be completed before its operation is performed.
149 To denote this, the suffix
151 is inserted into the function name immediately prior to the
152 .Dq Li _ Ns Aq Fa type
154 For example, to add two long integers ensuring that all previous
155 writes will happen first, use
156 .Fn atomic_add_rel_long .
158 A practical example of using memory barriers is to ensure that data accesses
159 that are protected by a lock are all performed while the lock is held.
160 To achieve this, one would use a read barrier when acquiring the lock to
161 guarantee that the lock is held before any protected operations are performed.
162 Finally, one would use a write barrier when releasing the lock to ensure that
163 all of the protected operations are completed before the lock is released.
164 .Ss Multiple Processors
165 The current set of atomic operations do not necessarily guarantee atomicity
166 across multiple processors.
167 To guarantee atomicity across processors, not only does the individual
168 operation need to be atomic on the processor performing the operation, but
169 the result of the operation needs to be pushed out to stable storage and the
170 caches of all other processors on the system need to invalidate any cache
171 lines that include the affected memory region.
174 architecture, the cache coherency model requires that the hardware perform
175 this task, thus the atomic operations are atomic across multiple processors.
178 architecture, coherency is only guaranteed for pages that are configured to
179 using a caching policy of either uncached or write back.
181 This section describes the semantics of each operation using a C like notation.
183 .It Fn atomic_add p v
184 .Bd -literal -compact
187 .It Fn atomic_clear p v
188 .Bd -literal -compact
191 .It Fn atomic_cmpset dst old new
192 .Bd -literal -compact
203 functions are not implemented for the types
210 .It Fn atomic_fetchadd p v
211 .Bd -literal -compact
220 functions are only implemented for the types
225 and do not have any variants with memory barriers at this time.
228 .Bd -literal -compact
235 functions are only provided with acquire memory barriers.
237 .It Fn atomic_readandclear p
238 .Bd -literal -compact
246 .Fn atomic_readandclear
247 functions are not implemented for the types
254 and do not have any variants with memory barriers at this time.
256 .It Fn atomic_set p v
257 .Bd -literal -compact
260 .It Fn atomic_subtract p v
261 .Bd -literal -compact
264 .It Fn atomic_store p v
265 .Bd -literal -compact
272 functions are only provided with release memory barriers.
274 .It Fn atomic_swap p v
275 .Bd -literal -compact
284 functions are not implemented for the types
291 and do not have any variants with memory barriers at this time.
293 .It Fn atomic_testandset p v
294 .Bd -literal -compact
295 bit = 1 << (v % (sizeof(*p) * NBBY));
296 tmp = (*p & bit) != 0;
303 .Fn atomic_testandset
304 functions are only implemented for the types
309 and do not have any variants with memory barriers at this time.
313 is currently not implemented for any of the atomic operations on the
322 function returns the result of the compare operation.
324 .Fn atomic_fetchadd ,
326 .Fn atomic_readandclear ,
329 functions return the value at the specified address.
331 .Fn atomic_testandset
332 function returns the result of the test operation.
334 This example uses the
335 .Fn atomic_cmpset_acq_ptr
338 functions to obtain a sleep mutex and handle recursion.
347 /* Try to obtain mtx_lock once. */
348 #define _obtain_lock(mp, tid) \\
349 atomic_cmpset_acq_ptr(&(mp)->mtx_lock, MTX_UNOWNED, (tid))
351 /* Get a sleep lock, deal with recursion inline. */
352 #define _get_sleep_lock(mp, tid, opts, file, line) do { \\
353 uintptr_t _tid = (uintptr_t)(tid); \\
355 if (!_obtain_lock(mp, tid)) { \\
356 if (((mp)->mtx_lock & MTX_FLAGMASK) != _tid) \\
357 _mtx_lock_sleep((mp), _tid, (opts), (file), (line));\\
359 atomic_set_ptr(&(mp)->mtx_lock, MTX_RECURSE); \\
360 (mp)->mtx_recurse++; \\
372 operations were first introduced in
374 This first set only supported the types
383 .Fn atomic_readandclear ,
386 operations were added in
395 and all of the acquire and release variants
401 operations were added in
406 .Fn atomic_testandset
407 operations were added in