2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <arm/at91/at91reg.h>
38 bus_space_tag_t sc_st;
39 bus_space_handle_t sc_sh;
40 bus_space_handle_t sc_aic_sh;
41 struct rman sc_irq_rman;
42 struct rman sc_mem_rman;
46 struct resource_list resources;
58 const char *parent_clk;
76 enum at91_soc_subtype {
77 AT91_ST_ANY = -1, /* Match any type */
97 enum at91_soc_family {
98 AT91_FAMILY_SAM9 = 0x19,
99 AT91_FAMILY_SAM9XE = 0x29,
100 AT91_FAMILY_RM92 = 0x92,
103 #define AT91_SOC_NAME_MAX 50
105 typedef void (*DELAY_t)(int);
106 typedef void (*cpu_reset_t)(void);
107 typedef void (*clk_init_t)(void);
109 struct at91_soc_data {
110 DELAY_t soc_delay; /* SoC specific delay function */
111 cpu_reset_t soc_reset; /* SoC specific reset function */
112 clk_init_t soc_clock_init; /* SoC specific clock init function */
113 const int *soc_irq_prio; /* SoC specific IRQ priorities */
114 const struct cpu_devs *soc_children; /* SoC specific children list */
115 const uint32_t *soc_pio_base; /* SoC specific PIO base registers */
116 size_t soc_pio_count; /* Count of PIO units (not pins) in SoC */
119 struct at91_soc_info {
120 enum at91_soc_type type;
121 enum at91_soc_subtype subtype;
122 enum at91_soc_family family;
125 char name[AT91_SOC_NAME_MAX];
127 struct at91_soc_data *soc_data;
130 extern struct at91_soc_info soc_info;
132 static inline int at91_is_rm92(void);
133 static inline int at91_is_sam9(void);
134 static inline int at91_is_sam9xe(void);
135 static inline int at91_cpu_is(u_int cpu);
141 return (soc_info.type == AT91_T_RM9200);
148 return (soc_info.family == AT91_FAMILY_SAM9);
155 return (soc_info.family == AT91_FAMILY_SAM9XE);
159 at91_cpu_is(u_int cpu)
162 return (soc_info.type == cpu);
165 void at91_add_child(device_t dev, int prio, const char *name, int unit,
166 bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2);
168 extern uint32_t at91_irq_system;
169 extern uint32_t at91_master_clock;
170 void at91_pmc_init_clock(void);
172 #endif /* _AT91VAR_H_ */