2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #define CCM_CACCR 0x010
33 #define CCM_CSCMR1 0x01C
34 #define SSI1_CLK_SEL_S 10
35 #define SSI2_CLK_SEL_S 12
36 #define SSI3_CLK_SEL_S 14
37 #define SSI_CLK_SEL_M 0x3
38 #define SSI_CLK_SEL_508_PFD 0
39 #define SSI_CLK_SEL_454_PFD 1
40 #define SSI_CLK_SEL_PLL4 2
41 #define CCM_CSCMR2 0x020
42 #define CCM_CS1CDR 0x028
43 #define SSI1_CLK_PODF_SHIFT 0
44 #define SSI1_CLK_PRED_SHIFT 6
45 #define SSI3_CLK_PODF_SHIFT 16
46 #define SSI3_CLK_PRED_SHIFT 22
47 #define SSI_CLK_PODF_MASK 0x3f
48 #define SSI_CLK_PRED_MASK 0x7
49 #define CCM_CS2CDR 0x02C
50 #define SSI2_CLK_PODF_SHIFT 0
51 #define SSI2_CLK_PRED_SHIFT 6
52 #define CCM_CSCDR2 0x038
53 #define CCM_CLPCR 0x054
54 #define CCM_CLPCR_LPM_MASK 0x03
55 #define CCM_CLPCR_LPM_RUN 0x00
56 #define CCM_CLPCR_LPM_WAIT 0x01
57 #define CCM_CLPCR_LPM_STOP 0x02
58 #define CCM_CGPR 0x064
59 #define CCM_CGPR_INT_MEM_CLK_LPM (1 << 17)
60 #define CCM_CCGR0 0x068
61 #define CCM_CCGR1 0x06C
62 #define CCM_CCGR2 0x070
63 #define CCM_CCGR3 0x074
64 #define CCM_CCGR4 0x078
65 #define CCM_CCGR5 0x07C
66 #define CCM_CCGR6 0x080
67 #define CCM_CMEOR 0x088