3 * Ben Gray <ben.r.gray@gmail.com>.
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15 * must display the following acknowledgement:
16 * This product includes software developed by Ben Gray.
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34 * SCM - System Control Module
36 * Hopefully in the end this module will contain a bunch of utility functions
37 * for configuring and querying the general system control registers, but for
38 * now it only does pin(pad) multiplexing.
40 * This is different from the GPIO module in that it is used to configure the
41 * pins between modules not just GPIO input/output.
43 * This file contains the generic top level driver, however it relies on chip
44 * specific settings and therefore expects an array of ti_scm_padconf structs
45 * call ti_padconf_devmap to be located somewhere in the kernel.
48 #include <sys/cdefs.h>
49 __FBSDID("$FreeBSD$");
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/kernel.h>
54 #include <sys/module.h>
56 #include <sys/resource.h>
59 #include <sys/mutex.h>
61 #include <machine/bus.h>
62 #include <machine/cpu.h>
63 #include <machine/cpufunc.h>
64 #include <machine/resource.h>
66 #include <dev/fdt/fdt_common.h>
67 #include <dev/ofw/openfirm.h>
68 #include <dev/ofw/ofw_bus.h>
69 #include <dev/ofw/ofw_bus_subr.h>
73 static struct resource_spec ti_scm_res_spec[] = {
74 { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */
78 static struct ti_scm_softc *ti_scm_sc;
80 #define ti_scm_read_2(sc, reg) \
81 bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg))
82 #define ti_scm_write_2(sc, reg, val) \
83 bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
84 #define ti_scm_read_4(sc, reg) \
85 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
86 #define ti_scm_write_4(sc, reg, val) \
87 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
91 * ti_padconf_devmap - Array of pins, should be defined one per SoC
93 * This array is typically defined in one of the targeted *_scm_pinumx.c
94 * files and is specific to the given SoC platform. Each entry in the array
95 * corresponds to an individual pin.
97 extern const struct ti_scm_device ti_scm_dev;
101 * ti_scm_padconf_from_name - searches the list of pads and returns entry
102 * with matching ball name.
103 * @ballname: the name of the ball
106 * A pointer to the matching padconf or NULL if the ball wasn't found.
108 static const struct ti_scm_padconf*
109 ti_scm_padconf_from_name(const char *ballname)
111 const struct ti_scm_padconf *padconf;
113 padconf = ti_scm_dev.padconf;
114 while (padconf->ballname != NULL) {
115 if (strcmp(ballname, padconf->ballname) == 0)
124 * ti_scm_padconf_set_internal - sets the muxmode and state for a pad/pin
125 * @padconf: pointer to the pad structure
126 * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx"
127 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???
131 * Internally locks it's own context.
135 * EINVAL if pin requested is outside valid range or already in use.
138 ti_scm_padconf_set_internal(struct ti_scm_softc *sc,
139 const struct ti_scm_padconf *padconf,
140 const char *muxmode, unsigned int state)
145 /* populate the new value for the PADCONF register */
146 reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask);
148 /* find the new mode requested */
149 for (mode = 0; mode < 8; mode++) {
150 if ((padconf->muxmodes[mode] != NULL) &&
151 (strcmp(padconf->muxmodes[mode], muxmode) == 0)) {
156 /* couldn't find the mux mode */
158 printf("Invalid mode \"%s\"\n", muxmode);
162 /* set the mux mode */
163 reg_val |= (uint16_t)(mode & ti_scm_dev.padconf_muxmode_mask);
166 device_printf(sc->sc_dev, "setting internal %x for %s\n",
168 /* write the register value (16-bit writes) */
169 ti_scm_write_2(sc, padconf->reg_off, reg_val);
175 * ti_scm_padconf_set - sets the muxmode and state for a pad/pin
176 * @padname: the name of the pad, i.e. "c12"
177 * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx"
178 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???
182 * Internally locks it's own context.
186 * EINVAL if pin requested is outside valid range or already in use.
189 ti_scm_padconf_set(const char *padname, const char *muxmode, unsigned int state)
191 const struct ti_scm_padconf *padconf;
196 /* find the pin in the devmap */
197 padconf = ti_scm_padconf_from_name(padname);
201 return (ti_scm_padconf_set_internal(ti_scm_sc, padconf, muxmode, state));
205 * ti_scm_padconf_get - gets the muxmode and state for a pad/pin
206 * @padname: the name of the pad, i.e. "c12"
207 * @muxmode: upon return will contain the name of the muxmode of the pin
208 * @state: upon return will contain the state of the pad/pin
212 * Internally locks it's own context.
216 * EINVAL if pin requested is outside valid range or already in use.
219 ti_scm_padconf_get(const char *padname, const char **muxmode,
222 const struct ti_scm_padconf *padconf;
228 /* find the pin in the devmap */
229 padconf = ti_scm_padconf_from_name(padname);
233 /* read the register value (16-bit reads) */
234 reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off);
238 *state = (reg_val & ti_scm_dev.padconf_sate_mask);
242 *muxmode = padconf->muxmodes[(reg_val & ti_scm_dev.padconf_muxmode_mask)];
248 * ti_scm_padconf_set_gpiomode - converts a pad to GPIO mode.
249 * @gpio: the GPIO pin number (0-195)
250 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???
255 * Internally locks it's own context.
259 * EINVAL if pin requested is outside valid range or already in use.
262 ti_scm_padconf_set_gpiomode(uint32_t gpio, unsigned int state)
264 const struct ti_scm_padconf *padconf;
270 /* find the gpio pin in the padconf array */
271 padconf = ti_scm_dev.padconf;
272 while (padconf->ballname != NULL) {
273 if (padconf->gpio_pin == gpio)
277 if (padconf->ballname == NULL)
280 /* populate the new value for the PADCONF register */
281 reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask);
283 /* set the mux mode */
284 reg_val |= (uint16_t)(padconf->gpio_mode & ti_scm_dev.padconf_muxmode_mask);
286 /* write the register value (16-bit writes) */
287 ti_scm_write_2(ti_scm_sc, padconf->reg_off, reg_val);
293 * ti_scm_padconf_get_gpiomode - gets the current GPIO mode of the pin
294 * @gpio: the GPIO pin number (0-195)
295 * @state: upon return will contain the state
300 * Internally locks it's own context.
304 * EINVAL if pin requested is outside valid range or not configured as GPIO.
307 ti_scm_padconf_get_gpiomode(uint32_t gpio, unsigned int *state)
309 const struct ti_scm_padconf *padconf;
315 /* find the gpio pin in the padconf array */
316 padconf = ti_scm_dev.padconf;
317 while (padconf->ballname != NULL) {
318 if (padconf->gpio_pin == gpio)
322 if (padconf->ballname == NULL)
325 /* read the current register settings */
326 reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off);
328 /* check to make sure the pins is configured as GPIO in the first state */
329 if ((reg_val & ti_scm_dev.padconf_muxmode_mask) != padconf->gpio_mode)
332 /* read and store the reset of the state, i.e. pull-up, pull-down, etc */
334 *state = (reg_val & ti_scm_dev.padconf_sate_mask);
340 * ti_scm_padconf_init_from_hints - processes the hints for padconf
341 * @sc: the driver soft context
346 * Internally locks it's own context.
350 * EINVAL if pin requested is outside valid range or already in use.
353 ti_scm_padconf_init_from_fdt(struct ti_scm_softc *sc)
355 const struct ti_scm_padconf *padconf;
356 const struct ti_scm_padstate *padstates;
360 char *fdt_pad_config;
362 char *padname, *muxname, *padstate;
364 node = ofw_bus_get_node(sc->sc_dev);
365 len = OF_getproplen(node, "scm-pad-config");
366 OF_getprop_alloc(node, "scm-pad-config", 1, (void **)&fdt_pad_config);
370 padname = fdt_pad_config;
371 fdt_pad_config += strlen(padname) + 1;
372 i -= strlen(padname) + 1;
376 muxname = fdt_pad_config;
377 fdt_pad_config += strlen(muxname) + 1;
378 i -= strlen(muxname) + 1;
382 padstate = fdt_pad_config;
383 fdt_pad_config += strlen(padstate) + 1;
384 i -= strlen(padstate) + 1;
388 padconf = ti_scm_dev.padconf;
390 while (padconf->ballname != NULL) {
391 if (strcmp(padconf->ballname, padname) == 0) {
392 padstates = ti_scm_dev.padstate;
394 while (padstates->state != NULL) {
395 if (strcmp(padstates->state, padstate) == 0) {
396 err = ti_scm_padconf_set_internal(sc,
397 padconf, muxname, padstates->reg);
402 device_printf(sc->sc_dev,
403 "err: failed to configure "
404 "pin \"%s\" as \"%s\"\n",
415 * Device part of OMAP SCM driver
419 ti_scm_probe(device_t dev)
422 if (!ofw_bus_status_okay(dev))
425 if (!ofw_bus_is_compatible(dev, "ti,scm"))
428 device_set_desc(dev, "TI Control Module");
429 return (BUS_PROBE_DEFAULT);
433 * ti_scm_attach - attaches the timer to the simplebus
436 * Reserves memory and interrupt resources, stores the softc structure
437 * globally and registers both the timecount and eventtimer objects.
440 * Zero on sucess or ENXIO if an error occuried.
443 ti_scm_attach(device_t dev)
445 struct ti_scm_softc *sc = device_get_softc(dev);
452 if (bus_alloc_resources(dev, ti_scm_res_spec, sc->sc_res)) {
453 device_printf(dev, "could not allocate resources\n");
457 /* Global timer interface */
458 sc->sc_bst = rman_get_bustag(sc->sc_res[0]);
459 sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]);
463 ti_scm_padconf_init_from_fdt(sc);
469 ti_scm_reg_read_4(uint32_t reg, uint32_t *val)
474 *val = ti_scm_read_4(ti_scm_sc, reg);
479 ti_scm_reg_write_4(uint32_t reg, uint32_t val)
484 ti_scm_write_4(ti_scm_sc, reg, val);
489 static device_method_t ti_scm_methods[] = {
490 DEVMETHOD(device_probe, ti_scm_probe),
491 DEVMETHOD(device_attach, ti_scm_attach),
495 static driver_t ti_scm_driver = {
498 sizeof(struct ti_scm_softc),
501 static devclass_t ti_scm_devclass;
503 DRIVER_MODULE(ti_scm, simplebus, ti_scm_driver, ti_scm_devclass, 0, 0);