3 * Ben Gray <ben.r.gray@gmail.com>.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Ben Gray.
17 * 4. The name of the company nor the name of the author may be used to
18 * endorse or promote products derived from this software without specific
19 * prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
30 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 #define OMAP_USBTLL_REVISION 0x0000
42 #define OMAP_USBTLL_SYSCONFIG 0x0010
43 #define OMAP_USBTLL_SYSSTATUS 0x0014
44 #define OMAP_USBTLL_IRQSTATUS 0x0018
45 #define OMAP_USBTLL_IRQENABLE 0x001C
46 #define OMAP_USBTLL_TLL_SHARED_CONF 0x0030
47 #define OMAP_USBTLL_TLL_CHANNEL_CONF(i) (0x0040 + (0x04 * (i)))
48 #define OMAP_USBTLL_SAR_CNTX(i) (0x0400 + (0x04 * (i)))
49 #define OMAP_USBTLL_ULPI_VENDOR_ID_LO(i) (0x0800 + (0x100 * (i)))
50 #define OMAP_USBTLL_ULPI_VENDOR_ID_HI(i) (0x0801 + (0x100 * (i)))
51 #define OMAP_USBTLL_ULPI_PRODUCT_ID_LO(i) (0x0802 + (0x100 * (i)))
52 #define OMAP_USBTLL_ULPI_PRODUCT_ID_HI(i) (0x0803 + (0x100 * (i)))
53 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL(i) (0x0804 + (0x100 * (i)))
54 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL_SET(i) (0x0805 + (0x100 * (i)))
55 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL_CLR(i) (0x0806 + (0x100 * (i)))
56 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL(i) (0x0807 + (0x100 * (i)))
57 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL_SET(i) (0x0808 + (0x100 * (i)))
58 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL_CLR(i) (0x0809 + (0x100 * (i)))
59 #define OMAP_USBTLL_ULPI_OTG_CTRL(i) (0x080A + (0x100 * (i)))
60 #define OMAP_USBTLL_ULPI_OTG_CTRL_SET(i) (0x080B + (0x100 * (i)))
61 #define OMAP_USBTLL_ULPI_OTG_CTRL_CLR(i) (0x080C + (0x100 * (i)))
62 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE(i) (0x080D + (0x100 * (i)))
63 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_SET(i) (0x080E + (0x100 * (i)))
64 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_CLR(i) (0x080F + (0x100 * (i)))
65 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL(i) (0x0810 + (0x100 * (i)))
66 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_SET(i) (0x0811 + (0x100 * (i)))
67 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_CLR(i) (0x0812 + (0x100 * (i)))
68 #define OMAP_USBTLL_ULPI_USB_INT_STATUS(i) (0x0813 + (0x100 * (i)))
69 #define OMAP_USBTLL_ULPI_USB_INT_LATCH(i) (0x0814 + (0x100 * (i)))
70 #define OMAP_USBTLL_ULPI_DEBUG(i) (0x0815 + (0x100 * (i)))
71 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER(i) (0x0816 + (0x100 * (i)))
72 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_SET(i) (0x0817 + (0x100 * (i)))
73 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_CLR(i) (0x0818 + (0x100 * (i)))
74 #define OMAP_USBTLL_ULPI_EXTENDED_SET_ACCESS(i) (0x082F + (0x100 * (i)))
75 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN(i) (0x0830 + (0x100 * (i)))
76 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_SET(i) (0x0831 + (0x100 * (i)))
77 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_CLR(i) (0x0832 + (0x100 * (i)))
78 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_STATUS(i) (0x0833 + (0x100 * (i)))
79 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_LATCH(i) (0x0834 + (0x100 * (i)))
80 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS(i) (0x0835 + (0x100 * (i)))
81 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS_SET(i) (0x0836 + (0x100 * (i)))
82 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS_CLR(i) (0x0837 + (0x100 * (i)))
83 #define OMAP_USBTLL_ULPI_USB_INT_LATCH_NOCLR(i) (0x0838 + (0x100 * (i)))
84 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN(i) (0x083B + (0x100 * (i)))
85 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN_SET(i) (0x083C + (0x100 * (i)))
86 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN_CLR(i) (0x083D + (0x100 * (i)))
87 #define OMAP_USBTLL_ULPI_VENDOR_INT_STATUS(i) (0x083E + (0x100 * (i)))
88 #define OMAP_USBTLL_ULPI_VENDOR_INT_LATCH(i) (0x083F + (0x100 * (i)))
96 #define OMAP_USBHOST_UHH_REVISION 0x0000
97 #define OMAP_USBHOST_UHH_SYSCONFIG 0x0010
98 #define OMAP_USBHOST_UHH_SYSSTATUS 0x0014
99 #define OMAP_USBHOST_UHH_HOSTCONFIG 0x0040
100 #define OMAP_USBHOST_UHH_DEBUG_CSR 0x0044
103 #define OMAP_USBHOST_HCCAPBASE 0x0000
104 #define OMAP_USBHOST_HCSPARAMS 0x0004
105 #define OMAP_USBHOST_HCCPARAMS 0x0008
106 #define OMAP_USBHOST_USBCMD 0x0010
107 #define OMAP_USBHOST_USBSTS 0x0014
108 #define OMAP_USBHOST_USBINTR 0x0018
109 #define OMAP_USBHOST_FRINDEX 0x001C
110 #define OMAP_USBHOST_CTRLDSSEGMENT 0x0020
111 #define OMAP_USBHOST_PERIODICLISTBASE 0x0024
112 #define OMAP_USBHOST_ASYNCLISTADDR 0x0028
113 #define OMAP_USBHOST_CONFIGFLAG 0x0050
114 #define OMAP_USBHOST_PORTSC(i) (0x0054 + (0x04 * (i)))
115 #define OMAP_USBHOST_INSNREG00 0x0090
116 #define OMAP_USBHOST_INSNREG01 0x0094
117 #define OMAP_USBHOST_INSNREG02 0x0098
118 #define OMAP_USBHOST_INSNREG03 0x009C
119 #define OMAP_USBHOST_INSNREG04 0x00A0
120 #define OMAP_USBHOST_INSNREG05_UTMI 0x00A4
121 #define OMAP_USBHOST_INSNREG05_ULPI 0x00A4
122 #define OMAP_USBHOST_INSNREG06 0x00A8
123 #define OMAP_USBHOST_INSNREG07 0x00AC
124 #define OMAP_USBHOST_INSNREG08 0x00B0
126 #define OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND (1 << 5)
128 #define OMAP_USBHOST_INSNREG05_ULPI_CONTROL_SHIFT 31
129 #define OMAP_USBHOST_INSNREG05_ULPI_PORTSEL_SHIFT 24
130 #define OMAP_USBHOST_INSNREG05_ULPI_OPSEL_SHIFT 22
131 #define OMAP_USBHOST_INSNREG05_ULPI_REGADD_SHIFT 16
132 #define OMAP_USBHOST_INSNREG05_ULPI_EXTREGADD_SHIFT 8
133 #define OMAP_USBHOST_INSNREG05_ULPI_WRDATA_SHIFT 0
139 /* TLL Register Set */
140 #define TLL_SYSCONFIG_CACTIVITY (1UL << 8)
141 #define TLL_SYSCONFIG_SIDLE_SMART_IDLE (2UL << 3)
142 #define TLL_SYSCONFIG_SIDLE_NO_IDLE (1UL << 3)
143 #define TLL_SYSCONFIG_SIDLE_FORCED_IDLE (0UL << 3)
144 #define TLL_SYSCONFIG_ENAWAKEUP (1UL << 2)
145 #define TLL_SYSCONFIG_SOFTRESET (1UL << 1)
146 #define TLL_SYSCONFIG_AUTOIDLE (1UL << 0)
148 #define TLL_SYSSTATUS_RESETDONE (1UL << 0)
150 #define TLL_SHARED_CONF_USB_90D_DDR_EN (1UL << 6)
151 #define TLL_SHARED_CONF_USB_180D_SDR_EN (1UL << 5)
152 #define TLL_SHARED_CONF_USB_DIVRATIO_MASK (7UL << 2)
153 #define TLL_SHARED_CONF_USB_DIVRATIO_128 (7UL << 2)
154 #define TLL_SHARED_CONF_USB_DIVRATIO_64 (6UL << 2)
155 #define TLL_SHARED_CONF_USB_DIVRATIO_32 (5UL << 2)
156 #define TLL_SHARED_CONF_USB_DIVRATIO_16 (4UL << 2)
157 #define TLL_SHARED_CONF_USB_DIVRATIO_8 (3UL << 2)
158 #define TLL_SHARED_CONF_USB_DIVRATIO_4 (2UL << 2)
159 #define TLL_SHARED_CONF_USB_DIVRATIO_2 (1UL << 2)
160 #define TLL_SHARED_CONF_USB_DIVRATIO_1 (0UL << 2)
161 #define TLL_SHARED_CONF_FCLK_REQ (1UL << 1)
162 #define TLL_SHARED_CONF_FCLK_IS_ON (1UL << 0)
164 #define TLL_CHANNEL_CONF_DRVVBUS (1UL << 16)
165 #define TLL_CHANNEL_CONF_CHRGVBUS (1UL << 15)
166 #define TLL_CHANNEL_CONF_ULPINOBITSTUFF (1UL << 11)
167 #define TLL_CHANNEL_CONF_ULPIAUTOIDLE (1UL << 10)
168 #define TLL_CHANNEL_CONF_UTMIAUTOIDLE (1UL << 9)
169 #define TLL_CHANNEL_CONF_ULPIDDRMODE (1UL << 8)
170 #define TLL_CHANNEL_CONF_ULPIOUTCLKMODE (1UL << 7)
171 #define TLL_CHANNEL_CONF_TLLFULLSPEED (1UL << 6)
172 #define TLL_CHANNEL_CONF_TLLCONNECT (1UL << 5)
173 #define TLL_CHANNEL_CONF_TLLATTACH (1UL << 4)
174 #define TLL_CHANNEL_CONF_UTMIISADEV (1UL << 3)
175 #define TLL_CHANNEL_CONF_CHANEN (1UL << 0)
178 /* UHH Register Set */
179 #define UHH_SYSCONFIG_MIDLEMODE_MASK (3UL << 12)
180 #define UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY (2UL << 12)
181 #define UHH_SYSCONFIG_MIDLEMODE_NOSTANDBY (1UL << 12)
182 #define UHH_SYSCONFIG_MIDLEMODE_FORCESTANDBY (0UL << 12)
183 #define UHH_SYSCONFIG_CLOCKACTIVITY (1UL << 8)
184 #define UHH_SYSCONFIG_SIDLEMODE_MASK (3UL << 3)
185 #define UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE (2UL << 3)
186 #define UHH_SYSCONFIG_SIDLEMODE_NOIDLE (1UL << 3)
187 #define UHH_SYSCONFIG_SIDLEMODE_FORCEIDLE (0UL << 3)
188 #define UHH_SYSCONFIG_ENAWAKEUP (1UL << 2)
189 #define UHH_SYSCONFIG_SOFTRESET (1UL << 1)
190 #define UHH_SYSCONFIG_AUTOIDLE (1UL << 0)
192 #define UHH_HOSTCONFIG_APP_START_CLK (1UL << 31)
193 #define UHH_HOSTCONFIG_P3_CONNECT_STATUS (1UL << 10)
194 #define UHH_HOSTCONFIG_P2_CONNECT_STATUS (1UL << 9)
195 #define UHH_HOSTCONFIG_P1_CONNECT_STATUS (1UL << 8)
196 #define UHH_HOSTCONFIG_ENA_INCR_ALIGN (1UL << 5)
197 #define UHH_HOSTCONFIG_ENA_INCR16 (1UL << 4)
198 #define UHH_HOSTCONFIG_ENA_INCR8 (1UL << 3)
199 #define UHH_HOSTCONFIG_ENA_INCR4 (1UL << 2)
200 #define UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN (1UL << 1)
201 #define UHH_HOSTCONFIG_P1_ULPI_BYPASS (1UL << 0)
203 /* The following are on rev2 (OMAP44xx) of the EHCI only */
204 #define UHH_SYSCONFIG_IDLEMODE_MASK (3UL << 2)
205 #define UHH_SYSCONFIG_IDLEMODE_NOIDLE (1UL << 2)
206 #define UHH_SYSCONFIG_STANDBYMODE_MASK (3UL << 4)
207 #define UHH_SYSCONFIG_STANDBYMODE_NOSTDBY (1UL << 4)
209 #define UHH_HOSTCONFIG_P1_MODE_MASK (3UL << 16)
210 #define UHH_HOSTCONFIG_P1_MODE_ULPI_PHY (0UL << 16)
211 #define UHH_HOSTCONFIG_P1_MODE_UTMI_PHY (1UL << 16)
212 #define UHH_HOSTCONFIG_P1_MODE_HSIC (3UL << 16)
213 #define UHH_HOSTCONFIG_P2_MODE_MASK (3UL << 18)
214 #define UHH_HOSTCONFIG_P2_MODE_ULPI_PHY (0UL << 18)
215 #define UHH_HOSTCONFIG_P2_MODE_UTMI_PHY (1UL << 18)
216 #define UHH_HOSTCONFIG_P2_MODE_HSIC (3UL << 18)
218 #define ULPI_FUNC_CTRL_RESET (1 << 5)
220 /*-------------------------------------------------------------------------*/
223 * Macros for Set and Clear
224 * See ULPI 1.1 specification to find the registers with Set and Clear offsets
226 #define ULPI_SET(a) (a + 1)
227 #define ULPI_CLR(a) (a + 2)
229 /*-------------------------------------------------------------------------*/
234 #define ULPI_VENDOR_ID_LOW 0x00
235 #define ULPI_VENDOR_ID_HIGH 0x01
236 #define ULPI_PRODUCT_ID_LOW 0x02
237 #define ULPI_PRODUCT_ID_HIGH 0x03
238 #define ULPI_FUNC_CTRL 0x04
239 #define ULPI_IFC_CTRL 0x07
240 #define ULPI_OTG_CTRL 0x0a
241 #define ULPI_USB_INT_EN_RISE 0x0d
242 #define ULPI_USB_INT_EN_FALL 0x10
243 #define ULPI_USB_INT_STS 0x13
244 #define ULPI_USB_INT_LATCH 0x14
245 #define ULPI_DEBUG 0x15
246 #define ULPI_SCRATCH 0x16
249 * Values of UHH_REVISION - Note: these are not given in the TRM but taken
250 * from the linux OMAP EHCI driver (thanks guys). It has been verified on
251 * a Panda and Beagle board.
253 #define OMAP_EHCI_REV1 0x00000010 /* OMAP3 */
254 #define OMAP_EHCI_REV2 0x50700100 /* OMAP4 */
256 #define EHCI_VENDORID_OMAP3 0x42fa05
257 #define OMAP_EHCI_HC_DEVSTR "TI OMAP USB 2.0 controller"
259 #define EHCI_HCD_OMAP_MODE_UNKNOWN 0
260 #define EHCI_HCD_OMAP_MODE_PHY 1
261 #define EHCI_HCD_OMAP_MODE_TLL 2
262 #define EHCI_HCD_OMAP_MODE_HSIC 3
264 #endif /* _OMAP_USB_H_ */