sys/boot/fdt/dts/arm/dreamplug-1001N.dts

   1 /*
   2  * Copyright (c) 2013 Ian Lepore
   3  * Copyright (c) 2010 The FreeBSD Foundation
   4  * All rights reserved.
   5  *
   6  * This software substantially based on work developed by Semihalf
   7  * under sponsorship from the FreeBSD Foundation.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * GlobalScale Technologies DreamPlug Device Tree Source.
  31  *
  32  * This source is for version 10 revision 01 units with NAND flash.
  33  * These units are marked "1001N" on the serial number label.
  34  *
  35  * $FreeBSD$
  36  */
  37
  38 /dts-v1/;
  39
  40 / {
  41         model = "GlobalScale Technologies Dreamplug v1001N";
  42         compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
  43         #address-cells = <1>;
  44         #size-cells = <1>;
  45
  46         aliases {
  47                 ethernet0 = &enet0;
  48                 ethernet1 = &enet1;
  49                 mpp = &MPP;
  50                 serial0 = &serial0;
  51                 serial1 = &serial1;
  52                 soc = &SOC;
  53                 sram = &SRAM;
  54         };
  55
  56         cpus {
  57                 #address-cells = <1>;
  58                 #size-cells = <0>;
  59
  60                 cpu@0 {
  61                         device_type = "cpu";
  62                         compatible = "ARM,88FR131";
  63                         reg = <0x0>;
  64                         d-cache-line-size = <32>;       // 32 bytes
  65                         i-cache-line-size = <32>;       // 32 bytes
  66                         d-cache-size = <0x4000>;        // L1, 16K
  67                         i-cache-size = <0x4000>;        // L1, 16K
  68                         timebase-frequency = <0>;
  69                         bus-frequency = <0>;
  70                         clock-frequency = <0>;
  71                 };
  72
  73         };
  74
  75         memory {
  76                 device_type = "memory";
  77                 reg = <0x0 0x20000000>;         // 512M at 0x0
  78         };
  79
  80         localbus@0 {
  81                 #address-cells = <2>;
  82                 #size-cells = <1>;
  83                 compatible = "mrvl,lbc";
  84                 bank-count = <1>;
  85
  86                 /* This reflects CPU decode windows setup. */
  87                 ranges = <0x0 0x2f 0xf9300000 0x00100000>;
  88
  89                 nand@0,0 {
  90                         #address-cells = <1>;
  91                         #size-cells = <1>;
  92                         compatible = "mrvl,nfc";
  93                         reg = <0x0 0x0 0x00100000>;
  94                         bank-width = <2>;
  95                         device-width = <1>;
  96
  97                         // Slice info reported by builtin linux when it boots...
  98                         //[   11.161328] 0x00000000-0x00100000 : "u-boot"
  99                         //[   11.167431] 0x00100000-0x00500000 : "uImage"
 100                         //[   11.173471] 0x00500000-0x20000000 : "root"
 101
 102                         slice@0 {
 103                                 reg = <0x0 0x100000>;
 104                                 label = "u-boot";
 105                                 read-only;
 106                         };
 107
 108                         slice@200000 {
 109                                 reg = <0x100000 0x40000>;
 110                                 label = "uImage";
 111                         };
 112
 113                         slice@500000 {
 114                                 reg = <0x500000 0x1FB00000>;
 115                                 label = "root";
 116                         };
 117                 };
 118         };
 119
 120         SOC: soc88f6281@f1000000 {
 121                 #address-cells = <1>;
 122                 #size-cells = <1>;
 123                 compatible = "simple-bus";
 124                 ranges = <0x0 0xf1000000 0x00100000>;
 125                 bus-frequency = <0>;
 126
 127                 PIC: pic@20200 {
 128                         interrupt-controller;
 129                         #address-cells = <0>;
 130                         #interrupt-cells = <1>;
 131                         reg = <0x20200 0x3c>;
 132                         compatible = "mrvl,pic";
 133                 };
 134
 135                 timer@20300 {
 136                         compatible = "mrvl,timer";
 137                         reg = <0x20300 0x30>;
 138                         interrupts = <1>;
 139                         interrupt-parent = <&PIC>;
 140                         mrvl,has-wdt;
 141                 };
 142
 143                 MPP: mpp@10000 {
 144                         #pin-cells = <2>;
 145                         compatible = "mrvl,mpp";
 146                         reg = <0x10000 0x34>;
 147                         pin-count = <50>;
 148                         pin-map = <
 149                                  0 1            /* MPP[ 0]: NF_IO[2] */
 150                                  1 1            /* MPP[ 1]: NF_IO[3] */
 151                                  2 1            /* MPP[ 2]: NF_IO[4] */
 152                                  3 1            /* MPP[ 3]: NF_IO[5] */
 153                                  4 1            /* MPP[ 4]: NF_IO[6] */
 154                                  5 1            /* MPP[ 5]: NF_IO[7] */
 155                                  6 1            /* MPP[ 6]: SYSRST_OUTn */
 156                                  7 0            /* MPP[ 7]: GPO[7] */
 157                                  8 1            /* MPP[ 8]: TW_SDA */
 158                                  9 1            /* MPP[ 9]: TW_SCK */
 159                                 10 3            /* MPP[10]: UA0_TXD */
 160                                 11 3            /* MPP[11]: US0_RXD */
 161                                 12 1            /* MPP[12]: SD_CLK */
 162                                 13 1            /* MPP[13]: SD_CMD */
 163                                 14 1            /* MPP[14]: SD_D[0] */
 164                                 15 1            /* MPP[15]: SD_D[1] */
 165                                 16 1            /* MPP[16]: SD_D[2] */
 166                                 17 1            /* MPP[17]: SD_D[3] */
 167                                 18 1            /* MPP[18]: NF_IO[0] */
 168                                 19 1            /* MPP[19]: NF_IO[1] */
 169                                 20 3            /* MPP[20]: GE1[ 0] */
 170                                 21 3            /* MPP[21]: GE1[ 1] */
 171                                 22 3            /* MPP[22]: GE1[ 2] */
 172                                 23 3            /* MPP[23]: GE1[ 3] */
 173                                 24 3            /* MPP[24]: GE1[ 4] */
 174                                 25 3            /* MPP[25]: GE1[ 5] */
 175                                 26 3            /* MPP[26]: GE1[ 6] */
 176                                 27 3            /* MPP[27]: GE1[ 7] */
 177                                 28 3            /* MPP[28]: GE1[ 8] */
 178                                 29 3            /* MPP[29]: GE1[ 9] */
 179                                 30 3            /* MPP[30]: GE1[10] */
 180                                 31 3            /* MPP[31]: GE1[11] */
 181                                 32 3            /* MPP[32]: GE1[12] */
 182                                 33 3            /* MPP[33]: GE1[13] */
 183                                 34 3            /* MPP[34]: GE1[14] */
 184                                 35 3            /* MPP[35]: GE1[15] */
 185                                 36 0            /* MPP[36]: GPIO[36] */
 186                                 37 0            /* MPP[37]: GPIO[37] */
 187                                 38 0            /* MPP[38]: GPIO[38] */
 188                                 39 0            /* MPP[39]: GPIO[39] */
 189                                 40 2            /* MPP[40]: TDM_SPI_SCK */
 190                                 41 2            /* MPP[41]: TDM_SPI_MISO */
 191                                 42 2            /* MPP[42]: TDM_SPI_MOSI */
 192                                 43 0            /* MPP[43]: GPIO[43] */
 193                                 44 0            /* MPP[44]: GPIO[44] */
 194                                 45 0            /* MPP[45]: GPIO[45] */
 195                                 46 0            /* MPP[46]: GPIO[46] */
 196                                 47 0            /* MPP[47]: GPIO[47] */
 197                                 48 0            /* MPP[48]: GPIO[48] */
 198                                 49 0            /* MPP[49]: GPIO[49] */
 199                                 >;
 200                 };
 201
 202                 GPIO: gpio@10100 {
 203                         #gpio-cells = <3>;
 204                         compatible = "mrvl,gpio";
 205                         reg = <0x10100 0x20>;
 206                         gpio-controller;
 207                         interrupts = <35 36 37 38 39 40 41>;
 208                         interrupt-parent = <&PIC>;
 209                         pin-count = <50>;
 210                 };
 211
 212                 gpioled@0 {
 213                         compatible = "mrvl,gpioled";
 214
 215                         gpios = <&GPIO 47 2 0   /* GPIO[47] BT LED: OUT */
 216                                  &GPIO 48 2 0   /* GPIO[48] WLAN LED: OUT */
 217                                  &GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */
 218                 };
 219
 220                 rtc@10300 {
 221                         compatible = "mrvl,rtc";
 222                         reg = <0x10300 0x08>;
 223                 };
 224
 225                 twsi@11000 {
 226                         #address-cells = <1>;
 227                         #size-cells = <0>;
 228                         compatible = "mrvl,twsi";
 229                         reg = <0x11000 0x20>;
 230                         interrupts = <43>;
 231                         interrupt-parent = <&PIC>;
 232                 };
 233
 234                 enet0: ethernet@72000 {
 235                         #address-cells = <1>;
 236                         #size-cells = <1>;
 237                         model = "V2";
 238                         compatible = "mrvl,ge";
 239                         reg = <0x72000 0x2000>;
 240                         ranges = <0x0 0x72000 0x2000>;
 241                         local-mac-address = [ 00 00 00 00 00 00 ];
 242                         interrupts = <12 13 14 11 46>;
 243                         interrupt-parent = <&PIC>;
 244                         phy-handle = <&phy0>;
 245
 246                         mdio@0 {
 247                                 #address-cells = <1>;
 248                                 #size-cells = <0>;
 249                                 compatible = "mrvl,mdio";
 250
 251                                 phy0: ethernet-phy@0 {
 252                                         reg = <0x0>;
 253                                 };
 254
 255                                 phy1: ethernet-phy@1 {
 256                                         reg = <0x1>;
 257                                 };
 258                         };
 259                 };
 260
 261                 enet1: ethernet@76000 {
 262                         #address-cells = <1>;
 263                         #size-cells = <1>;
 264                         model = "V2";
 265                         compatible = "mrvl,ge";
 266                         reg = <0x76000 0x02000>;
 267                         ranges = <0x0 0x76000 0x2000>;
 268                         local-mac-address = [ 00 00 00 00 00 00 ];
 269                         interrupts = <16 17 18 15 47>;
 270                         interrupt-parent = <&PIC>;
 271                         phy-handle = <&phy1>;
 272                 };
 273
 274                 serial0: serial@12000 {
 275                         compatible = "ns16550";
 276                         reg = <0x12000 0x20>;
 277                         reg-shift = <2>;
 278                         clock-frequency = <0>;
 279                         interrupts = <33>;
 280                         interrupt-parent = <&PIC>;
 281                 };
 282
 283                 serial1: serial@12100 {
 284                         compatible = "ns16550";
 285                         reg = <0x12100 0x20>;
 286                         reg-shift = <2>;
 287                         clock-frequency = <0>;
 288                         interrupts = <34>;
 289                         interrupt-parent = <&PIC>;
 290                 };
 291
 292                 crypto@30000 {
 293                         compatible = "mrvl,cesa";
 294                         reg = <0x30000 0x10000>;
 295                         interrupts = <22>;
 296                         interrupt-parent = <&PIC>;
 297
 298                         sram-handle = <&SRAM>;
 299                 };
 300
 301                 usb@50000 {
 302                         compatible = "mrvl,usb-ehci", "usb-ehci";
 303                         reg = <0x50000 0x1000>;
 304                         interrupts = <48 19>;
 305                         interrupt-parent = <&PIC>;
 306                 };
 307
 308                 xor@60000 {
 309                         compatible = "mrvl,xor";
 310                         reg = <0x60000 0x1000>;
 311                         interrupts = <5 6 7 8>;
 312                         interrupt-parent = <&PIC>;
 313                 };
 314
 315                 sata@80000 {
 316                         compatible = "mrvl,sata";
 317                         reg = <0x80000 0x6000>;
 318                         interrupts = <21>;
 319                         interrupt-parent = <&PIC>;
 320                 };
 321
 322                 sdio@90000 {
 323                         compatible = "mrvl,sdio";
 324                         reg = <0x90000 0x134>;
 325                         interrupts = <28>;
 326                         interrupt-parent = <&PIC>;
 327                 };
 328         };
 329
 330         SRAM: sram@fd000000 {
 331                 compatible = "mrvl,cesa-sram";
 332                 reg = <0xfd000000 0x00100000>;
 333         };
 334
 335         chosen {
 336                 stdin = "serial0";
 337                 stdout = "serial0";
 338         };
 339
 340 };