sys/boot/fdt/dts/arm/p2041rdb.dts

   1 /*
   2  * P2041RDB Device Tree Source
   3  *
   4  * Copyright 2011 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34 /* $FreeBSD$ */
  35
  36 /include/ "p2041si.dtsi"
  37
  38 / {
  39         model = "fsl,P2041RDB";
  40         compatible = "fsl,P2041RDB";
  41         #address-cells = <2>;
  42         #size-cells = <2>;
  43         interrupt-parent = <&mpic>;
  44
  45         aliases {
  46                 phy_rgmii_0 = &phy_rgmii_0;
  47                 phy_rgmii_1 = &phy_rgmii_1;
  48                 phy_sgmii_2 = &phy_sgmii_2;
  49                 phy_sgmii_3 = &phy_sgmii_3;
  50                 phy_sgmii_4 = &phy_sgmii_4;
  51                 phy_sgmii_1c = &phy_sgmii_1c;
  52                 phy_sgmii_1d = &phy_sgmii_1d;
  53                 phy_sgmii_1e = &phy_sgmii_1e;
  54                 phy_sgmii_1f = &phy_sgmii_1f;
  55                 phy_xgmii_2 = &phy_xgmii_2;
  56         };
  57
  58         memory {
  59                 device_type = "memory";
  60                 reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
  61         };
  62
  63         dcsr: dcsr@f00000000 {
  64                 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
  65         };
  66
  67         bman-portals@ff4000000 {
  68                 bman-portal@0 {
  69                         cpu-handle = <&cpu0>;
  70                 };
  71                 bman-portal@4000 {
  72                         cpu-handle = <&cpu1>;
  73                 };
  74                 bman-portal@8000 {
  75                         cpu-handle = <&cpu2>;
  76                 };
  77                 bman-portal@c000 {
  78                         cpu-handle = <&cpu3>;
  79                 };
  80                 bman-portal@10000 {
  81                 };
  82                 bman-portal@14000 {
  83                 };
  84                 bman-portal@18000 {
  85                 };
  86                 bman-portal@1c000 {
  87                 };
  88                 bman-portal@20000 {
  89                 };
  90                 bman-portal@24000 {
  91                 };
  92
  93                 buffer-pool@0 {
  94                         compatible = "fsl,p2041-bpool", "fsl,bpool";
  95                         fsl,bpid = <0>;
  96                         fsl,bpool-cfg = <0 0x100 0 1 0 0x100>;
  97                 };
  98         };
  99
 100         qman-portals@ff4200000 {
 101                 qportal0: qman-portal@0 {
 102                         cpu-handle = <&cpu0>;
 103                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 104                                                   &qpool4 &qpool5 &qpool6
 105                                                   &qpool7 &qpool8 &qpool9
 106                                                   &qpool10 &qpool11 &qpool12
 107                                                   &qpool13 &qpool14 &qpool15>;
 108                 };
 109
 110                 qportal1: qman-portal@4000 {
 111                         cpu-handle = <&cpu1>;
 112                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 113                                                   &qpool4 &qpool5 &qpool6
 114                                                   &qpool7 &qpool8 &qpool9
 115                                                   &qpool10 &qpool11 &qpool12
 116                                                   &qpool13 &qpool14 &qpool15>;
 117                 };
 118
 119                 qportal2: qman-portal@8000 {
 120                         cpu-handle = <&cpu2>;
 121                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 122                                                   &qpool4 &qpool5 &qpool6
 123                                                   &qpool7 &qpool8 &qpool9
 124                                                   &qpool10 &qpool11 &qpool12
 125                                                   &qpool13 &qpool14 &qpool15>;
 126                 };
 127
 128                 qportal3: qman-portal@c000 {
 129                         cpu-handle = <&cpu3>;
 130                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 131                                                   &qpool4 &qpool5 &qpool6
 132                                                   &qpool7 &qpool8 &qpool9
 133                                                   &qpool10 &qpool11 &qpool12
 134                                                   &qpool13 &qpool14 &qpool15>;
 135                 };
 136
 137                 qportal4: qman-portal@10000 {
 138                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 139                                                   &qpool4 &qpool5 &qpool6
 140                                                   &qpool7 &qpool8 &qpool9
 141                                                   &qpool10 &qpool11 &qpool12
 142                                                   &qpool13 &qpool14 &qpool15>;
 143                 };
 144
 145                 qportal5: qman-portal@14000 {
 146                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 147                                                   &qpool4 &qpool5 &qpool6
 148                                                   &qpool7 &qpool8 &qpool9
 149                                                   &qpool10 &qpool11 &qpool12
 150                                                   &qpool13 &qpool14 &qpool15>;
 151                 };
 152
 153                 qportal6: qman-portal@18000 {
 154                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 155                                                   &qpool4 &qpool5 &qpool6
 156                                                   &qpool7 &qpool8 &qpool9
 157                                                   &qpool10 &qpool11 &qpool12
 158                                                   &qpool13 &qpool14 &qpool15>;
 159                 };
 160
 161                 qportal7: qman-portal@1c000 {
 162                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 163                                                   &qpool4 &qpool5 &qpool6
 164                                                   &qpool7 &qpool8 &qpool9
 165                                                   &qpool10 &qpool11 &qpool12
 166                                                   &qpool13 &qpool14 &qpool15>;
 167                 };
 168
 169                 qportal8: qman-portal@20000 {
 170                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 171                                                   &qpool4 &qpool5 &qpool6
 172                                                   &qpool7 &qpool8 &qpool9
 173                                                   &qpool10 &qpool11 &qpool12
 174                                                   &qpool13 &qpool14 &qpool15>;
 175                 };
 176
 177                 qportal9: qman-portal@24000 {
 178                         fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3
 179                                                   &qpool4 &qpool5 &qpool6
 180                                                   &qpool7 &qpool8 &qpool9
 181                                                   &qpool10 &qpool11 &qpool12
 182                                                   &qpool13 &qpool14 &qpool15>;
 183                 };
 184         };
 185
 186         soc: soc@ffe000000 {
 187                 spi@110000 {
 188                         flash@0 {
 189                                 #address-cells = <1>;
 190                                 #size-cells = <1>;
 191                                 compatible = "spansion,s25sl12801";
 192                                 reg = <0>;
 193                                 spi-max-frequency = <40000000>; /* input clock */
 194                                 partition@u-boot {
 195                                         label = "u-boot";
 196                                         reg = <0x00000000 0x00100000>;
 197                                         read-only;
 198                                 };
 199                                 partition@kernel {
 200                                         label = "kernel";
 201                                         reg = <0x00100000 0x00500000>;
 202                                         read-only;
 203                                 };
 204                                 partition@dtb {
 205                                         label = "dtb";
 206                                         reg = <0x00600000 0x00100000>;
 207                                         read-only;
 208                                 };
 209                                 partition@fs {
 210                                         label = "file system";
 211                                         reg = <0x00700000 0x00900000>;
 212                                 };
 213                         };
 214                 };
 215
 216                 i2c@118000 {
 217                         lm75b@48 {
 218                                 compatible = "nxp,lm75a";
 219                                 reg = <0x48>;
 220                         };
 221                         eeprom@50 {
 222                                 compatible = "at24,24c256";
 223                                 reg = <0x50>;
 224                         };
 225                         rtc@68 {
 226                                 compatible = "pericom,pt7c4338";
 227                                 reg = <0x68>;
 228                         };
 229                 };
 230
 231                 i2c@118100 {
 232                         eeprom@50 {
 233                                 compatible = "at24,24c256";
 234                                 reg = <0x50>;
 235                         };
 236                 };
 237
 238                 usb1: usb@211000 {
 239                         dr_mode = "host";
 240                 };
 241
 242                 pme: pme@316000 {
 243                         /* Commented out, use default allocation */
 244                         /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */
 245                         /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */
 246                 };
 247
 248                 qman: qman@318000 {
 249                         /* Commented out, use default allocation */
 250                         /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */
 251                         /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */
 252                 };
 253
 254                 bman: bman@31a000 {
 255                         /* Same as fsl,qman-*, use default allocation */
 256                         /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */
 257                 };
 258
 259                 fman0: fman@400000 {
 260                         enet0: ethernet@e0000 {
 261                                 tbi-handle = <&tbi0>;
 262                                 phy-handle = <&phy_sgmii_2>;
 263                                 phy-connection-type = "sgmii";
 264                         };
 265
 266                         mdio0: mdio@e1120 {
 267                                 tbi0: tbi-phy@8 {
 268                                         reg = <0x8>;
 269                                         device_type = "tbi-phy";
 270                                 };
 271
 272                                 phy_rgmii_0: ethernet-phy@0 {
 273                                         reg = <0x0>;
 274                                 };
 275                                 phy_rgmii_1: ethernet-phy@1 {
 276                                         reg = <0x1>;
 277                                 };
 278                                 phy_sgmii_2: ethernet-phy@2 {
 279                                         reg = <0x2>;
 280                                 };
 281                                 phy_sgmii_3: ethernet-phy@3 {
 282                                         reg = <0x3>;
 283                                 };
 284                                 phy_sgmii_4: ethernet-phy@4 {
 285                                         reg = <0x4>;
 286                                 };
 287                                 phy_sgmii_1c: ethernet-phy@1c {
 288                                         reg = <0x1c>;
 289                                 };
 290                                 phy_sgmii_1d: ethernet-phy@1d {
 291                                         reg = <0x1d>;
 292                                 };
 293                                 phy_sgmii_1e: ethernet-phy@1e {
 294                                         reg = <0x1e>;
 295                                 };
 296                                 phy_sgmii_1f: ethernet-phy@1f {
 297                                         reg = <0x1f>;
 298                                 };
 299                         };
 300
 301                         enet1: ethernet@e2000 {
 302                                 tbi-handle = <&tbi1>;
 303                                 phy-handle = <&phy_sgmii_3>;
 304                                 phy-connection-type = "sgmii";
 305                         };
 306
 307                         mdio@e3120 {
 308                                 tbi1: tbi-phy@8 {
 309                                         reg = <8>;
 310                                         device_type = "tbi-phy";
 311                                 };
 312                         };
 313
 314                         enet2: ethernet@e4000 {
 315                                 tbi-handle = <&tbi2>;
 316                                 phy-handle = <&phy_sgmii_4>;
 317                                 phy-connection-type = "sgmii";
 318                         };
 319
 320                         mdio@e5120 {
 321                                 tbi2: tbi-phy@8 {
 322                                         reg = <8>;
 323                                         device_type = "tbi-phy";
 324                                 };
 325                         };
 326
 327                         enet3: ethernet@e6000 {
 328                                 tbi-handle = <&tbi3>;
 329                                 phy-handle = <&phy_rgmii_1>;
 330                                 phy-connection-type = "rgmii";
 331                         };
 332
 333                         mdio@e7120 {
 334                                 tbi3: tbi-phy@8 {
 335                                         reg = <8>;
 336                                         device_type = "tbi-phy";
 337                                 };
 338                         };
 339
 340                         enet4: ethernet@e8000 {
 341                                 tbi-handle = <&tbi4>;
 342                                 phy-handle = <&phy_rgmii_0>;
 343                                 phy-connection-type = "rgmii";
 344                         };
 345
 346                         mdio@e9120 {
 347                                 tbi4: tbi-phy@8 {
 348                                         reg = <8>;
 349                                         device_type = "tbi-phy";
 350                                 };
 351                         };
 352
 353                         enet5: ethernet@f0000 {
 354                                 /*
 355                                  * phy-handle will be updated by U-Boot to
 356                                  * reflect the actual slot the XAUI card is in.
 357                                  */
 358                                 phy-handle = <&phy_xgmii_2>;
 359                                 phy-connection-type = "xgmii";
 360                         };
 361
 362                         mdio@f1000 {
 363                                 /* XAUI card in slot 2 */
 364                                 phy_xgmii_2: ethernet-phy@0 {
 365                                         reg = <0x0>;
 366                                 };
 367                         };
 368                 };
 369         };
 370
 371         rapidio@ffe0c0000 {
 372                 reg = <0xf 0xfe0c0000 0 0x11000>;
 373
 374                 port1 {
 375                         ranges = <0 0 0xc 0x20000000 0 0x10000000>;
 376                 };
 377                 port2 {
 378                         ranges = <0 0 0xc 0x30000000 0 0x10000000>;
 379                 };
 380         };
 381
 382         localbus@ffe124000 {
 383                 reg = <0xf 0xfe124000 0 0x1000>;
 384                 ranges = <0 0 0xf 0xb8000000 0x04000000>;
 385
 386                 flash@0,0 {
 387                         compatible = "cfi-flash";
 388                         /*
 389                          * Map 64Mb of 128MB NOR flash memory. Since highest
 390                          * line of address of NOR flash memory are set by
 391                          * FPGA, memory are divided into two pages equal to
 392                          * 64MB. One of the pages can be accessed at once.
 393                          */
 394                         reg = <0 0 0x04000000>;
 395                         bank-width = <2>;
 396                         device-width = <2>;
 397                 };
 398         };
 399
 400         pci0: pcie@ffe200000 {
 401                 reg = <0xf 0xfe200000 0 0x1000>;
 402                 ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000
 403                           0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>;
 404                 pcie@0 {
 405                         ranges = <0x02000000 0 0x80000000
 406                                   0x02000000 0 0x80000000
 407                                   0 0x10000000
 408
 409                                   0x01000000 0 0x00000000
 410                                   0x01000000 0 0xff000000
 411                                   0 0x00010000>;
 412                 };
 413         };
 414
 415         pci1: pcie@ffe201000 {
 416                 reg = <0xf 0xfe201000 0 0x1000>;
 417                 ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000
 418                           0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>;
 419                 pcie@0 {
 420                         ranges = <0x02000000 0 0x90000000
 421                                   0x02000000 0 0x90000000
 422                                   0 0x10000000
 423
 424                                   0x01000000 0 0x00000000
 425                                   0x01000000 0 0xff010000
 426                                   0 0x00010000>;
 427                 };
 428         };
 429
 430         pci2: pcie@ffe202000 {
 431                 reg = <0xf 0xfe202000 0 0x1000>;
 432                 ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000
 433                           0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>;
 434                 pcie@0 {
 435                         ranges = <0x02000000 0 0xa0000000
 436                                   0x02000000 0 0xa0000000
 437                                   0 0x10000000
 438
 439                                   0x01000000 0 0x00000000
 440                                   0x01000000 0 0xff020000
 441                                   0 0x00010000>;
 442                 };
 443         };
 444
 445         fsl,dpaa {
 446                 compatible = "fsl,p2041-dpaa", "fsl,dpaa";
 447
 448                 ethernet@0 {
 449                         compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
 450                         fsl,qman-channel = <&qpool1>;
 451                         fsl,fman-mac = <&enet0>;
 452                         status = "okay";
 453                 };
 454                 ethernet@1 {
 455                         compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
 456                         fsl,qman-channel = <&qpool1>;
 457                         fsl,fman-mac = <&enet1>;
 458                         status = "okay";
 459                 };
 460                 ethernet@2 {
 461                         compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
 462                         fsl,qman-channel = <&qpool1>;
 463                         fsl,fman-mac = <&enet2>;
 464                         status = "okay";
 465                 };
 466                 ethernet@3 {
 467                         compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
 468                         fsl,qman-channel = <&qpool1>;
 469                         fsl,fman-mac = <&enet3>;
 470                         status = "okay";
 471                 };
 472                 ethernet@4 {
 473                         compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
 474                         fsl,qman-channel = <&qpool1>;
 475                         fsl,fman-mac = <&enet4>;
 476                         status = "okay";
 477                 };
 478                 ethernet@5 {
 479                         compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
 480                         fsl,qman-channel = <&qpool1>;
 481                         fsl,fman-mac = <&enet5>;
 482                         status = "okay";
 483                 };
 484         };
 485
 486         chosen {
 487                 stdin = "serial0";
 488                 stdout = "serial0";
 489         };
 490 };