sys/boot/fdt/dts/mips/beripad-de4.dts

   1 /*-
   2  * Copyright (c) 2012-2013 Robert N. M. Watson
   3  * Copyright (c) 2013 SRI International
   4  * All rights reserved.
   5  *
   6  * This software was developed by SRI International and the University of
   7  * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
   8  * ("CTSRD"), as part of the DARPA CRASH research programme.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  *
  31  * $FreeBSD$
  32  */
  33
  34 /dts-v1/;
  35
  36 /*
  37  * Device names here have been largely made up on the spot, especially for the
  38  * "compatible" strings, and might want to be revised.
  39  *
  40  * For now, use 32-bit addressing as our Avalon bus is 32-bit.  However, in
  41  * the future, we should likely change to 64-bit.
  42  */
  43
  44 / {
  45         model = "SRI/Cambridge BeriPad (DE4)";
  46         compatible = "sri-cambridge,beripad-de4";
  47         #address-cells = <1>;
  48         #size-cells = <1>;
  49
  50         cpus {
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53
  54                 /*
  55                  * Secondary CPUs all start disabled and use the
  56                  * spin-table enable method.  cpu-release-addr must be
  57                  * specified for each cpu other than cpu@0.  Values of
  58                  * cpu-release-addr grow down from 0x100000 (kernel).
  59                  */
  60                 status = "disabled";
  61                 enable-method = "spin-table";
  62
  63                 cpu@0 {
  64                         device-type = "cpu";
  65                         compatible = "sri-cambridge,beri";
  66
  67                         reg = <0 1>;
  68                         status = "okay";
  69                 };
  70
  71 /*
  72                 cpu@1 {
  73                         device-type = "cpu";
  74                         compatible = "sri-cambridge,beri";
  75
  76                         reg = <1 1>;
  77                         // XXX: should we need cached prefix?
  78                         cpu-release-addr = <0xffffffff 0x800fffe0>;
  79                 };
  80 */
  81         };
  82
  83         soc {
  84                 #address-cells = <1>;
  85                 #size-cells = <1>;
  86                 #interrupt-cells = <1>;
  87
  88                 /*
  89                  * Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
  90                  * we use mips4k coprocessor 0 interrupt management directly.
  91                  */
  92                 compatible = "simple-bus", "mips,mips4k";
  93                 ranges = <>;
  94
  95                 memory {
  96                         device_type = "memory";
  97                         reg = <0x0 0x40000000>;         // 1G at 0x0
  98                 };
  99
 100                 beripic0: beripic@7f804000 {
 101                         compatible = "sri-cambridge,beri-pic";
 102                         interrupt-controller;
 103                         #address-cells = <0>;
 104                         #interrupt-cells = <1>;
 105                         reg = <0x7f804000 0x400
 106                                0x7f806000 0x10
 107                                0x7f806080 0x10
 108                                0x7f806100 0x10>;
 109                         interrupts = <0 1 2 3 4>;
 110                         hard-interrupt-sources = <64>;
 111                         soft-interrupt-sources = <64>;
 112                 };
 113
 114                 serial@7f002100 {
 115                         compatible = "ns16550";
 116                         reg = <0x7f002100 0x20>;
 117                         reg-shift = <2>;
 118                         clock-frequency = <50000000>;
 119                         interrupts = <6>;
 120                         interrupt-parent = <&beripic0>;
 121                 };
 122
 123                 serial@7f000000 {
 124                         compatible = "altera,jtag_uart-11_0";
 125                         reg = <0x7f000000 0x40>;
 126                         interrupts = <0>;
 127                         interrupt-parent = <&beripic0>;
 128                 };
 129
 130                 serial@7f001000 {
 131                         compatible = "altera,jtag_uart-11_0";
 132                         reg = <0x7f001000 0x40>;
 133                 };
 134
 135                 serial@7f002000 {
 136                         compatible = "altera,jtag_uart-11_0";
 137                         reg = <0x7f002000 0x40>;
 138                 };
 139
 140                 sdcard@7f008000 {
 141                         compatible = "altera,sdcard_11_2011";
 142                         reg = <0x7f008000 0x400>;
 143                 };
 144
 145                 led@7f006000 {
 146                         compatible = "sri-cambridge,de4led";
 147                         reg = <0x7f006000 0x1>;
 148                 };
 149
 150                 /*
 151                  * XXX-BZ keep flash before ethernet so that atse can read the
 152                  * Ethernet addresses for now.
 153                  */
 154                 flash@74000000 {
 155                         #address-cells = <1>;
 156                         #size-cells = <1>;
 157                         compatible = "cfi-flash";
 158                         reg = <0x74000000 0x4000000>;
 159
 160                         /* Board configuration */
 161                         partition@0 {
 162                                 reg = <0x0 0x20000>;
 163                                 label = "config";
 164                         };
 165
 166                         /* Power up FPGA image */
 167                         partition@20000 {
 168                                 reg = <0x20000 0xc00000>;
 169                                 label = "fpga0";
 170                         };
 171
 172                         /* Secondary FPGA image (on RE_CONFIGn button) */
 173                         partition@C20000 {
 174                                 reg = <0xc20000 0xc00000>;
 175                                 label = "fpga1";
 176                         };
 177
 178                         /* Space for operating system use */
 179                         partition@1820000 {
 180                                 reg = <0x1820000 0x027c0000>;
 181                                 label = "os";
 182                         };
 183
 184                         /* Second stage bootloader */
 185                         parition@3fe0000 {
 186                                 reg = <0x3fe0000 0x20000>;
 187                                 label = "boot";
 188                         };
 189                 };
 190
 191                 ethernet@7f007000 {
 192                         compatible = "altera,atse";
 193                         // MAC, RX+RXC, TX+TXC.
 194                         reg = <0x7f007000 0x400
 195                                0x7f007500 0x8
 196                                0x7f007520 0x20
 197                                0x7f007400 0x8
 198                                0x7f007420 0x20>;
 199                         // RX, TX
 200                         interrupts = <1 2>;
 201                         interrupt-parent = <&beripic0>;
 202                 };
 203
 204                 ethernet@7f005000 {
 205                         compatible = "altera,atse";
 206                         // MAC, RX+RXC, TX+TXC.
 207                         reg = <0x7f005000 0x400
 208                                0x7f005500 0x8
 209                                0x7f005520 0x20
 210                                0x7f005400 0x8
 211                                0x7f005420 0x20>;
 212                         // RX, TX
 213                         interrupts = <11 12>;
 214                         interrupt-parent = <&beripic0>;
 215                 };
 216
 217                 touchscreen@70400000 {
 218                         compatible = "sri-cambridge,mtl";
 219                         reg = <0x70400000 0x1000
 220                                0x70000000 0x177000
 221                                0x70177000 0x2000>;
 222                 };
 223
 224                 usb@0x7f100000 {
 225                         compatible = "philips,isp1761";
 226                         reg = <0x7f100000 0x40000
 227                                0x7f140000 0x4>;
 228                         // IRQ 4 is DC, IRQ 5 is HC.
 229                         interrupts = <4 5>;
 230                         interrupt-parent = <&beripic0>;
 231                 };
 232
 233                 avgen@0x7f009000 {
 234                         compatible = "sri-cambridge,avgen";
 235                         reg = <0x7f009000 0x2>;
 236                         sri-cambridge,width = <1>;
 237                         sri-cambridge,fileio = "r";
 238                         sri-cambridge,devname = "de4bsw";
 239                 };
 240
 241                 avgen@0x7f00a000 {
 242                         compatible = "sri-cambridge,avgen";
 243                         reg = <0x7f00a000 0x14>;
 244                         sri-cambridge,width = <4>;
 245                         sri-cambridge,fileio = "rw";
 246                         sri-cambridge,devname = "berirom";
 247                 };
 248
 249                 avgen@0x7f00c000 {
 250                         compatible = "sri-cambridge,avgen";
 251                         reg = <0x7f00c000 0x8>;
 252                         sri-cambridge,width = <4>;
 253                         sri-cambridge,fileio = "rw";
 254                         sri-cambridge,devname = "de4tempfan";
 255                 };
 256
 257                 avgen@0x7f100000 {
 258                         compatible = "sri-cambridge,avgen";
 259                         reg = <0x7f100000 0x40000>;
 260                         sri-cambridge,width = <4>;
 261                         sri-cambridge,fileio = "r";
 262                         sri-cambridge,devname = "usbmem";
 263                 };
 264
 265         };
 266 };