4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
21 * Portions Copyright 2010 The FreeBSD Foundation
27 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
28 * Use is subject to license terms.
32 #pragma ident "%Z%%M% %I% %E% SMI"
35 #include <sys/fasttrap_isa.h>
36 #include <sys/fasttrap_impl.h>
37 #include <sys/dtrace.h>
38 #include <sys/dtrace_impl.h>
39 #include <sys/cmn_err.h>
41 #include <sys/regset.h>
42 #include <sys/privregs.h>
43 #include <sys/segments.h>
44 #include <sys/x86_archext.h>
46 #include <cddl/dev/dtrace/dtrace_cddl.h>
47 #include <sys/types.h>
49 #include <sys/dtrace_bsd.h>
50 #include <cddl/dev/dtrace/x86/regset.h>
51 #include <machine/segments.h>
52 #include <machine/reg.h>
53 #include <machine/pcb.h>
55 #include <sys/sysmacros.h>
58 #include <sys/archsystm.h>
60 #include <sys/ptrace.h>
63 proc_ops(int op, proc_t *p, void *kaddr, off_t uaddr, size_t len)
70 uio.uio_offset = uaddr;
74 uio.uio_segflg = UIO_SYSSPACE;
75 uio.uio_td = curthread;
78 if (proc_rwmem(p, &uio) != 0) {
88 uread(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr)
91 return (proc_ops(UIO_READ, p, kaddr, uaddr, len));
95 uwrite(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr)
98 return (proc_ops(UIO_WRITE, p, kaddr, uaddr, len));
105 #define r_rflags r_eflags
111 * Lossless User-Land Tracing on x86
112 * ---------------------------------
114 * The execution of most instructions is not dependent on the address; for
115 * these instructions it is sufficient to copy them into the user process's
116 * address space and execute them. To effectively single-step an instruction
117 * in user-land, we copy out the following sequence of instructions to scratch
118 * space in the user thread's ulwp_t structure.
120 * We then set the program counter (%eip or %rip) to point to this scratch
121 * space. Once execution resumes, the original instruction is executed and
122 * then control flow is redirected to what was originally the subsequent
123 * instruction. If the kernel attemps to deliver a signal while single-
124 * stepping, the signal is deferred and the program counter is moved into the
125 * second sequence of instructions. The second sequence ends in a trap into
126 * the kernel where the deferred signal is then properly handled and delivered.
128 * For instructions whose execute is position dependent, we perform simple
129 * emulation. These instructions are limited to control transfer
130 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle
131 * of %rip-relative addressing that means that almost any instruction can be
132 * position dependent. For all the details on how we emulate generic
133 * instructions included %rip-relative instructions, see the code in
134 * fasttrap_pid_probe() below where we handle instructions of type
135 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing).
138 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3)
139 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7)
140 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7)
141 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm))
143 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3)
144 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7)
145 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7)
147 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1)
148 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1)
149 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1)
150 #define FASTTRAP_REX_B(rex) ((rex) & 1)
151 #define FASTTRAP_REX(w, r, x, b) \
152 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b))
155 * Single-byte op-codes.
157 #define FASTTRAP_PUSHL_EBP 0x55
159 #define FASTTRAP_JO 0x70
160 #define FASTTRAP_JNO 0x71
161 #define FASTTRAP_JB 0x72
162 #define FASTTRAP_JAE 0x73
163 #define FASTTRAP_JE 0x74
164 #define FASTTRAP_JNE 0x75
165 #define FASTTRAP_JBE 0x76
166 #define FASTTRAP_JA 0x77
167 #define FASTTRAP_JS 0x78
168 #define FASTTRAP_JNS 0x79
169 #define FASTTRAP_JP 0x7a
170 #define FASTTRAP_JNP 0x7b
171 #define FASTTRAP_JL 0x7c
172 #define FASTTRAP_JGE 0x7d
173 #define FASTTRAP_JLE 0x7e
174 #define FASTTRAP_JG 0x7f
176 #define FASTTRAP_NOP 0x90
178 #define FASTTRAP_MOV_EAX 0xb8
179 #define FASTTRAP_MOV_ECX 0xb9
181 #define FASTTRAP_RET16 0xc2
182 #define FASTTRAP_RET 0xc3
184 #define FASTTRAP_LOOPNZ 0xe0
185 #define FASTTRAP_LOOPZ 0xe1
186 #define FASTTRAP_LOOP 0xe2
187 #define FASTTRAP_JCXZ 0xe3
189 #define FASTTRAP_CALL 0xe8
190 #define FASTTRAP_JMP32 0xe9
191 #define FASTTRAP_JMP8 0xeb
193 #define FASTTRAP_INT3 0xcc
194 #define FASTTRAP_INT 0xcd
196 #define FASTTRAP_2_BYTE_OP 0x0f
197 #define FASTTRAP_GROUP5_OP 0xff
200 * Two-byte op-codes (second byte only).
202 #define FASTTRAP_0F_JO 0x80
203 #define FASTTRAP_0F_JNO 0x81
204 #define FASTTRAP_0F_JB 0x82
205 #define FASTTRAP_0F_JAE 0x83
206 #define FASTTRAP_0F_JE 0x84
207 #define FASTTRAP_0F_JNE 0x85
208 #define FASTTRAP_0F_JBE 0x86
209 #define FASTTRAP_0F_JA 0x87
210 #define FASTTRAP_0F_JS 0x88
211 #define FASTTRAP_0F_JNS 0x89
212 #define FASTTRAP_0F_JP 0x8a
213 #define FASTTRAP_0F_JNP 0x8b
214 #define FASTTRAP_0F_JL 0x8c
215 #define FASTTRAP_0F_JGE 0x8d
216 #define FASTTRAP_0F_JLE 0x8e
217 #define FASTTRAP_0F_JG 0x8f
219 #define FASTTRAP_EFLAGS_OF 0x800
220 #define FASTTRAP_EFLAGS_DF 0x400
221 #define FASTTRAP_EFLAGS_SF 0x080
222 #define FASTTRAP_EFLAGS_ZF 0x040
223 #define FASTTRAP_EFLAGS_AF 0x010
224 #define FASTTRAP_EFLAGS_PF 0x004
225 #define FASTTRAP_EFLAGS_CF 0x001
228 * Instruction prefixes.
230 #define FASTTRAP_PREFIX_OPERAND 0x66
231 #define FASTTRAP_PREFIX_ADDRESS 0x67
232 #define FASTTRAP_PREFIX_CS 0x2E
233 #define FASTTRAP_PREFIX_DS 0x3E
234 #define FASTTRAP_PREFIX_ES 0x26
235 #define FASTTRAP_PREFIX_FS 0x64
236 #define FASTTRAP_PREFIX_GS 0x65
237 #define FASTTRAP_PREFIX_SS 0x36
238 #define FASTTRAP_PREFIX_LOCK 0xF0
239 #define FASTTRAP_PREFIX_REP 0xF3
240 #define FASTTRAP_PREFIX_REPNE 0xF2
242 #define FASTTRAP_NOREG 0xff
245 * Map between instruction register encodings and the kernel constants which
246 * correspond to indicies into struct regs.
249 static const uint8_t regmap[16] = {
250 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI,
251 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15,
254 static const uint8_t regmap[8] = {
255 EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI
259 static ulong_t fasttrap_getreg(struct reg *, uint_t);
262 fasttrap_anarg(struct reg *rp, int function_entry, int argno)
265 int shift = function_entry ? 1 : 0;
268 if (curproc->p_model == DATAMODEL_LP64) {
272 * In 64-bit mode, the first six arguments are stored in
291 stack = (uintptr_t *)rp->r_rsp;
292 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
293 value = dtrace_fulword(&stack[argno - 6 + shift]);
294 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
298 uint32_t *stack = (uint32_t *)rp->r_esp;
299 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
300 value = dtrace_fuword32(&stack[argno + shift]);
301 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
312 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc,
313 fasttrap_probe_type_t type)
315 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10];
316 size_t len = FASTTRAP_MAX_INSTR_SIZE;
317 size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET));
320 uint8_t seg, rex = 0;
323 * Read the instruction at the given address out of the process's
324 * address space. We don't have to worry about a debugger
325 * changing this instruction before we overwrite it with our trap
326 * instruction since P_PR_LOCK is set. Since instructions can span
327 * pages, we potentially read the instruction in two parts. If the
328 * second part fails, we just zero out that part of the instruction.
330 if (uread(p, &instr[0], first, pc) != 0)
333 uread(p, &instr[first], len - first, pc + first) != 0) {
334 bzero(&instr[first], len - first);
339 * If the disassembly fails, then we have a malformed instruction.
341 if ((size = dtrace_instr_size_isa(instr, p->p_model, &rmindex)) <= 0)
345 * Make sure the disassembler isn't completely broken.
347 ASSERT(-1 <= rmindex && rmindex < size);
350 * If the computed size is greater than the number of bytes read,
351 * then it was a malformed instruction possibly because it fell on a
352 * page boundary and the subsequent page was missing or because of
353 * some malicious user.
358 tp->ftt_size = (uint8_t)size;
359 tp->ftt_segment = FASTTRAP_SEG_NONE;
362 * Find the start of the instruction's opcode by processing any
367 switch (instr[start]) {
368 case FASTTRAP_PREFIX_SS:
371 case FASTTRAP_PREFIX_GS:
374 case FASTTRAP_PREFIX_FS:
377 case FASTTRAP_PREFIX_ES:
380 case FASTTRAP_PREFIX_DS:
383 case FASTTRAP_PREFIX_CS:
386 case FASTTRAP_PREFIX_OPERAND:
387 case FASTTRAP_PREFIX_ADDRESS:
388 case FASTTRAP_PREFIX_LOCK:
389 case FASTTRAP_PREFIX_REP:
390 case FASTTRAP_PREFIX_REPNE:
393 * It's illegal for an instruction to specify
394 * two segment prefixes -- give up on this
395 * illegal instruction.
397 if (tp->ftt_segment != FASTTRAP_SEG_NONE)
400 tp->ftt_segment = seg;
410 * Identify the REX prefix on 64-bit processes.
412 if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40)
413 rex = instr[start++];
417 * Now that we're pretty sure that the instruction is okay, copy the
418 * valid part to the tracepoint.
420 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE);
422 tp->ftt_type = FASTTRAP_T_COMMON;
423 if (instr[start] == FASTTRAP_2_BYTE_OP) {
424 switch (instr[start + 1]) {
426 case FASTTRAP_0F_JNO:
428 case FASTTRAP_0F_JAE:
430 case FASTTRAP_0F_JNE:
431 case FASTTRAP_0F_JBE:
434 case FASTTRAP_0F_JNS:
436 case FASTTRAP_0F_JNP:
438 case FASTTRAP_0F_JGE:
439 case FASTTRAP_0F_JLE:
441 tp->ftt_type = FASTTRAP_T_JCC;
442 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO;
443 tp->ftt_dest = pc + tp->ftt_size +
444 /* LINTED - alignment */
445 *(int32_t *)&instr[start + 2];
448 } else if (instr[start] == FASTTRAP_GROUP5_OP) {
449 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]);
450 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]);
451 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]);
453 if (reg == 2 || reg == 4) {
457 tp->ftt_type = FASTTRAP_T_CALL;
459 tp->ftt_type = FASTTRAP_T_JMP;
466 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0);
469 * See AMD x86-64 Architecture Programmer's Manual
470 * Volume 3, Section 1.2.7, Table 1-12, and
471 * Appendix A.3.1, Table A-15.
473 if (mod != 3 && rm == 4) {
474 uint8_t sib = instr[start + 2];
475 uint_t index = FASTTRAP_SIB_INDEX(sib);
476 uint_t base = FASTTRAP_SIB_BASE(sib);
478 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib);
480 tp->ftt_index = (index == 4) ?
482 regmap[index | (FASTTRAP_REX_X(rex) << 3)];
483 tp->ftt_base = (mod == 0 && base == 5) ?
485 regmap[base | (FASTTRAP_REX_B(rex) << 3)];
488 sz = mod == 1 ? 1 : 4;
491 * In 64-bit mode, mod == 0 and r/m == 5
492 * denotes %rip-relative addressing; in 32-bit
493 * mode, the base register isn't used. In both
494 * modes, there is a 32-bit operand.
496 if (mod == 0 && rm == 5) {
498 if (p->p_model == DATAMODEL_LP64)
499 tp->ftt_base = REG_RIP;
502 tp->ftt_base = FASTTRAP_NOREG;
506 (FASTTRAP_REX_B(rex) << 3);
508 tp->ftt_base = regmap[base];
509 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0;
511 tp->ftt_index = FASTTRAP_NOREG;
516 tp->ftt_dest = *(int8_t *)&instr[start + i];
517 } else if (sz == 4) {
518 /* LINTED - alignment */
519 tp->ftt_dest = *(int32_t *)&instr[start + i];
525 switch (instr[start]) {
527 tp->ftt_type = FASTTRAP_T_RET;
531 tp->ftt_type = FASTTRAP_T_RET16;
532 /* LINTED - alignment */
533 tp->ftt_dest = *(uint16_t *)&instr[start + 1];
552 tp->ftt_type = FASTTRAP_T_JCC;
553 tp->ftt_code = instr[start];
554 tp->ftt_dest = pc + tp->ftt_size +
555 (int8_t)instr[start + 1];
558 case FASTTRAP_LOOPNZ:
561 tp->ftt_type = FASTTRAP_T_LOOP;
562 tp->ftt_code = instr[start];
563 tp->ftt_dest = pc + tp->ftt_size +
564 (int8_t)instr[start + 1];
568 tp->ftt_type = FASTTRAP_T_JCXZ;
569 tp->ftt_dest = pc + tp->ftt_size +
570 (int8_t)instr[start + 1];
574 tp->ftt_type = FASTTRAP_T_CALL;
575 tp->ftt_dest = pc + tp->ftt_size +
576 /* LINTED - alignment */
577 *(int32_t *)&instr[start + 1];
582 tp->ftt_type = FASTTRAP_T_JMP;
583 tp->ftt_dest = pc + tp->ftt_size +
584 /* LINTED - alignment */
585 *(int32_t *)&instr[start + 1];
588 tp->ftt_type = FASTTRAP_T_JMP;
589 tp->ftt_dest = pc + tp->ftt_size +
590 (int8_t)instr[start + 1];
593 case FASTTRAP_PUSHL_EBP:
595 tp->ftt_type = FASTTRAP_T_PUSHL_EBP;
600 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0);
603 * On amd64 we have to be careful not to confuse a nop
604 * (actually xchgl %eax, %eax) with an instruction using
605 * the same opcode, but that does something different
606 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax).
608 if (FASTTRAP_REX_B(rex) == 0)
610 tp->ftt_type = FASTTRAP_T_NOP;
615 * The pid provider shares the int3 trap with debugger
616 * breakpoints so we can't instrument them.
618 ASSERT(instr[start] == FASTTRAP_INSTR);
623 * Interrupts seem like they could be traced with
624 * no negative implications, but it's possible that
625 * a thread could be redirected by the trap handling
626 * code which would eventually return to the
627 * instruction after the interrupt. If the interrupt
628 * were in our scratch space, the subsequent
629 * instruction might be overwritten before we return.
630 * Accordingly we refuse to instrument any interrupt.
637 if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) {
639 * If the process is 64-bit and the instruction type is still
640 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an
641 * execute it -- we need to watch for %rip-relative
642 * addressing mode. See the portion of fasttrap_pid_probe()
643 * below where we handle tracepoints with type
644 * FASTTRAP_T_COMMON for how we emulate instructions that
645 * employ %rip-relative addressing.
648 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]);
649 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]);
650 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]);
652 ASSERT(rmindex > start);
654 if (mod == 0 && rm == 5) {
656 * We need to be sure to avoid other
657 * registers used by this instruction. While
658 * the reg field may determine the op code
659 * rather than denoting a register, assuming
660 * that it denotes a register is always safe.
661 * We leave the REX field intact and use
662 * whatever value's there for simplicity.
665 tp->ftt_ripmode = FASTTRAP_RIP_1 |
667 FASTTRAP_REX_B(rex));
670 tp->ftt_ripmode = FASTTRAP_RIP_2 |
672 FASTTRAP_REX_B(rex));
676 tp->ftt_modrm = tp->ftt_instr[rmindex];
677 tp->ftt_instr[rmindex] =
678 FASTTRAP_MODRM(2, reg, rm);
688 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp)
690 fasttrap_instr_t instr = FASTTRAP_INSTR;
692 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0)
699 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp)
704 * Distinguish between read or write failures and a changed
707 if (uread(p, &instr, 1, tp->ftt_pc) != 0)
709 if (instr != FASTTRAP_INSTR)
711 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0)
719 fasttrap_fulword_noerr(const void *uaddr)
723 if ((ret = fasttrap_fulword(uaddr)) != -1)
732 fasttrap_fuword32_noerr(const void *uaddr)
736 if ((ret = fasttrap_fuword32(uaddr)) != -1)
744 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid,
747 fasttrap_tracepoint_t *tp;
748 fasttrap_bucket_t *bucket;
755 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
756 mutex_enter(pid_mtx);
758 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
760 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
761 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
762 tp->ftt_proc->ftpc_acount != 0)
767 * Don't sweat it if we can't find the tracepoint again; unlike
768 * when we're in fasttrap_pid_probe(), finding the tracepoint here
769 * is not essential to the correct execution of the process.
778 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) {
780 * If there's a branch that could act as a return site, we
781 * need to trace it, and check here if the program counter is
782 * external to the function.
784 if (tp->ftt_type != FASTTRAP_T_RET &&
785 tp->ftt_type != FASTTRAP_T_RET16 &&
786 new_pc - id->fti_probe->ftp_faddr <
787 id->fti_probe->ftp_fsize)
790 dtrace_probe(id->fti_probe->ftp_id,
791 pc - id->fti_probe->ftp_faddr,
792 rp->r_rax, rp->r_rbx, 0, 0);
801 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr)
804 sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP);
806 sqp->sq_info.si_signo = SIGSEGV;
807 sqp->sq_info.si_code = SEGV_MAPERR;
808 sqp->sq_info.si_addr = (caddr_t)addr;
810 mutex_enter(&p->p_lock);
812 mutex_exit(&p->p_lock);
817 ksiginfo_t *ksi = kmem_zalloc(sizeof (ksiginfo_t), KM_SLEEP);
820 ksi->ksi_signo = SIGSEGV;
821 ksi->ksi_code = SEGV_MAPERR;
822 ksi->ksi_addr = (caddr_t)addr;
823 (void) tdksignal(t, SIGSEGV, ksi);
829 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct reg *rp, int argc,
832 int i, x, cap = MIN(argc, probe->ftp_nargs);
833 uintptr_t *stack = (uintptr_t *)rp->r_rsp;
835 for (i = 0; i < cap; i++) {
836 x = probe->ftp_argmap[i];
839 argv[i] = (&rp->r_rdi)[x];
841 argv[i] = fasttrap_fulword_noerr(&stack[x]);
844 for (; i < argc; i++) {
852 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct reg *rp, int argc,
855 int i, x, cap = MIN(argc, probe->ftp_nargs);
856 uint32_t *stack = (uint32_t *)rp->r_rsp;
858 for (i = 0; i < cap; i++) {
859 x = probe->ftp_argmap[i];
861 argv[i] = fasttrap_fuword32_noerr(&stack[x]);
864 for (; i < argc; i++) {
871 fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct reg *rp, uintptr_t *addr)
875 struct segment_descriptor *desc;
877 struct user_segment_descriptor *desc;
879 uint16_t sel = 0, ndx, type;
882 switch (tp->ftt_segment) {
883 case FASTTRAP_SEG_CS:
886 case FASTTRAP_SEG_DS:
889 case FASTTRAP_SEG_ES:
892 case FASTTRAP_SEG_FS:
895 case FASTTRAP_SEG_GS:
898 case FASTTRAP_SEG_SS:
904 * Make sure the given segment register specifies a user priority
905 * selector rather than a kernel selector.
907 if (ISPL(sel) != SEL_UPL)
913 * Check the bounds and grab the descriptor out of the specified
918 if (ndx > p->p_md.md_ldt->ldt_len)
921 desc = (struct segment_descriptor *)
922 p->p_md.md_ldt[ndx].ldt_base;
924 if (ndx > max_ldt_segment)
927 desc = (struct user_segment_descriptor *)
928 p->p_md.md_ldt[ndx].ldt_base;
943 * The descriptor must have user privilege level and it must be
946 if (desc->sd_dpl != SEL_UPL || desc->sd_p != 1)
949 type = desc->sd_type;
952 * If the S bit in the type field is not set, this descriptor can
953 * only be used in system context.
955 if ((type & 0x10) != 0x10)
958 limit = USD_GETLIMIT(desc) * (desc->sd_gran ? PAGESIZE : 1);
960 if (tp->ftt_segment == FASTTRAP_SEG_CS) {
962 * The code/data bit and readable bit must both be set.
964 if ((type & 0xa) != 0xa)
971 * The code/data bit must be clear.
973 if ((type & 0x8) != 0)
977 * If the expand-down bit is clear, we just check the limit as
978 * it would naturally be applied. Otherwise, we need to check
979 * that the address is the range [limit + 1 .. 0xffff] or
980 * [limit + 1 ... 0xffffffff] depending on if the default
981 * operand size bit is set.
983 if ((type & 0x4) == 0) {
986 } else if (desc->sd_def32) {
987 if (*addr < limit + 1 || 0xffff < *addr)
990 if (*addr < limit + 1 || 0xffffffff < *addr)
995 *addr += USD_GETBASE(desc);
1001 fasttrap_pid_probe(struct reg *rp)
1003 proc_t *p = curproc;
1007 uintptr_t pc = rp->r_rip - 1;
1008 uintptr_t new_pc = 0;
1009 fasttrap_bucket_t *bucket;
1013 fasttrap_tracepoint_t *tp, tp_local;
1015 dtrace_icookie_t cookie;
1016 uint_t is_enabled = 0;
1019 * It's possible that a user (in a veritable orgy of bad planning)
1020 * could redirect this thread's flow of control before it reached the
1021 * return probe fasttrap. In this case we need to kill the process
1022 * since it's in a unrecoverable state.
1024 if (curthread->t_dtrace_step) {
1025 ASSERT(curthread->t_dtrace_on);
1026 fasttrap_sigtrap(p, curthread, pc);
1031 * Clear all user tracing flags.
1033 curthread->t_dtrace_ft = 0;
1034 curthread->t_dtrace_pc = 0;
1035 curthread->t_dtrace_npc = 0;
1036 curthread->t_dtrace_scrpc = 0;
1037 curthread->t_dtrace_astpc = 0;
1039 curthread->t_dtrace_regv = 0;
1043 * Treat a child created by a call to vfork(2) as if it were its
1044 * parent. We know that there's only one thread of control in such a
1045 * process: this one.
1048 while (p->p_flag & SVFORK) {
1053 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1054 mutex_enter(pid_mtx);
1057 sx_slock(&proctree_lock);
1058 while (pp->p_vmspace == pp->p_pptr->p_vmspace)
1061 sx_sunlock(&proctree_lock);
1068 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1071 * Lookup the tracepoint that the process just hit.
1073 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1074 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1075 tp->ftt_proc->ftpc_acount != 0)
1080 * If we couldn't find a matching tracepoint, either a tracepoint has
1081 * been inserted without using the pid<pid> ioctl interface (see
1082 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1086 mutex_exit(pid_mtx);
1095 * Set the program counter to the address of the traced instruction
1096 * so that it looks right in ustack() output.
1100 if (tp->ftt_ids != NULL) {
1104 if (p->p_model == DATAMODEL_LP64) {
1105 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1106 fasttrap_probe_t *probe = id->fti_probe;
1108 if (id->fti_ptype == DTFTP_ENTRY) {
1110 * We note that this was an entry
1111 * probe to help ustack() find the
1114 cookie = dtrace_interrupt_disable();
1115 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1116 dtrace_probe(probe->ftp_id, rp->r_rdi,
1117 rp->r_rsi, rp->r_rdx, rp->r_rcx,
1119 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1120 dtrace_interrupt_enable(cookie);
1121 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1123 * Note that in this case, we don't
1124 * call dtrace_probe() since it's only
1125 * an artificial probe meant to change
1126 * the flow of control so that it
1127 * encounters the true probe.
1130 } else if (probe->ftp_argmap == NULL) {
1131 dtrace_probe(probe->ftp_id, rp->r_rdi,
1132 rp->r_rsi, rp->r_rdx, rp->r_rcx,
1137 fasttrap_usdt_args64(probe, rp,
1138 sizeof (t) / sizeof (t[0]), t);
1140 dtrace_probe(probe->ftp_id, t[0], t[1],
1146 uintptr_t s0, s1, s2, s3, s4, s5;
1147 uint32_t *stack = (uint32_t *)rp->r_esp;
1150 * In 32-bit mode, all arguments are passed on the
1151 * stack. If this is a function entry probe, we need
1152 * to skip the first entry on the stack as it
1153 * represents the return address rather than a
1154 * parameter to the function.
1156 s0 = fasttrap_fuword32_noerr(&stack[0]);
1157 s1 = fasttrap_fuword32_noerr(&stack[1]);
1158 s2 = fasttrap_fuword32_noerr(&stack[2]);
1159 s3 = fasttrap_fuword32_noerr(&stack[3]);
1160 s4 = fasttrap_fuword32_noerr(&stack[4]);
1161 s5 = fasttrap_fuword32_noerr(&stack[5]);
1163 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1164 fasttrap_probe_t *probe = id->fti_probe;
1166 if (id->fti_ptype == DTFTP_ENTRY) {
1168 * We note that this was an entry
1169 * probe to help ustack() find the
1172 cookie = dtrace_interrupt_disable();
1173 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1174 dtrace_probe(probe->ftp_id, s1, s2,
1176 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1177 dtrace_interrupt_enable(cookie);
1178 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1180 * Note that in this case, we don't
1181 * call dtrace_probe() since it's only
1182 * an artificial probe meant to change
1183 * the flow of control so that it
1184 * encounters the true probe.
1187 } else if (probe->ftp_argmap == NULL) {
1188 dtrace_probe(probe->ftp_id, s0, s1,
1193 fasttrap_usdt_args32(probe, rp,
1194 sizeof (t) / sizeof (t[0]), t);
1196 dtrace_probe(probe->ftp_id, t[0], t[1],
1200 #endif /* __amd64 */
1207 * We're about to do a bunch of work so we cache a local copy of
1208 * the tracepoint to emulate the instruction, and then find the
1209 * tracepoint again later if we need to light up any return probes.
1213 mutex_exit(pid_mtx);
1220 * Set the program counter to appear as though the traced instruction
1221 * had completely executed. This ensures that fasttrap_getreg() will
1222 * report the expected value for REG_RIP.
1224 rp->r_rip = pc + tp->ftt_size;
1227 * If there's an is-enabled probe connected to this tracepoint it
1228 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1229 * instruction that was placed there by DTrace when the binary was
1230 * linked. As this probe is, in fact, enabled, we need to stuff 1
1231 * into %eax or %rax. Accordingly, we can bypass all the instruction
1232 * emulation logic since we know the inevitable result. It's possible
1233 * that a user could construct a scenario where the 'is-enabled'
1234 * probe was on some other instruction, but that would be a rather
1235 * exotic way to shoot oneself in the foot.
1244 * We emulate certain types of instructions to ensure correctness
1245 * (in the case of position dependent instructions) or optimize
1246 * common cases. The rest we have the thread execute back in user-
1249 switch (tp->ftt_type) {
1250 case FASTTRAP_T_RET:
1251 case FASTTRAP_T_RET16:
1258 * We have to emulate _every_ facet of the behavior of a ret
1259 * instruction including what happens if the load from %esp
1260 * fails; in that case, we send a SIGSEGV.
1263 if (p->p_model == DATAMODEL_NATIVE) {
1264 ret = dst = fasttrap_fulword((void *)rp->r_rsp);
1265 addr = rp->r_rsp + sizeof (uintptr_t);
1270 ret = dst32 = fasttrap_fuword32((void *)rp->r_esp);
1272 addr = rp->r_esp + sizeof (uint32_t);
1279 fasttrap_sigsegv(p, curthread, rp->r_rsp);
1284 if (tp->ftt_type == FASTTRAP_T_RET16)
1285 addr += tp->ftt_dest;
1292 case FASTTRAP_T_JCC:
1296 switch (tp->ftt_code) {
1298 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) != 0;
1301 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0;
1304 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0;
1307 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0;
1310 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0;
1313 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0;
1316 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0 ||
1317 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0;
1320 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0 &&
1321 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0;
1324 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) != 0;
1327 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0;
1330 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) != 0;
1333 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) == 0;
1336 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1337 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1340 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1341 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1344 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 ||
1345 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1346 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1349 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1350 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1351 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1357 new_pc = tp->ftt_dest;
1359 new_pc = pc + tp->ftt_size;
1363 case FASTTRAP_T_LOOP:
1367 greg_t cx = rp->r_rcx--;
1369 greg_t cx = rp->r_ecx--;
1372 switch (tp->ftt_code) {
1373 case FASTTRAP_LOOPNZ:
1374 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1377 case FASTTRAP_LOOPZ:
1378 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 &&
1387 new_pc = tp->ftt_dest;
1389 new_pc = pc + tp->ftt_size;
1393 case FASTTRAP_T_JCXZ:
1396 greg_t cx = rp->r_rcx;
1398 greg_t cx = rp->r_ecx;
1402 new_pc = tp->ftt_dest;
1404 new_pc = pc + tp->ftt_size;
1408 case FASTTRAP_T_PUSHL_EBP:
1413 if (p->p_model == DATAMODEL_NATIVE) {
1414 rp->r_rsp -= sizeof (uintptr_t);
1415 ret = fasttrap_sulword((void *)rp->r_rsp, rp->r_rbp);
1419 rp->r_rsp -= sizeof (uint32_t);
1420 ret = fasttrap_suword32((void *)rp->r_rsp, rp->r_rbp);
1427 fasttrap_sigsegv(p, curthread, rp->r_rsp);
1432 new_pc = pc + tp->ftt_size;
1436 case FASTTRAP_T_NOP:
1437 new_pc = pc + tp->ftt_size;
1440 case FASTTRAP_T_JMP:
1441 case FASTTRAP_T_CALL:
1442 if (tp->ftt_code == 0) {
1443 new_pc = tp->ftt_dest;
1445 uintptr_t value, addr = tp->ftt_dest;
1447 if (tp->ftt_base != FASTTRAP_NOREG)
1448 addr += fasttrap_getreg(rp, tp->ftt_base);
1449 if (tp->ftt_index != FASTTRAP_NOREG)
1450 addr += fasttrap_getreg(rp, tp->ftt_index) <<
1453 if (tp->ftt_code == 1) {
1455 * If there's a segment prefix for this
1456 * instruction, we'll need to check permissions
1457 * and bounds on the given selector, and adjust
1458 * the address accordingly.
1460 if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1461 fasttrap_do_seg(tp, rp, &addr) != 0) {
1462 fasttrap_sigsegv(p, curthread, addr);
1468 if (p->p_model == DATAMODEL_NATIVE) {
1470 if ((value = fasttrap_fulword((void *)addr))
1472 fasttrap_sigsegv(p, curthread,
1481 addr = (uintptr_t)(uint32_t)addr;
1482 if ((value32 = fasttrap_fuword32((void *)addr))
1484 fasttrap_sigsegv(p, curthread,
1498 * If this is a call instruction, we need to push the return
1499 * address onto the stack. If this fails, we send the process
1500 * a SIGSEGV and reset the pc to emulate what would happen if
1501 * this instruction weren't traced.
1503 if (tp->ftt_type == FASTTRAP_T_CALL) {
1505 uintptr_t addr = 0, pcps;
1507 if (p->p_model == DATAMODEL_NATIVE) {
1508 addr = rp->r_rsp - sizeof (uintptr_t);
1509 pcps = pc + tp->ftt_size;
1510 ret = fasttrap_sulword((void *)addr, pcps);
1513 addr = rp->r_rsp - sizeof (uint32_t);
1514 pcps = (uint32_t)(pc + tp->ftt_size);
1515 ret = fasttrap_suword32((void *)addr, pcps);
1521 fasttrap_sigsegv(p, curthread, addr);
1531 case FASTTRAP_T_COMMON:
1534 #if defined(__amd64)
1535 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1537 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1541 klwp_t *lwp = ttolwp(curthread);
1544 * Compute the address of the ulwp_t and step over the
1545 * ul_self pointer. The method used to store the user-land
1546 * thread pointer is very different on 32- and 64-bit
1549 #if defined(__amd64)
1550 if (p->p_model == DATAMODEL_LP64) {
1551 addr = lwp->lwp_pcb.pcb_fsbase;
1552 addr += sizeof (void *);
1554 addr = lwp->lwp_pcb.pcb_gsbase;
1555 addr += sizeof (caddr32_t);
1558 addr = USD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc);
1559 addr += sizeof (void *);
1562 fasttrap_scrspace_t *scrspace;
1563 scrspace = fasttrap_scraddr(curthread, tp->ftt_proc);
1564 if (scrspace == NULL) {
1566 * We failed to allocate scratch space for this thread.
1567 * Try to write the original instruction back out and
1570 if (fasttrap_copyout(tp->ftt_instr, (void *)pc,
1572 fasttrap_sigtrap(p, curthread, pc);
1576 addr = scrspace->ftss_addr;
1580 * Generic Instruction Tracing
1581 * ---------------------------
1583 * This is the layout of the scratch space in the user-land
1584 * thread structure for our generated instructions.
1587 * ------------------------ -----
1588 * a: <original instruction> <= 15
1589 * jmp <pc + tp->ftt_size> 5
1590 * b: <original instruction> <= 15
1591 * int T_DTRACE_RET 2
1596 * ------------------------ -----
1597 * a: <original instruction> <= 15
1599 * <pc + tp->ftt_size> 8
1600 * b: <original instruction> <= 15
1601 * int T_DTRACE_RET 2
1605 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1606 * to b. If we encounter a signal on the way out of the
1607 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1608 * so that we execute the original instruction and re-enter
1609 * the kernel rather than redirecting to the next instruction.
1611 * If there are return probes (so we know that we're going to
1612 * need to reenter the kernel after executing the original
1613 * instruction), the scratch space will just contain the
1614 * original instruction followed by an interrupt -- the same
1617 * %rip-relative Addressing
1618 * ------------------------
1620 * There's a further complication in 64-bit mode due to %rip-
1621 * relative addressing. While this is clearly a beneficial
1622 * architectural decision for position independent code, it's
1623 * hard not to see it as a personal attack against the pid
1624 * provider since before there was a relatively small set of
1625 * instructions to emulate; with %rip-relative addressing,
1626 * almost every instruction can potentially depend on the
1627 * address at which it's executed. Rather than emulating
1628 * the broad spectrum of instructions that can now be
1629 * position dependent, we emulate jumps and others as in
1630 * 32-bit mode, and take a different tack for instructions
1631 * using %rip-relative addressing.
1633 * For every instruction that uses the ModRM byte, the
1634 * in-kernel disassembler reports its location. We use the
1635 * ModRM byte to identify that an instruction uses
1636 * %rip-relative addressing and to see what other registers
1637 * the instruction uses. To emulate those instructions,
1638 * we modify the instruction to be %rax-relative rather than
1639 * %rip-relative (or %rcx-relative if the instruction uses
1640 * %rax; or %r8- or %r9-relative if the REX.B is present so
1641 * we don't have to rewrite the REX prefix). We then load
1642 * the value that %rip would have been into the scratch
1643 * register and generate an instruction to reset the scratch
1644 * register back to its original value. The instruction
1645 * sequence looks like this:
1647 * 64-mode %rip-relative bytes
1648 * ------------------------ -----
1649 * a: <modified instruction> <= 15
1650 * movq $<value>, %<scratch> 6
1652 * <pc + tp->ftt_size> 8
1653 * b: <modified instruction> <= 15
1654 * int T_DTRACE_RET 2
1658 * We set curthread->t_dtrace_regv so that upon receiving
1659 * a signal we can reset the value of the scratch register.
1662 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
1664 curthread->t_dtrace_scrpc = addr;
1665 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1669 if (tp->ftt_ripmode != 0) {
1672 ASSERT(p->p_model == DATAMODEL_LP64);
1673 ASSERT(tp->ftt_ripmode &
1674 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2));
1677 * If this was a %rip-relative instruction, we change
1678 * it to be either a %rax- or %rcx-relative
1679 * instruction (depending on whether those registers
1680 * are used as another operand; or %r8- or %r9-
1681 * relative depending on the value of REX.B). We then
1682 * set that register and generate a movq instruction
1683 * to reset the value.
1685 if (tp->ftt_ripmode & FASTTRAP_RIP_X)
1686 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1);
1688 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0);
1690 if (tp->ftt_ripmode & FASTTRAP_RIP_1)
1691 scratch[i++] = FASTTRAP_MOV_EAX;
1693 scratch[i++] = FASTTRAP_MOV_ECX;
1695 switch (tp->ftt_ripmode) {
1696 case FASTTRAP_RIP_1:
1698 curthread->t_dtrace_reg = REG_RAX;
1700 case FASTTRAP_RIP_2:
1702 curthread->t_dtrace_reg = REG_RCX;
1704 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X:
1706 curthread->t_dtrace_reg = REG_R8;
1708 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X:
1710 curthread->t_dtrace_reg = REG_R9;
1714 /* LINTED - alignment */
1715 *(uint64_t *)&scratch[i] = *reg;
1716 curthread->t_dtrace_regv = *reg;
1717 *reg = pc + tp->ftt_size;
1718 i += sizeof (uint64_t);
1723 * Generate the branch instruction to what would have
1724 * normally been the subsequent instruction. In 32-bit mode,
1725 * this is just a relative branch; in 64-bit mode this is a
1726 * %rip-relative branch that loads the 64-bit pc value
1727 * immediately after the jmp instruction.
1730 if (p->p_model == DATAMODEL_LP64) {
1731 scratch[i++] = FASTTRAP_GROUP5_OP;
1732 scratch[i++] = FASTTRAP_MODRM(0, 4, 5);
1733 /* LINTED - alignment */
1734 *(uint32_t *)&scratch[i] = 0;
1735 i += sizeof (uint32_t);
1736 /* LINTED - alignment */
1737 *(uint64_t *)&scratch[i] = pc + tp->ftt_size;
1738 i += sizeof (uint64_t);
1743 * Set up the jmp to the next instruction; note that
1744 * the size of the traced instruction cancels out.
1746 scratch[i++] = FASTTRAP_JMP32;
1747 /* LINTED - alignment */
1748 *(uint32_t *)&scratch[i] = pc - addr - 5;
1749 i += sizeof (uint32_t);
1755 curthread->t_dtrace_astpc = addr + i;
1756 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1758 scratch[i++] = FASTTRAP_INT;
1759 scratch[i++] = T_DTRACE_RET;
1761 ASSERT(i <= sizeof (scratch));
1764 if (fasttrap_copyout(scratch, (char *)addr, i)) {
1766 if (uwrite(p, scratch, i, addr)) {
1768 fasttrap_sigtrap(p, curthread, pc);
1772 if (tp->ftt_retids != NULL) {
1773 curthread->t_dtrace_step = 1;
1774 curthread->t_dtrace_ret = 1;
1775 new_pc = curthread->t_dtrace_astpc;
1777 new_pc = curthread->t_dtrace_scrpc;
1780 curthread->t_dtrace_pc = pc;
1781 curthread->t_dtrace_npc = pc + tp->ftt_size;
1782 curthread->t_dtrace_on = 1;
1787 panic("fasttrap: mishandled an instruction");
1792 * If there were no return probes when we first found the tracepoint,
1793 * we should feel no obligation to honor any return probes that were
1794 * subsequently enabled -- they'll just have to wait until the next
1797 if (tp->ftt_retids != NULL) {
1799 * We need to wait until the results of the instruction are
1800 * apparent before invoking any return probes. If this
1801 * instruction was emulated we can just call
1802 * fasttrap_return_common(); if it needs to be executed, we
1803 * need to wait until the user thread returns to the kernel.
1805 if (tp->ftt_type != FASTTRAP_T_COMMON) {
1807 * Set the program counter to the address of the traced
1808 * instruction so that it looks right in ustack()
1809 * output. We had previously set it to the end of the
1810 * instruction to simplify %rip-relative addressing.
1814 fasttrap_return_common(rp, pc, pid, new_pc);
1816 ASSERT(curthread->t_dtrace_ret != 0);
1817 ASSERT(curthread->t_dtrace_pc == pc);
1818 ASSERT(curthread->t_dtrace_scrpc != 0);
1819 ASSERT(new_pc == curthread->t_dtrace_astpc);
1827 proc_write_regs(curthread, rp);
1836 fasttrap_return_probe(struct reg *rp)
1838 proc_t *p = curproc;
1839 uintptr_t pc = curthread->t_dtrace_pc;
1840 uintptr_t npc = curthread->t_dtrace_npc;
1842 curthread->t_dtrace_pc = 0;
1843 curthread->t_dtrace_npc = 0;
1844 curthread->t_dtrace_scrpc = 0;
1845 curthread->t_dtrace_astpc = 0;
1849 * Treat a child created by a call to vfork(2) as if it were its
1850 * parent. We know that there's only one thread of control in such a
1851 * process: this one.
1853 while (p->p_flag & SVFORK) {
1859 * We set rp->r_rip to the address of the traced instruction so
1860 * that it appears to dtrace_probe() that we're on the original
1861 * instruction, and so that the user can't easily detect our
1862 * complex web of lies. dtrace_return_probe() (our caller)
1863 * will correctly set %pc after we return.
1867 fasttrap_return_common(rp, pc, p->p_pid, npc);
1874 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
1879 fill_regs(curthread, &r);
1881 return (fasttrap_anarg(&r, 1, argno));
1886 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
1891 fill_regs(curthread, &r);
1893 return (fasttrap_anarg(&r, 0, argno));
1897 fasttrap_getreg(struct reg *rp, uint_t reg)
1901 case REG_R15: return (rp->r_r15);
1902 case REG_R14: return (rp->r_r14);
1903 case REG_R13: return (rp->r_r13);
1904 case REG_R12: return (rp->r_r12);
1905 case REG_R11: return (rp->r_r11);
1906 case REG_R10: return (rp->r_r10);
1907 case REG_R9: return (rp->r_r9);
1908 case REG_R8: return (rp->r_r8);
1909 case REG_RDI: return (rp->r_rdi);
1910 case REG_RSI: return (rp->r_rsi);
1911 case REG_RBP: return (rp->r_rbp);
1912 case REG_RBX: return (rp->r_rbx);
1913 case REG_RDX: return (rp->r_rdx);
1914 case REG_RCX: return (rp->r_rcx);
1915 case REG_RAX: return (rp->r_rax);
1916 case REG_TRAPNO: return (rp->r_trapno);
1917 case REG_ERR: return (rp->r_err);
1918 case REG_RIP: return (rp->r_rip);
1919 case REG_CS: return (rp->r_cs);
1921 case REG_RFL: return (rp->r_rfl);
1923 case REG_RSP: return (rp->r_rsp);
1924 case REG_SS: return (rp->r_ss);
1925 case REG_FS: return (rp->r_fs);
1926 case REG_GS: return (rp->r_gs);
1927 case REG_DS: return (rp->r_ds);
1928 case REG_ES: return (rp->r_es);
1929 case REG_FSBASE: return (rdmsr(MSR_FSBASE));
1930 case REG_GSBASE: return (rdmsr(MSR_GSBASE));
1933 panic("dtrace: illegal register constant");
1938 panic("dtrace: illegal register constant");
1940 return (((greg_t *)&rp->r_gs)[reg]);