2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <dev/drm2/drmP.h>
33 #include <dev/drm2/drm.h>
34 #include <dev/drm2/drm_crtc.h>
35 #include <dev/drm2/drm_edid.h>
36 #include <dev/drm2/i915/i915_drm.h>
37 #include <dev/drm2/i915/i915_drv.h>
38 #include <dev/drm2/i915/intel_sdvo_regs.h>
39 #include <dev/drm2/i915/intel_drv.h>
40 #include <dev/iicbus/iic.h>
41 #include <dev/iicbus/iiconf.h>
42 #include "iicbus_if.h"
44 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
45 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
46 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
47 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
49 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
52 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
53 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
54 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
55 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
56 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
59 static const char *tv_format_names[] = {
60 "NTSC_M" , "NTSC_J" , "NTSC_443",
61 "PAL_B" , "PAL_D" , "PAL_G" ,
62 "PAL_H" , "PAL_I" , "PAL_M" ,
63 "PAL_N" , "PAL_NC" , "PAL_60" ,
64 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
65 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
69 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
72 struct intel_encoder base;
77 device_t ddc_iic_bus, ddc;
79 /* Register for the SDVO device: SDVOB or SDVOC */
82 /* Active outputs controlled by this SDVO output */
83 uint16_t controlled_output;
86 * Capabilities of the SDVO device returned by
87 * i830_sdvo_get_capabilities()
89 struct intel_sdvo_caps caps;
91 /* Pixel clock limitations reported by the SDVO device, in kHz */
92 int pixel_clock_min, pixel_clock_max;
95 * For multiple function SDVO device,
96 * this is for current attached outputs.
98 uint16_t attached_output;
101 * Hotplug activation bits for this device
103 uint8_t hotplug_active[2];
106 * This is used to select the color range of RBG outputs in HDMI mode.
107 * It is only valid when using TMDS encoding and 8 bit per color mode.
109 uint32_t color_range;
112 * This is set if we're going to treat the device as TV-out.
114 * While we have these nice friendly flags for output types that ought
115 * to decide this for us, the S-Video output on our HDMI+S-Video card
116 * shows up as RGB1 (VGA).
120 /* On different gens SDVOB is at different places. */
123 /* This is for current tv format name */
127 * This is set if we treat the device as HDMI, instead of DVI.
130 bool has_hdmi_monitor;
134 * This is set if we detect output of sdvo device as LVDS and
135 * have a valid fixed mode to use with the panel.
140 * This is sdvo fixed pannel mode pointer
142 struct drm_display_mode *sdvo_lvds_fixed_mode;
144 /* DDC bus used by this SDVO encoder */
147 /* Input timings for adjusted_mode */
148 struct intel_sdvo_dtd input_dtd;
151 struct intel_sdvo_connector {
152 struct intel_connector base;
154 /* Mark the type of connector */
155 uint16_t output_flag;
157 enum hdmi_force_audio force_audio;
159 /* This contains all current supported TV format */
160 u8 tv_format_supported[TV_FORMAT_NUM];
161 int format_supported_num;
162 struct drm_property *tv_format;
164 /* add the property for the SDVO-TV */
165 struct drm_property *left;
166 struct drm_property *right;
167 struct drm_property *top;
168 struct drm_property *bottom;
169 struct drm_property *hpos;
170 struct drm_property *vpos;
171 struct drm_property *contrast;
172 struct drm_property *saturation;
173 struct drm_property *hue;
174 struct drm_property *sharpness;
175 struct drm_property *flicker_filter;
176 struct drm_property *flicker_filter_adaptive;
177 struct drm_property *flicker_filter_2d;
178 struct drm_property *tv_chroma_filter;
179 struct drm_property *tv_luma_filter;
180 struct drm_property *dot_crawl;
182 /* add the property for the SDVO-TV/LVDS */
183 struct drm_property *brightness;
185 /* Add variable to record current setting for the above property */
186 u32 left_margin, right_margin, top_margin, bottom_margin;
188 /* this is to get the range of margin.*/
189 u32 max_hscan, max_vscan;
190 u32 max_hpos, cur_hpos;
191 u32 max_vpos, cur_vpos;
192 u32 cur_brightness, max_brightness;
193 u32 cur_contrast, max_contrast;
194 u32 cur_saturation, max_saturation;
195 u32 cur_hue, max_hue;
196 u32 cur_sharpness, max_sharpness;
197 u32 cur_flicker_filter, max_flicker_filter;
198 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
199 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
200 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
201 u32 cur_tv_luma_filter, max_tv_luma_filter;
202 u32 cur_dot_crawl, max_dot_crawl;
205 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
207 return container_of(encoder, struct intel_sdvo, base.base);
210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
212 return container_of(intel_attached_encoder(connector),
213 struct intel_sdvo, base);
216 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
218 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
222 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
224 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
225 struct intel_sdvo_connector *intel_sdvo_connector,
228 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
229 struct intel_sdvo_connector *intel_sdvo_connector);
232 * Writes the SDVOB or SDVOC with the given value, but always writes both
233 * SDVOB and SDVOC to work around apparent hardware issues (according to
234 * comments in the BIOS).
236 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
238 struct drm_device *dev = intel_sdvo->base.base.dev;
239 struct drm_i915_private *dev_priv = dev->dev_private;
240 u32 bval = val, cval = val;
243 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
244 I915_WRITE(intel_sdvo->sdvo_reg, val);
245 I915_READ(intel_sdvo->sdvo_reg);
249 if (intel_sdvo->sdvo_reg == SDVOB) {
250 cval = I915_READ(SDVOC);
252 bval = I915_READ(SDVOB);
255 * Write the registers twice for luck. Sometimes,
256 * writing them only once doesn't appear to 'stick'.
257 * The BIOS does this too. Yay, magic
259 for (i = 0; i < 2; i++)
261 I915_WRITE(SDVOB, bval);
263 I915_WRITE(SDVOC, cval);
268 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
270 struct iic_msg msgs[] = {
272 .slave = intel_sdvo->slave_addr << 1,
278 .slave = intel_sdvo->slave_addr << 1,
286 if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0)
289 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
293 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
294 /** Mapping of command numbers to names, for debug output */
295 static const struct _sdvo_cmd_name {
298 } sdvo_cmd_names[] = {
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
343 /* Add the op code for SDVO enhancements */
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
412 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
414 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
415 const void *args, int args_len)
419 if ((drm_debug & DRM_DEBUGBITS_KMS) == 0)
421 DRM_DEBUG_KMS("%s: W: %02X ", SDVO_NAME(intel_sdvo), cmd);
422 for (i = 0; i < args_len; i++)
423 printf("%02X ", ((const u8 *)args)[i]);
426 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
427 if (cmd == sdvo_cmd_names[i].cmd) {
428 printf("(%s)", sdvo_cmd_names[i].name);
432 if (i == ARRAY_SIZE(sdvo_cmd_names))
433 printf("(%02X)", cmd);
437 static const char *cmd_status_names[] = {
443 "Target not specified",
444 "Scaling not supported"
448 intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args,
451 u8 buf[args_len*2 + 2], status;
452 struct iic_msg msgs[args_len + 3];
455 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
457 for (i = 0; i < args_len; i++) {
458 msgs[i].slave = intel_sdvo->slave_addr << 1;
461 msgs[i].buf = buf + 2 *i;
462 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
463 buf[2*i + 1] = ((const u8*)args)[i];
465 msgs[i].slave = intel_sdvo->slave_addr << 1;
468 msgs[i].buf = buf + 2*i;
469 buf[2*i + 0] = SDVO_I2C_OPCODE;
472 /* the following two are to read the response */
473 status = SDVO_I2C_CMD_STATUS;
474 msgs[i+1].slave = intel_sdvo->slave_addr << 1;
477 msgs[i+1].buf = &status;
479 msgs[i+2].slave = intel_sdvo->slave_addr << 1;
480 msgs[i+2].flags = IIC_M_RD;
482 msgs[i+2].buf = &status;
484 ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3);
486 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
491 /* failure in I2C transfer */
492 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
501 intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, void *response,
508 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
511 * The documentation states that all commands will be
512 * processed within 15µs, and that we need only poll
513 * the status byte a maximum of 3 times in order for the
514 * command to be complete.
516 * Check 5 times in case the hardware failed to read the docs.
518 if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS, &status))
521 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
523 if (!intel_sdvo_read_byte(intel_sdvo,
524 SDVO_I2C_CMD_STATUS, &status))
528 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) {
529 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
530 printf("(%s)", cmd_status_names[status]);
532 printf("(??? %d)", status);
535 if (status != SDVO_CMD_STATUS_SUCCESS)
538 /* Read the command response */
539 for (i = 0; i < response_len; i++) {
540 if (!intel_sdvo_read_byte(intel_sdvo,
541 SDVO_I2C_RETURN_0 + i,
542 &((u8 *)response)[i]))
544 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0)
545 printf(" %02X", ((u8 *)response)[i]);
547 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0)
552 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0)
553 printf("... failed\n");
557 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
559 if (mode->clock >= 100000)
561 else if (mode->clock >= 50000)
567 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570 /* This must be the immediately preceding write before the i2c xfer */
571 return intel_sdvo_write_cmd(intel_sdvo,
572 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
576 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
578 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
585 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
587 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590 return intel_sdvo_read_response(intel_sdvo, value, len);
593 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
595 struct intel_sdvo_set_target_input_args targets = {0};
596 return intel_sdvo_set_value(intel_sdvo,
597 SDVO_CMD_SET_TARGET_INPUT,
598 &targets, sizeof(targets));
602 * Return whether each input is trained.
604 * This function is making an assumption about the layout of the response,
605 * which should be checked against the docs.
607 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
609 struct intel_sdvo_get_trained_inputs_response response;
611 CTASSERT(sizeof(response) == 1);
612 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
613 &response, sizeof(response)))
616 *input_1 = response.input0_trained;
617 *input_2 = response.input1_trained;
621 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
624 return intel_sdvo_set_value(intel_sdvo,
625 SDVO_CMD_SET_ACTIVE_OUTPUTS,
626 &outputs, sizeof(outputs));
629 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
632 u8 state = SDVO_ENCODER_STATE_ON;
635 case DRM_MODE_DPMS_ON:
636 state = SDVO_ENCODER_STATE_ON;
638 case DRM_MODE_DPMS_STANDBY:
639 state = SDVO_ENCODER_STATE_STANDBY;
641 case DRM_MODE_DPMS_SUSPEND:
642 state = SDVO_ENCODER_STATE_SUSPEND;
644 case DRM_MODE_DPMS_OFF:
645 state = SDVO_ENCODER_STATE_OFF;
649 return intel_sdvo_set_value(intel_sdvo,
650 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
653 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
657 struct intel_sdvo_pixel_clock_range clocks;
659 CTASSERT(sizeof(clocks) == 4);
660 if (!intel_sdvo_get_value(intel_sdvo,
661 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
662 &clocks, sizeof(clocks)))
665 /* Convert the values from units of 10 kHz to kHz. */
666 *clock_min = clocks.min * 10;
667 *clock_max = clocks.max * 10;
671 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
674 return intel_sdvo_set_value(intel_sdvo,
675 SDVO_CMD_SET_TARGET_OUTPUT,
676 &outputs, sizeof(outputs));
679 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
680 struct intel_sdvo_dtd *dtd)
682 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
683 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
686 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
687 struct intel_sdvo_dtd *dtd)
689 return intel_sdvo_set_timing(intel_sdvo,
690 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
694 struct intel_sdvo_dtd *dtd)
696 return intel_sdvo_set_timing(intel_sdvo,
697 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
701 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
706 struct intel_sdvo_preferred_input_timing_args args;
708 memset(&args, 0, sizeof(args));
711 args.height = height;
714 if (intel_sdvo->is_lvds &&
715 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
716 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
719 return intel_sdvo_set_value(intel_sdvo,
720 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
721 &args, sizeof(args));
724 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
725 struct intel_sdvo_dtd *dtd)
727 CTASSERT(sizeof(dtd->part1) == 8);
728 CTASSERT(sizeof(dtd->part2) == 8);
729 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
730 &dtd->part1, sizeof(dtd->part1)) &&
731 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
732 &dtd->part2, sizeof(dtd->part2));
735 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
737 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
740 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
741 const struct drm_display_mode *mode)
743 uint16_t width, height;
744 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
745 uint16_t h_sync_offset, v_sync_offset;
748 width = mode->hdisplay;
749 height = mode->vdisplay;
751 /* do some mode translations */
752 h_blank_len = mode->htotal - mode->hdisplay;
753 h_sync_len = mode->hsync_end - mode->hsync_start;
755 v_blank_len = mode->vtotal - mode->vdisplay;
756 v_sync_len = mode->vsync_end - mode->vsync_start;
758 h_sync_offset = mode->hsync_start - mode->hdisplay;
759 v_sync_offset = mode->vsync_start - mode->vdisplay;
761 mode_clock = mode->clock;
762 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
764 dtd->part1.clock = mode_clock;
766 dtd->part1.h_active = width & 0xff;
767 dtd->part1.h_blank = h_blank_len & 0xff;
768 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
769 ((h_blank_len >> 8) & 0xf);
770 dtd->part1.v_active = height & 0xff;
771 dtd->part1.v_blank = v_blank_len & 0xff;
772 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
773 ((v_blank_len >> 8) & 0xf);
775 dtd->part2.h_sync_off = h_sync_offset & 0xff;
776 dtd->part2.h_sync_width = h_sync_len & 0xff;
777 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
779 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
780 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
781 ((v_sync_len & 0x30) >> 4);
783 dtd->part2.dtd_flags = 0x18;
784 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
785 dtd->part2.dtd_flags |= 0x2;
786 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
787 dtd->part2.dtd_flags |= 0x4;
789 dtd->part2.sdvo_flags = 0;
790 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
791 dtd->part2.reserved = 0;
794 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
795 const struct intel_sdvo_dtd *dtd)
797 mode->hdisplay = dtd->part1.h_active;
798 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
799 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
800 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
801 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
802 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
803 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
804 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
806 mode->vdisplay = dtd->part1.v_active;
807 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
808 mode->vsync_start = mode->vdisplay;
809 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
810 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
811 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
812 mode->vsync_end = mode->vsync_start +
813 (dtd->part2.v_sync_off_width & 0xf);
814 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
815 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
816 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
818 mode->clock = dtd->part1.clock * 10;
820 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
821 if (dtd->part2.dtd_flags & 0x2)
822 mode->flags |= DRM_MODE_FLAG_PHSYNC;
823 if (dtd->part2.dtd_flags & 0x4)
824 mode->flags |= DRM_MODE_FLAG_PVSYNC;
827 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
829 struct intel_sdvo_encode encode;
831 CTASSERT(sizeof(encode) == 2);
832 return intel_sdvo_get_value(intel_sdvo,
833 SDVO_CMD_GET_SUPP_ENCODE,
834 &encode, sizeof(encode));
837 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
840 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
843 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
846 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
850 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
853 uint8_t set_buf_index[2];
859 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
861 for (i = 0; i <= av_split; i++) {
862 set_buf_index[0] = i; set_buf_index[1] = 0;
863 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
865 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
866 intel_sdvo_read_response(encoder, &buf_size, 1);
869 for (j = 0; j <= buf_size; j += 8) {
870 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
872 intel_sdvo_read_response(encoder, pos, 8);
879 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
881 struct dip_infoframe avi_if = {
882 .type = DIP_TYPE_AVI,
883 .ver = DIP_VERSION_AVI,
886 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
887 uint8_t set_buf_index[2] = { 1, 0 };
888 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
889 uint64_t *data = (uint64_t *)sdvo_data;
892 intel_dip_infoframe_csum(&avi_if);
894 /* sdvo spec says that the ecc is handled by the hw, and it looks like
895 * we must not send the ecc field, either. */
896 memcpy(sdvo_data, &avi_if, 3);
897 sdvo_data[3] = avi_if.checksum;
898 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
900 if (!intel_sdvo_set_value(intel_sdvo,
901 SDVO_CMD_SET_HBUF_INDEX,
905 for (i = 0; i < sizeof(sdvo_data); i += 8) {
906 if (!intel_sdvo_set_value(intel_sdvo,
907 SDVO_CMD_SET_HBUF_DATA,
913 return intel_sdvo_set_value(intel_sdvo,
914 SDVO_CMD_SET_HBUF_TXRATE,
918 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
920 struct intel_sdvo_tv_format format;
923 format_map = 1 << intel_sdvo->tv_format_index;
924 memset(&format, 0, sizeof(format));
925 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
927 CTASSERT(sizeof(format) == 6);
928 return intel_sdvo_set_value(intel_sdvo,
929 SDVO_CMD_SET_TV_FORMAT,
930 &format, sizeof(format));
934 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
935 const struct drm_display_mode *mode)
937 struct intel_sdvo_dtd output_dtd;
939 if (!intel_sdvo_set_target_output(intel_sdvo,
940 intel_sdvo->attached_output))
943 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
944 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
951 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
952 const struct drm_display_mode *mode,
953 struct drm_display_mode *adjusted_mode)
955 /* Reset the input timing to the screen. Assume always input 0. */
956 if (!intel_sdvo_set_target_input(intel_sdvo))
959 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
965 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
966 &intel_sdvo->input_dtd))
969 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
974 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
975 const struct drm_display_mode *mode,
976 struct drm_display_mode *adjusted_mode)
978 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
981 /* We need to construct preferred input timings based on our
982 * output timings. To do that, we have to set the output
983 * timings, even though this isn't really the right place in
984 * the sequence to do it. Oh well.
986 if (intel_sdvo->is_tv) {
987 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
990 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
993 } else if (intel_sdvo->is_lvds) {
994 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
995 intel_sdvo->sdvo_lvds_fixed_mode))
998 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1003 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1004 * SDVO device will factor out the multiplier during mode_set.
1006 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1007 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1012 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1013 struct drm_display_mode *mode,
1014 struct drm_display_mode *adjusted_mode)
1016 struct drm_device *dev = encoder->dev;
1017 struct drm_i915_private *dev_priv = dev->dev_private;
1018 struct drm_crtc *crtc = encoder->crtc;
1019 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1020 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1022 struct intel_sdvo_in_out_map in_out;
1023 struct intel_sdvo_dtd input_dtd, output_dtd;
1024 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1030 /* First, set the input mapping for the first input to our controlled
1031 * output. This is only correct if we're a single-input device, in
1032 * which case the first input is the output from the appropriate SDVO
1033 * channel on the motherboard. In a two-input device, the first input
1034 * will be SDVOB and the second SDVOC.
1036 in_out.in0 = intel_sdvo->attached_output;
1039 intel_sdvo_set_value(intel_sdvo,
1040 SDVO_CMD_SET_IN_OUT_MAP,
1041 &in_out, sizeof(in_out));
1043 /* Set the output timings to the screen */
1044 if (!intel_sdvo_set_target_output(intel_sdvo,
1045 intel_sdvo->attached_output))
1048 /* lvds has a special fixed output timing. */
1049 if (intel_sdvo->is_lvds)
1050 intel_sdvo_get_dtd_from_mode(&output_dtd,
1051 intel_sdvo->sdvo_lvds_fixed_mode);
1053 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1054 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1056 /* Set the input timing to the screen. Assume always input 0. */
1057 if (!intel_sdvo_set_target_input(intel_sdvo))
1060 if (intel_sdvo->has_hdmi_monitor) {
1061 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1062 intel_sdvo_set_colorimetry(intel_sdvo,
1063 SDVO_COLORIMETRY_RGB256);
1064 intel_sdvo_set_avi_infoframe(intel_sdvo);
1066 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1068 if (intel_sdvo->is_tv &&
1069 !intel_sdvo_set_tv_format(intel_sdvo))
1072 /* We have tried to get input timing in mode_fixup, and filled into
1075 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1076 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1078 switch (pixel_multiplier) {
1080 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1081 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1082 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1084 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1087 /* Set the SDVO control regs. */
1088 if (INTEL_INFO(dev)->gen >= 4) {
1089 /* The real mode polarity is set by the SDVO commands, using
1090 * struct intel_sdvo_dtd. */
1091 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1092 if (intel_sdvo->is_hdmi)
1093 sdvox |= intel_sdvo->color_range;
1094 if (INTEL_INFO(dev)->gen < 5)
1095 sdvox |= SDVO_BORDER_ENABLE;
1097 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1098 switch (intel_sdvo->sdvo_reg) {
1100 sdvox &= SDVOB_PRESERVE_MASK;
1103 sdvox &= SDVOC_PRESERVE_MASK;
1106 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1109 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1110 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1112 sdvox |= TRANSCODER(intel_crtc->pipe);
1114 if (intel_sdvo->has_hdmi_audio)
1115 sdvox |= SDVO_AUDIO_ENABLE;
1117 if (INTEL_INFO(dev)->gen >= 4) {
1118 /* done in crtc_mode_set as the dpll_md reg must be written early */
1119 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1120 /* done in crtc_mode_set as it lives inside the dpll register */
1122 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1125 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1126 INTEL_INFO(dev)->gen < 5)
1127 sdvox |= SDVO_STALL_SELECT;
1128 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1131 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1133 struct drm_device *dev = encoder->dev;
1134 struct drm_i915_private *dev_priv = dev->dev_private;
1135 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1136 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1139 if (mode != DRM_MODE_DPMS_ON) {
1140 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1142 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1144 if (mode == DRM_MODE_DPMS_OFF) {
1145 temp = I915_READ(intel_sdvo->sdvo_reg);
1146 if ((temp & SDVO_ENABLE) != 0) {
1147 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1151 bool input1, input2;
1155 temp = I915_READ(intel_sdvo->sdvo_reg);
1156 if ((temp & SDVO_ENABLE) == 0)
1157 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1158 for (i = 0; i < 2; i++)
1159 intel_wait_for_vblank(dev, intel_crtc->pipe);
1161 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1162 /* Warn if the device reported failure to sync.
1163 * A lot of SDVO devices fail to notify of sync, but it's
1164 * a given it the status is a success, we succeeded.
1166 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1167 DRM_DEBUG_KMS("First %s output reported failure to "
1168 "sync\n", SDVO_NAME(intel_sdvo));
1172 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1173 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1178 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1179 struct drm_display_mode *mode)
1181 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1183 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1184 return MODE_NO_DBLESCAN;
1186 if (intel_sdvo->pixel_clock_min > mode->clock)
1187 return MODE_CLOCK_LOW;
1189 if (intel_sdvo->pixel_clock_max < mode->clock)
1190 return MODE_CLOCK_HIGH;
1192 if (intel_sdvo->is_lvds) {
1193 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1196 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1203 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1205 CTASSERT(sizeof(*caps) == 8);
1206 if (!intel_sdvo_get_value(intel_sdvo,
1207 SDVO_CMD_GET_DEVICE_CAPS,
1208 caps, sizeof(*caps)))
1211 DRM_DEBUG_KMS("SDVO capabilities:\n"
1214 " device_rev_id: %d\n"
1215 " sdvo_version_major: %d\n"
1216 " sdvo_version_minor: %d\n"
1217 " sdvo_inputs_mask: %d\n"
1218 " smooth_scaling: %d\n"
1219 " sharp_scaling: %d\n"
1221 " down_scaling: %d\n"
1222 " stall_support: %d\n"
1223 " output_flags: %d\n",
1226 caps->device_rev_id,
1227 caps->sdvo_version_major,
1228 caps->sdvo_version_minor,
1229 caps->sdvo_inputs_mask,
1230 caps->smooth_scaling,
1231 caps->sharp_scaling,
1234 caps->stall_support,
1235 caps->output_flags);
1240 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1242 struct drm_device *dev = intel_sdvo->base.base.dev;
1245 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1247 if (IS_I945G(dev) || IS_I945GM(dev))
1250 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1251 &response, 2) && response[0];
1254 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1256 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1258 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1259 &intel_sdvo->hotplug_active, 2);
1263 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1265 /* Is there more than one type of output? */
1266 return bitcount16(intel_sdvo->caps.output_flags) > 1;
1269 static struct edid *
1270 intel_sdvo_get_edid(struct drm_connector *connector)
1272 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1273 return drm_get_edid(connector, sdvo->ddc);
1276 /* Mac mini hack -- use the same DDC as the analog connector */
1277 static struct edid *
1278 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1280 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1282 return drm_get_edid(connector,
1283 intel_gmbus_get_adapter(dev_priv,
1284 dev_priv->crt_ddc_pin));
1287 static enum drm_connector_status
1288 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1290 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1291 enum drm_connector_status status;
1294 edid = intel_sdvo_get_edid(connector);
1296 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1297 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1300 * Don't use the 1 as the argument of DDC bus switch to get
1301 * the EDID. It is used for SDVO SPD ROM.
1303 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1304 intel_sdvo->ddc_bus = ddc;
1305 edid = intel_sdvo_get_edid(connector);
1310 * If we found the EDID on the other bus,
1311 * assume that is the correct DDC bus.
1314 intel_sdvo->ddc_bus = saved_ddc;
1318 * When there is no edid and no monitor is connected with VGA
1319 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1322 edid = intel_sdvo_get_analog_edid(connector);
1324 status = connector_status_unknown;
1326 /* DDC bus is shared, match EDID to connector type */
1327 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1328 status = connector_status_connected;
1329 if (intel_sdvo->is_hdmi) {
1330 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1331 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1334 status = connector_status_disconnected;
1335 free(edid, DRM_MEM_KMS);
1338 if (status == connector_status_connected) {
1339 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1340 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1341 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1348 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1351 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1352 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1354 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1355 connector_is_digital, monitor_is_digital);
1356 return connector_is_digital == monitor_is_digital;
1359 static enum drm_connector_status
1360 intel_sdvo_detect(struct drm_connector *connector, bool force)
1363 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1364 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1365 enum drm_connector_status ret;
1367 if (!intel_sdvo_write_cmd(intel_sdvo,
1368 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1369 return connector_status_unknown;
1371 /* add 30ms delay when the output type might be TV */
1372 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1373 drm_msleep(30, "915svo");
1375 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1376 return connector_status_unknown;
1378 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1379 response & 0xff, response >> 8,
1380 intel_sdvo_connector->output_flag);
1383 return connector_status_disconnected;
1385 intel_sdvo->attached_output = response;
1387 intel_sdvo->has_hdmi_monitor = false;
1388 intel_sdvo->has_hdmi_audio = false;
1390 if ((intel_sdvo_connector->output_flag & response) == 0)
1391 ret = connector_status_disconnected;
1392 else if (IS_TMDS(intel_sdvo_connector))
1393 ret = intel_sdvo_tmds_sink_detect(connector);
1397 /* if we have an edid check it matches the connection */
1398 edid = intel_sdvo_get_edid(connector);
1400 edid = intel_sdvo_get_analog_edid(connector);
1402 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1404 ret = connector_status_connected;
1406 ret = connector_status_disconnected;
1408 free(edid, DRM_MEM_KMS);
1410 ret = connector_status_connected;
1413 /* May update encoder flag for like clock for SDVO TV, etc.*/
1414 if (ret == connector_status_connected) {
1415 intel_sdvo->is_tv = false;
1416 intel_sdvo->is_lvds = false;
1417 intel_sdvo->base.needs_tv_clock = false;
1419 if (response & SDVO_TV_MASK) {
1420 intel_sdvo->is_tv = true;
1421 intel_sdvo->base.needs_tv_clock = true;
1423 if (response & SDVO_LVDS_MASK)
1424 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1430 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1434 /* set the bus switch and get the modes */
1435 edid = intel_sdvo_get_edid(connector);
1438 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1439 * link between analog and digital outputs. So, if the regular SDVO
1440 * DDC fails, check to see if the analog output is disconnected, in
1441 * which case we'll look there for the digital DDC data.
1444 edid = intel_sdvo_get_analog_edid(connector);
1447 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1449 drm_mode_connector_update_edid_property(connector, edid);
1450 drm_add_edid_modes(connector, edid);
1453 free(edid, DRM_MEM_KMS);
1458 * Set of SDVO TV modes.
1459 * Note! This is in reply order (see loop in get_tv_modes).
1460 * XXX: all 60Hz refresh?
1462 static const struct drm_display_mode sdvo_tv_modes[] = {
1463 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1464 416, 0, 200, 201, 232, 233, 0,
1465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1466 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1467 416, 0, 240, 241, 272, 273, 0,
1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1469 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1470 496, 0, 300, 301, 332, 333, 0,
1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1473 736, 0, 350, 351, 382, 383, 0,
1474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1475 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1476 736, 0, 400, 401, 432, 433, 0,
1477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1478 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1479 736, 0, 480, 481, 512, 513, 0,
1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1482 800, 0, 480, 481, 512, 513, 0,
1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1485 800, 0, 576, 577, 608, 609, 0,
1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1487 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1488 816, 0, 350, 351, 382, 383, 0,
1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1490 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1491 816, 0, 400, 401, 432, 433, 0,
1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1494 816, 0, 480, 481, 512, 513, 0,
1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1497 816, 0, 540, 541, 572, 573, 0,
1498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1499 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1500 816, 0, 576, 577, 608, 609, 0,
1501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1502 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1503 864, 0, 576, 577, 608, 609, 0,
1504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1505 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1506 896, 0, 600, 601, 632, 633, 0,
1507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1509 928, 0, 624, 625, 656, 657, 0,
1510 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1511 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1512 1016, 0, 766, 767, 798, 799, 0,
1513 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1514 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1515 1120, 0, 768, 769, 800, 801, 0,
1516 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1517 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1518 1376, 0, 1024, 1025, 1056, 1057, 0,
1519 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1524 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1525 struct intel_sdvo_sdtv_resolution_request tv_res;
1526 uint32_t reply = 0, format_map = 0;
1529 /* Read the list of supported input resolutions for the selected TV
1532 format_map = 1 << intel_sdvo->tv_format_index;
1533 memcpy(&tv_res, &format_map,
1534 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1536 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1539 CTASSERT(sizeof(tv_res) == 3);
1540 if (!intel_sdvo_write_cmd(intel_sdvo,
1541 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1542 &tv_res, sizeof(tv_res)))
1544 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1547 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1548 if (reply & (1 << i)) {
1549 struct drm_display_mode *nmode;
1550 nmode = drm_mode_duplicate(connector->dev,
1553 drm_mode_probed_add(connector, nmode);
1557 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1559 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1560 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1561 struct drm_display_mode *newmode;
1564 * Attempt to get the mode list from DDC.
1565 * Assume that the preferred modes are
1566 * arranged in priority order.
1568 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1569 if (!list_empty(&connector->probed_modes))
1572 /* Fetch modes from VBT */
1573 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1574 newmode = drm_mode_duplicate(connector->dev,
1575 dev_priv->sdvo_lvds_vbt_mode);
1576 if (newmode != NULL) {
1577 /* Guarantee the mode is preferred */
1578 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1579 DRM_MODE_TYPE_DRIVER);
1580 drm_mode_probed_add(connector, newmode);
1585 list_for_each_entry(newmode, &connector->probed_modes, head) {
1586 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1587 intel_sdvo->sdvo_lvds_fixed_mode =
1588 drm_mode_duplicate(connector->dev, newmode);
1590 intel_sdvo->is_lvds = true;
1597 static int intel_sdvo_get_modes(struct drm_connector *connector)
1599 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1601 if (IS_TV(intel_sdvo_connector))
1602 intel_sdvo_get_tv_modes(connector);
1603 else if (IS_LVDS(intel_sdvo_connector))
1604 intel_sdvo_get_lvds_modes(connector);
1606 intel_sdvo_get_ddc_modes(connector);
1608 return !list_empty(&connector->probed_modes);
1612 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1614 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1615 struct drm_device *dev = connector->dev;
1617 if (intel_sdvo_connector->left)
1618 drm_property_destroy(dev, intel_sdvo_connector->left);
1619 if (intel_sdvo_connector->right)
1620 drm_property_destroy(dev, intel_sdvo_connector->right);
1621 if (intel_sdvo_connector->top)
1622 drm_property_destroy(dev, intel_sdvo_connector->top);
1623 if (intel_sdvo_connector->bottom)
1624 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1625 if (intel_sdvo_connector->hpos)
1626 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1627 if (intel_sdvo_connector->vpos)
1628 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1629 if (intel_sdvo_connector->saturation)
1630 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1631 if (intel_sdvo_connector->contrast)
1632 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1633 if (intel_sdvo_connector->hue)
1634 drm_property_destroy(dev, intel_sdvo_connector->hue);
1635 if (intel_sdvo_connector->sharpness)
1636 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1637 if (intel_sdvo_connector->flicker_filter)
1638 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1639 if (intel_sdvo_connector->flicker_filter_2d)
1640 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1641 if (intel_sdvo_connector->flicker_filter_adaptive)
1642 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1643 if (intel_sdvo_connector->tv_luma_filter)
1644 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1645 if (intel_sdvo_connector->tv_chroma_filter)
1646 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1647 if (intel_sdvo_connector->dot_crawl)
1648 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1649 if (intel_sdvo_connector->brightness)
1650 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1653 static void intel_sdvo_destroy(struct drm_connector *connector)
1655 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1657 if (intel_sdvo_connector->tv_format)
1658 drm_property_destroy(connector->dev,
1659 intel_sdvo_connector->tv_format);
1661 intel_sdvo_destroy_enhance_property(connector);
1663 drm_sysfs_connector_remove(connector);
1665 drm_connector_cleanup(connector);
1666 free(connector, DRM_MEM_KMS);
1669 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1671 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1673 bool has_audio = false;
1675 if (!intel_sdvo->is_hdmi)
1678 edid = intel_sdvo_get_edid(connector);
1679 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1680 has_audio = drm_detect_monitor_audio(edid);
1686 intel_sdvo_set_property(struct drm_connector *connector,
1687 struct drm_property *property,
1690 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1691 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1692 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1693 uint16_t temp_value;
1697 ret = drm_object_property_set_value(&connector->base, property, val);
1701 if (property == dev_priv->force_audio_property) {
1705 if (i == intel_sdvo_connector->force_audio)
1708 intel_sdvo_connector->force_audio = i;
1710 if (i == HDMI_AUDIO_AUTO)
1711 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1713 has_audio = (i == HDMI_AUDIO_ON);
1715 if (has_audio == intel_sdvo->has_hdmi_audio)
1718 intel_sdvo->has_hdmi_audio = has_audio;
1722 if (property == dev_priv->broadcast_rgb_property) {
1723 if (val == !!intel_sdvo->color_range)
1726 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1730 #define CHECK_PROPERTY(name, NAME) \
1731 if (intel_sdvo_connector->name == property) { \
1732 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1733 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1734 cmd = SDVO_CMD_SET_##NAME; \
1735 intel_sdvo_connector->cur_##name = temp_value; \
1739 if (property == intel_sdvo_connector->tv_format) {
1740 if (val >= TV_FORMAT_NUM)
1743 if (intel_sdvo->tv_format_index ==
1744 intel_sdvo_connector->tv_format_supported[val])
1747 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1749 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1751 if (intel_sdvo_connector->left == property) {
1752 drm_object_property_set_value(&connector->base,
1753 intel_sdvo_connector->right, val);
1754 if (intel_sdvo_connector->left_margin == temp_value)
1757 intel_sdvo_connector->left_margin = temp_value;
1758 intel_sdvo_connector->right_margin = temp_value;
1759 temp_value = intel_sdvo_connector->max_hscan -
1760 intel_sdvo_connector->left_margin;
1761 cmd = SDVO_CMD_SET_OVERSCAN_H;
1763 } else if (intel_sdvo_connector->right == property) {
1764 drm_object_property_set_value(&connector->base,
1765 intel_sdvo_connector->left, val);
1766 if (intel_sdvo_connector->right_margin == temp_value)
1769 intel_sdvo_connector->left_margin = temp_value;
1770 intel_sdvo_connector->right_margin = temp_value;
1771 temp_value = intel_sdvo_connector->max_hscan -
1772 intel_sdvo_connector->left_margin;
1773 cmd = SDVO_CMD_SET_OVERSCAN_H;
1775 } else if (intel_sdvo_connector->top == property) {
1776 drm_object_property_set_value(&connector->base,
1777 intel_sdvo_connector->bottom, val);
1778 if (intel_sdvo_connector->top_margin == temp_value)
1781 intel_sdvo_connector->top_margin = temp_value;
1782 intel_sdvo_connector->bottom_margin = temp_value;
1783 temp_value = intel_sdvo_connector->max_vscan -
1784 intel_sdvo_connector->top_margin;
1785 cmd = SDVO_CMD_SET_OVERSCAN_V;
1787 } else if (intel_sdvo_connector->bottom == property) {
1788 drm_object_property_set_value(&connector->base,
1789 intel_sdvo_connector->top, val);
1790 if (intel_sdvo_connector->bottom_margin == temp_value)
1793 intel_sdvo_connector->top_margin = temp_value;
1794 intel_sdvo_connector->bottom_margin = temp_value;
1795 temp_value = intel_sdvo_connector->max_vscan -
1796 intel_sdvo_connector->top_margin;
1797 cmd = SDVO_CMD_SET_OVERSCAN_V;
1800 CHECK_PROPERTY(hpos, HPOS)
1801 CHECK_PROPERTY(vpos, VPOS)
1802 CHECK_PROPERTY(saturation, SATURATION)
1803 CHECK_PROPERTY(contrast, CONTRAST)
1804 CHECK_PROPERTY(hue, HUE)
1805 CHECK_PROPERTY(brightness, BRIGHTNESS)
1806 CHECK_PROPERTY(sharpness, SHARPNESS)
1807 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1808 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1809 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1810 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1811 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1812 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1815 return -EINVAL; /* unknown property */
1818 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1823 if (intel_sdvo->base.base.crtc) {
1824 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1825 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1830 #undef CHECK_PROPERTY
1833 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1834 .dpms = intel_sdvo_dpms,
1835 .mode_fixup = intel_sdvo_mode_fixup,
1836 .prepare = intel_encoder_prepare,
1837 .mode_set = intel_sdvo_mode_set,
1838 .commit = intel_encoder_commit,
1841 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1842 .dpms = drm_helper_connector_dpms,
1843 .detect = intel_sdvo_detect,
1844 .fill_modes = drm_helper_probe_single_connector_modes,
1845 .set_property = intel_sdvo_set_property,
1846 .destroy = intel_sdvo_destroy,
1849 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1850 .get_modes = intel_sdvo_get_modes,
1851 .mode_valid = intel_sdvo_mode_valid,
1852 .best_encoder = intel_best_encoder,
1855 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1857 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1859 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1860 drm_mode_destroy(encoder->dev,
1861 intel_sdvo->sdvo_lvds_fixed_mode);
1863 device_delete_child(intel_sdvo->base.base.dev->dev,
1864 intel_sdvo->ddc_iic_bus);
1865 intel_encoder_destroy(encoder);
1868 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1869 .destroy = intel_sdvo_enc_destroy,
1873 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1876 unsigned int num_bits;
1878 /* Make a mask of outputs less than or equal to our own priority in the
1881 switch (sdvo->controlled_output) {
1882 case SDVO_OUTPUT_LVDS1:
1883 mask |= SDVO_OUTPUT_LVDS1;
1884 case SDVO_OUTPUT_LVDS0:
1885 mask |= SDVO_OUTPUT_LVDS0;
1886 case SDVO_OUTPUT_TMDS1:
1887 mask |= SDVO_OUTPUT_TMDS1;
1888 case SDVO_OUTPUT_TMDS0:
1889 mask |= SDVO_OUTPUT_TMDS0;
1890 case SDVO_OUTPUT_RGB1:
1891 mask |= SDVO_OUTPUT_RGB1;
1892 case SDVO_OUTPUT_RGB0:
1893 mask |= SDVO_OUTPUT_RGB0;
1897 /* Count bits to find what number we are in the priority list. */
1898 mask &= sdvo->caps.output_flags;
1899 num_bits = bitcount16(mask);
1900 /* If more than 3 outputs, default to DDC bus 3 for now. */
1904 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1905 sdvo->ddc_bus = 1 << num_bits;
1909 * Choose the appropriate DDC bus for control bus switch command for this
1910 * SDVO output based on the controlled output.
1912 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1913 * outputs, then LVDS outputs.
1916 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1917 struct intel_sdvo *sdvo, u32 reg)
1919 struct sdvo_device_mapping *mapping;
1922 mapping = &(dev_priv->sdvo_mappings[0]);
1924 mapping = &(dev_priv->sdvo_mappings[1]);
1926 if (mapping->initialized)
1927 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1929 intel_sdvo_guess_ddc_bus(sdvo);
1933 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1934 struct intel_sdvo *sdvo, u32 reg)
1936 struct sdvo_device_mapping *mapping;
1940 mapping = &dev_priv->sdvo_mappings[0];
1942 mapping = &dev_priv->sdvo_mappings[1];
1944 pin = GMBUS_PORT_DPB;
1945 if (mapping->initialized)
1946 pin = mapping->i2c_pin;
1948 if (intel_gmbus_is_port_valid(pin)) {
1949 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1950 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1951 intel_gmbus_force_bit(sdvo->i2c, true);
1953 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1958 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1960 return intel_sdvo_check_supp_encode(intel_sdvo);
1964 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1966 struct drm_i915_private *dev_priv = dev->dev_private;
1967 struct sdvo_device_mapping *my_mapping, *other_mapping;
1969 if (sdvo->is_sdvob) {
1970 my_mapping = &dev_priv->sdvo_mappings[0];
1971 other_mapping = &dev_priv->sdvo_mappings[1];
1973 my_mapping = &dev_priv->sdvo_mappings[1];
1974 other_mapping = &dev_priv->sdvo_mappings[0];
1977 /* If the BIOS described our SDVO device, take advantage of it. */
1978 if (my_mapping->slave_addr)
1979 return my_mapping->slave_addr;
1981 /* If the BIOS only described a different SDVO device, use the
1982 * address that it isn't using.
1984 if (other_mapping->slave_addr) {
1985 if (other_mapping->slave_addr == 0x70)
1991 /* No SDVO device info is found for another DVO port,
1992 * so use mapping assumption we had before BIOS parsing.
2001 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2002 struct intel_sdvo *encoder)
2004 drm_connector_init(encoder->base.base.dev,
2005 &connector->base.base,
2006 &intel_sdvo_connector_funcs,
2007 connector->base.base.connector_type);
2009 drm_connector_helper_add(&connector->base.base,
2010 &intel_sdvo_connector_helper_funcs);
2012 connector->base.base.interlace_allowed = 1;
2013 connector->base.base.doublescan_allowed = 0;
2014 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2016 intel_connector_attach_encoder(&connector->base, &encoder->base);
2018 drm_sysfs_connector_add(&connector->base.base);
2023 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2025 struct drm_device *dev = connector->base.base.dev;
2027 intel_attach_force_audio_property(&connector->base.base);
2028 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2029 intel_attach_broadcast_rgb_property(&connector->base.base);
2033 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2035 struct drm_encoder *encoder = &intel_sdvo->base.base;
2036 struct drm_connector *connector;
2037 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2038 struct intel_connector *intel_connector;
2039 struct intel_sdvo_connector *intel_sdvo_connector;
2041 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2042 DRM_MEM_KMS, M_WAITOK | M_ZERO);
2045 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2046 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2047 } else if (device == 1) {
2048 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2049 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2052 intel_connector = &intel_sdvo_connector->base;
2053 connector = &intel_connector->base;
2054 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2055 connector->polled = DRM_CONNECTOR_POLL_HPD;
2056 intel_sdvo->hotplug_active[0] |= 1 << device;
2057 /* Some SDVO devices have one-shot hotplug interrupts.
2058 * Ensure that they get re-enabled when an interrupt happens.
2060 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2061 intel_sdvo_enable_hotplug(intel_encoder);
2064 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2065 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2066 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2068 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2069 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2070 intel_sdvo->is_hdmi = true;
2072 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2073 (1 << INTEL_ANALOG_CLONE_BIT));
2075 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2076 if (intel_sdvo->is_hdmi)
2077 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2083 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2085 struct drm_encoder *encoder = &intel_sdvo->base.base;
2086 struct drm_connector *connector;
2087 struct intel_connector *intel_connector;
2088 struct intel_sdvo_connector *intel_sdvo_connector;
2090 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2091 DRM_MEM_KMS, M_WAITOK | M_ZERO);
2092 if (!intel_sdvo_connector)
2095 intel_connector = &intel_sdvo_connector->base;
2096 connector = &intel_connector->base;
2097 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2098 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2100 intel_sdvo->controlled_output |= type;
2101 intel_sdvo_connector->output_flag = type;
2103 intel_sdvo->is_tv = true;
2104 intel_sdvo->base.needs_tv_clock = true;
2105 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2107 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2109 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2112 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2118 intel_sdvo_destroy(connector);
2123 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2125 struct drm_encoder *encoder = &intel_sdvo->base.base;
2126 struct drm_connector *connector;
2127 struct intel_connector *intel_connector;
2128 struct intel_sdvo_connector *intel_sdvo_connector;
2130 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2131 DRM_MEM_KMS, M_WAITOK | M_ZERO);
2133 intel_connector = &intel_sdvo_connector->base;
2134 connector = &intel_connector->base;
2135 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2136 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2137 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2140 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2141 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2142 } else if (device == 1) {
2143 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2144 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2147 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2148 (1 << INTEL_ANALOG_CLONE_BIT));
2150 intel_sdvo_connector_init(intel_sdvo_connector,
2156 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2158 struct drm_encoder *encoder = &intel_sdvo->base.base;
2159 struct drm_connector *connector;
2160 struct intel_connector *intel_connector;
2161 struct intel_sdvo_connector *intel_sdvo_connector;
2163 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2164 DRM_MEM_KMS, M_WAITOK | M_ZERO);
2166 intel_connector = &intel_sdvo_connector->base;
2167 connector = &intel_connector->base;
2168 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2169 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2172 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2173 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2174 } else if (device == 1) {
2175 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2176 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2179 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2180 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2182 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2183 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2189 intel_sdvo_destroy(connector);
2194 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2196 intel_sdvo->is_tv = false;
2197 intel_sdvo->base.needs_tv_clock = false;
2198 intel_sdvo->is_lvds = false;
2200 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2202 if (flags & SDVO_OUTPUT_TMDS0)
2203 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2206 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2207 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2210 /* TV has no XXX1 function block */
2211 if (flags & SDVO_OUTPUT_SVID0)
2212 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2215 if (flags & SDVO_OUTPUT_CVBS0)
2216 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2219 if (flags & SDVO_OUTPUT_YPRPB0)
2220 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2223 if (flags & SDVO_OUTPUT_RGB0)
2224 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2227 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2228 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2231 if (flags & SDVO_OUTPUT_LVDS0)
2232 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2235 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2236 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2239 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2240 unsigned char bytes[2];
2242 intel_sdvo->controlled_output = 0;
2243 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2244 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2245 SDVO_NAME(intel_sdvo),
2246 bytes[0], bytes[1]);
2249 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2254 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2255 struct intel_sdvo_connector *intel_sdvo_connector,
2258 struct drm_device *dev = intel_sdvo->base.base.dev;
2259 struct intel_sdvo_tv_format format;
2260 uint32_t format_map, i;
2262 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2265 CTASSERT(sizeof(format) == 6);
2266 if (!intel_sdvo_get_value(intel_sdvo,
2267 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2268 &format, sizeof(format)))
2271 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2273 if (format_map == 0)
2276 intel_sdvo_connector->format_supported_num = 0;
2277 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2278 if (format_map & (1 << i))
2279 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2282 intel_sdvo_connector->tv_format =
2283 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2284 "mode", intel_sdvo_connector->format_supported_num);
2285 if (!intel_sdvo_connector->tv_format)
2288 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2289 drm_property_add_enum(
2290 intel_sdvo_connector->tv_format, i,
2291 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2293 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2294 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2295 intel_sdvo_connector->tv_format, 0);
2300 #define ENHANCEMENT(name, NAME) do { \
2301 if (enhancements.name) { \
2302 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2303 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2305 intel_sdvo_connector->max_##name = data_value[0]; \
2306 intel_sdvo_connector->cur_##name = response; \
2307 intel_sdvo_connector->name = \
2308 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2309 if (!intel_sdvo_connector->name) return false; \
2310 drm_object_attach_property(&connector->base, \
2311 intel_sdvo_connector->name, \
2312 intel_sdvo_connector->cur_##name); \
2313 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2314 data_value[0], data_value[1], response); \
2319 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2320 struct intel_sdvo_connector *intel_sdvo_connector,
2321 struct intel_sdvo_enhancements_reply enhancements)
2323 struct drm_device *dev = intel_sdvo->base.base.dev;
2324 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2325 uint16_t response, data_value[2];
2327 /* when horizontal overscan is supported, Add the left/right property */
2328 if (enhancements.overscan_h) {
2329 if (!intel_sdvo_get_value(intel_sdvo,
2330 SDVO_CMD_GET_MAX_OVERSCAN_H,
2334 if (!intel_sdvo_get_value(intel_sdvo,
2335 SDVO_CMD_GET_OVERSCAN_H,
2339 intel_sdvo_connector->max_hscan = data_value[0];
2340 intel_sdvo_connector->left_margin = data_value[0] - response;
2341 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2342 intel_sdvo_connector->left =
2343 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2344 if (!intel_sdvo_connector->left)
2347 drm_object_attach_property(&connector->base,
2348 intel_sdvo_connector->left,
2349 intel_sdvo_connector->left_margin);
2351 intel_sdvo_connector->right =
2352 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2353 if (!intel_sdvo_connector->right)
2356 drm_object_attach_property(&connector->base,
2357 intel_sdvo_connector->right,
2358 intel_sdvo_connector->right_margin);
2359 DRM_DEBUG_KMS("h_overscan: max %d, "
2360 "default %d, current %d\n",
2361 data_value[0], data_value[1], response);
2364 if (enhancements.overscan_v) {
2365 if (!intel_sdvo_get_value(intel_sdvo,
2366 SDVO_CMD_GET_MAX_OVERSCAN_V,
2370 if (!intel_sdvo_get_value(intel_sdvo,
2371 SDVO_CMD_GET_OVERSCAN_V,
2375 intel_sdvo_connector->max_vscan = data_value[0];
2376 intel_sdvo_connector->top_margin = data_value[0] - response;
2377 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2378 intel_sdvo_connector->top =
2379 drm_property_create_range(dev, 0,
2380 "top_margin", 0, data_value[0]);
2381 if (!intel_sdvo_connector->top)
2384 drm_object_attach_property(&connector->base,
2385 intel_sdvo_connector->top,
2386 intel_sdvo_connector->top_margin);
2388 intel_sdvo_connector->bottom =
2389 drm_property_create_range(dev, 0,
2390 "bottom_margin", 0, data_value[0]);
2391 if (!intel_sdvo_connector->bottom)
2394 drm_object_attach_property(&connector->base,
2395 intel_sdvo_connector->bottom,
2396 intel_sdvo_connector->bottom_margin);
2397 DRM_DEBUG_KMS("v_overscan: max %d, "
2398 "default %d, current %d\n",
2399 data_value[0], data_value[1], response);
2402 ENHANCEMENT(hpos, HPOS);
2403 ENHANCEMENT(vpos, VPOS);
2404 ENHANCEMENT(saturation, SATURATION);
2405 ENHANCEMENT(contrast, CONTRAST);
2406 ENHANCEMENT(hue, HUE);
2407 ENHANCEMENT(sharpness, SHARPNESS);
2408 ENHANCEMENT(brightness, BRIGHTNESS);
2409 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2410 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2411 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2412 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2413 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2415 if (enhancements.dot_crawl) {
2416 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2419 intel_sdvo_connector->max_dot_crawl = 1;
2420 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2421 intel_sdvo_connector->dot_crawl =
2422 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2423 if (!intel_sdvo_connector->dot_crawl)
2426 drm_object_attach_property(&connector->base,
2427 intel_sdvo_connector->dot_crawl,
2428 intel_sdvo_connector->cur_dot_crawl);
2429 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2436 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2437 struct intel_sdvo_connector *intel_sdvo_connector,
2438 struct intel_sdvo_enhancements_reply enhancements)
2440 struct drm_device *dev = intel_sdvo->base.base.dev;
2441 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2442 uint16_t response, data_value[2];
2444 ENHANCEMENT(brightness, BRIGHTNESS);
2450 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2451 struct intel_sdvo_connector *intel_sdvo_connector)
2454 struct intel_sdvo_enhancements_reply reply;
2458 CTASSERT(sizeof(enhancements) == 2);
2460 enhancements.response = 0;
2461 intel_sdvo_get_value(intel_sdvo,
2462 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2463 &enhancements, sizeof(enhancements));
2464 if (enhancements.response == 0) {
2465 DRM_DEBUG_KMS("No enhancement is supported\n");
2469 if (IS_TV(intel_sdvo_connector))
2470 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2471 else if (IS_LVDS(intel_sdvo_connector))
2472 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2477 struct intel_sdvo_ddc_proxy_sc {
2478 struct intel_sdvo *intel_sdvo;
2483 intel_sdvo_ddc_proxy_probe(device_t idev)
2486 return (BUS_PROBE_DEFAULT);
2490 intel_sdvo_ddc_proxy_attach(device_t idev)
2492 struct intel_sdvo_ddc_proxy_sc *sc;
2494 sc = device_get_softc(idev);
2495 sc->port = device_add_child(idev, "iicbus", -1);
2496 if (sc->port == NULL)
2498 device_quiet(sc->port);
2499 bus_generic_attach(idev);
2504 intel_sdvo_ddc_proxy_detach(device_t idev)
2506 struct intel_sdvo_ddc_proxy_sc *sc;
2509 sc = device_get_softc(idev);
2511 bus_generic_detach(idev);
2513 device_delete_child(idev, port);
2518 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr,
2521 struct intel_sdvo_ddc_proxy_sc *sc;
2522 struct intel_sdvo *sdvo;
2524 sc = device_get_softc(idev);
2525 sdvo = sc->intel_sdvo;
2527 return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr,
2532 intel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num)
2534 struct intel_sdvo_ddc_proxy_sc *sc;
2535 struct intel_sdvo *sdvo;
2537 sc = device_get_softc(idev);
2538 sdvo = sc->intel_sdvo;
2540 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2543 return (iicbus_transfer(sdvo->i2c, msgs, num));
2547 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev,
2550 struct intel_sdvo_ddc_proxy_sc *sc;
2553 sdvo->ddc_iic_bus = device_add_child(dev->dev,
2554 "intel_sdvo_ddc_proxy", sdvo_reg);
2555 if (sdvo->ddc_iic_bus == NULL) {
2556 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg);
2559 device_quiet(sdvo->ddc_iic_bus);
2560 ret = device_probe_and_attach(sdvo->ddc_iic_bus);
2562 DRM_ERROR("cannot attach proxy bus %d error %d\n",
2564 device_delete_child(dev->dev, sdvo->ddc_iic_bus);
2567 sc = device_get_softc(sdvo->ddc_iic_bus);
2568 sc->intel_sdvo = sdvo;
2570 sdvo->ddc = sc->port;
2574 static device_method_t intel_sdvo_ddc_proxy_methods[] = {
2575 DEVMETHOD(device_probe, intel_sdvo_ddc_proxy_probe),
2576 DEVMETHOD(device_attach, intel_sdvo_ddc_proxy_attach),
2577 DEVMETHOD(device_detach, intel_sdvo_ddc_proxy_detach),
2578 DEVMETHOD(iicbus_reset, intel_sdvo_ddc_proxy_reset),
2579 DEVMETHOD(iicbus_transfer, intel_sdvo_ddc_proxy_transfer),
2582 static driver_t intel_sdvo_ddc_proxy_driver = {
2583 "intel_sdvo_ddc_proxy",
2584 intel_sdvo_ddc_proxy_methods,
2585 sizeof(struct intel_sdvo_ddc_proxy_sc)
2587 static devclass_t intel_sdvo_devclass;
2588 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drmn, intel_sdvo_ddc_proxy_driver,
2589 intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST);
2592 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2594 struct drm_i915_private *dev_priv = dev->dev_private;
2595 struct intel_encoder *intel_encoder;
2596 struct intel_sdvo *intel_sdvo;
2599 intel_sdvo = malloc(sizeof(struct intel_sdvo), DRM_MEM_KMS,
2602 intel_sdvo->sdvo_reg = sdvo_reg;
2603 intel_sdvo->is_sdvob = is_sdvob;
2604 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2605 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2606 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) {
2607 free(intel_sdvo, DRM_MEM_KMS);
2611 /* encoder type will be decided later */
2612 intel_encoder = &intel_sdvo->base;
2613 intel_encoder->type = INTEL_OUTPUT_SDVO;
2614 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2616 /* Read the regs to test if we can talk to the device */
2617 for (i = 0; i < 0x40; i++) {
2620 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2621 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2622 SDVO_NAME(intel_sdvo));
2627 if (intel_sdvo->is_sdvob)
2628 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2630 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2632 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2634 /* In default case sdvo lvds is false */
2635 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2638 /* Set up hotplug command - note paranoia about contents of reply.
2639 * We assume that the hardware is in a sane state, and only touch
2640 * the bits we think we understand.
2642 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2643 &intel_sdvo->hotplug_active, 2);
2644 intel_sdvo->hotplug_active[0] &= ~0x3;
2646 if (intel_sdvo_output_setup(intel_sdvo,
2647 intel_sdvo->caps.output_flags) != true) {
2648 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2649 SDVO_NAME(intel_sdvo));
2653 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2655 /* Set the input timing to the screen. Assume always input 0. */
2656 if (!intel_sdvo_set_target_input(intel_sdvo))
2659 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2660 &intel_sdvo->pixel_clock_min,
2661 &intel_sdvo->pixel_clock_max))
2664 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2665 "clock range %dMHz - %dMHz, "
2666 "input 1: %c, input 2: %c, "
2667 "output 1: %c, output 2: %c\n",
2668 SDVO_NAME(intel_sdvo),
2669 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2670 intel_sdvo->caps.device_rev_id,
2671 intel_sdvo->pixel_clock_min / 1000,
2672 intel_sdvo->pixel_clock_max / 1000,
2673 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2674 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2675 /* check currently supported outputs */
2676 intel_sdvo->caps.output_flags &
2677 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2678 intel_sdvo->caps.output_flags &
2679 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2683 drm_encoder_cleanup(&intel_encoder->base);
2684 free(intel_sdvo, DRM_MEM_KMS);