sys/dev/e1000/e1000_nvm.c

   1 /******************************************************************************
   2
   3   Copyright (c) 2001-2014, Intel Corporation
   4   All rights reserved.
   5
   6   Redistribution and use in source and binary forms, with or without
   7   modification, are permitted provided that the following conditions are met:
   8
   9    1. Redistributions of source code must retain the above copyright notice,
  10       this list of conditions and the following disclaimer.
  11
  12    2. Redistributions in binary form must reproduce the above copyright
  13       notice, this list of conditions and the following disclaimer in the
  14       documentation and/or other materials provided with the distribution.
  15
  16    3. Neither the name of the Intel Corporation nor the names of its
  17       contributors may be used to endorse or promote products derived from
  18       this software without specific prior written permission.
  19
  20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30   POSSIBILITY OF SUCH DAMAGE.
  31
  32 ******************************************************************************/
  33 /*$FreeBSD$*/
  34
  35 #include "e1000_api.h"
  36
  37 static void e1000_reload_nvm_generic(struct e1000_hw *hw);
  38
  39 /**
  40  *  e1000_init_nvm_ops_generic - Initialize NVM function pointers
  41  *  @hw: pointer to the HW structure
  42  *
  43  *  Setups up the function pointers to no-op functions
  44  **/
  45 void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
  46 {
  47         struct e1000_nvm_info *nvm = &hw->nvm;
  48         DEBUGFUNC("e1000_init_nvm_ops_generic");
  49
  50         /* Initialize function pointers */
  51         nvm->ops.init_params = e1000_null_ops_generic;
  52         nvm->ops.acquire = e1000_null_ops_generic;
  53         nvm->ops.read = e1000_null_read_nvm;
  54         nvm->ops.release = e1000_null_nvm_generic;
  55         nvm->ops.reload = e1000_reload_nvm_generic;
  56         nvm->ops.update = e1000_null_ops_generic;
  57         nvm->ops.valid_led_default = e1000_null_led_default;
  58         nvm->ops.validate = e1000_null_ops_generic;
  59         nvm->ops.write = e1000_null_write_nvm;
  60 }
  61
  62 /**
  63  *  e1000_null_nvm_read - No-op function, return 0
  64  *  @hw: pointer to the HW structure
  65  **/
  66 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
  67                         u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
  68                         u16 E1000_UNUSEDARG *c)
  69 {
  70         DEBUGFUNC("e1000_null_read_nvm");
  71         return E1000_SUCCESS;
  72 }
  73
  74 /**
  75  *  e1000_null_nvm_generic - No-op function, return void
  76  *  @hw: pointer to the HW structure
  77  **/
  78 void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
  79 {
  80         DEBUGFUNC("e1000_null_nvm_generic");
  81         return;
  82 }
  83
  84 /**
  85  *  e1000_null_led_default - No-op function, return 0
  86  *  @hw: pointer to the HW structure
  87  **/
  88 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
  89                            u16 E1000_UNUSEDARG *data)
  90 {
  91         DEBUGFUNC("e1000_null_led_default");
  92         return E1000_SUCCESS;
  93 }
  94
  95 /**
  96  *  e1000_null_write_nvm - No-op function, return 0
  97  *  @hw: pointer to the HW structure
  98  **/
  99 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
 100                          u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
 101                          u16 E1000_UNUSEDARG *c)
 102 {
 103         DEBUGFUNC("e1000_null_write_nvm");
 104         return E1000_SUCCESS;
 105 }
 106
 107 /**
 108  *  e1000_raise_eec_clk - Raise EEPROM clock
 109  *  @hw: pointer to the HW structure
 110  *  @eecd: pointer to the EEPROM
 111  *
 112  *  Enable/Raise the EEPROM clock bit.
 113  **/
 114 static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
 115 {
 116         *eecd = *eecd | E1000_EECD_SK;
 117         E1000_WRITE_REG(hw, E1000_EECD, *eecd);
 118         E1000_WRITE_FLUSH(hw);
 119         usec_delay(hw->nvm.delay_usec);
 120 }
 121
 122 /**
 123  *  e1000_lower_eec_clk - Lower EEPROM clock
 124  *  @hw: pointer to the HW structure
 125  *  @eecd: pointer to the EEPROM
 126  *
 127  *  Clear/Lower the EEPROM clock bit.
 128  **/
 129 static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
 130 {
 131         *eecd = *eecd & ~E1000_EECD_SK;
 132         E1000_WRITE_REG(hw, E1000_EECD, *eecd);
 133         E1000_WRITE_FLUSH(hw);
 134         usec_delay(hw->nvm.delay_usec);
 135 }
 136
 137 /**
 138  *  e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
 139  *  @hw: pointer to the HW structure
 140  *  @data: data to send to the EEPROM
 141  *  @count: number of bits to shift out
 142  *
 143  *  We need to shift 'count' bits out to the EEPROM.  So, the value in the
 144  *  "data" parameter will be shifted out to the EEPROM one bit at a time.
 145  *  In order to do this, "data" must be broken down into bits.
 146  **/
 147 static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
 148 {
 149         struct e1000_nvm_info *nvm = &hw->nvm;
 150         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 151         u32 mask;
 152
 153         DEBUGFUNC("e1000_shift_out_eec_bits");
 154
 155         mask = 0x01 << (count - 1);
 156         if (nvm->type == e1000_nvm_eeprom_microwire)
 157                 eecd &= ~E1000_EECD_DO;
 158         else
 159         if (nvm->type == e1000_nvm_eeprom_spi)
 160                 eecd |= E1000_EECD_DO;
 161
 162         do {
 163                 eecd &= ~E1000_EECD_DI;
 164
 165                 if (data & mask)
 166                         eecd |= E1000_EECD_DI;
 167
 168                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 169                 E1000_WRITE_FLUSH(hw);
 170
 171                 usec_delay(nvm->delay_usec);
 172
 173                 e1000_raise_eec_clk(hw, &eecd);
 174                 e1000_lower_eec_clk(hw, &eecd);
 175
 176                 mask >>= 1;
 177         } while (mask);
 178
 179         eecd &= ~E1000_EECD_DI;
 180         E1000_WRITE_REG(hw, E1000_EECD, eecd);
 181 }
 182
 183 /**
 184  *  e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
 185  *  @hw: pointer to the HW structure
 186  *  @count: number of bits to shift in
 187  *
 188  *  In order to read a register from the EEPROM, we need to shift 'count' bits
 189  *  in from the EEPROM.  Bits are "shifted in" by raising the clock input to
 190  *  the EEPROM (setting the SK bit), and then reading the value of the data out
 191  *  "DO" bit.  During this "shifting in" process the data in "DI" bit should
 192  *  always be clear.
 193  **/
 194 static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
 195 {
 196         u32 eecd;
 197         u32 i;
 198         u16 data;
 199
 200         DEBUGFUNC("e1000_shift_in_eec_bits");
 201
 202         eecd = E1000_READ_REG(hw, E1000_EECD);
 203
 204         eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
 205         data = 0;
 206
 207         for (i = 0; i < count; i++) {
 208                 data <<= 1;
 209                 e1000_raise_eec_clk(hw, &eecd);
 210
 211                 eecd = E1000_READ_REG(hw, E1000_EECD);
 212
 213                 eecd &= ~E1000_EECD_DI;
 214                 if (eecd & E1000_EECD_DO)
 215                         data |= 1;
 216
 217                 e1000_lower_eec_clk(hw, &eecd);
 218         }
 219
 220         return data;
 221 }
 222
 223 /**
 224  *  e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
 225  *  @hw: pointer to the HW structure
 226  *  @ee_reg: EEPROM flag for polling
 227  *
 228  *  Polls the EEPROM status bit for either read or write completion based
 229  *  upon the value of 'ee_reg'.
 230  **/
 231 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
 232 {
 233         u32 attempts = 100000;
 234         u32 i, reg = 0;
 235
 236         DEBUGFUNC("e1000_poll_eerd_eewr_done");
 237
 238         for (i = 0; i < attempts; i++) {
 239                 if (ee_reg == E1000_NVM_POLL_READ)
 240                         reg = E1000_READ_REG(hw, E1000_EERD);
 241                 else
 242                         reg = E1000_READ_REG(hw, E1000_EEWR);
 243
 244                 if (reg & E1000_NVM_RW_REG_DONE)
 245                         return E1000_SUCCESS;
 246
 247                 usec_delay(5);
 248         }
 249
 250         return -E1000_ERR_NVM;
 251 }
 252
 253 /**
 254  *  e1000_acquire_nvm_generic - Generic request for access to EEPROM
 255  *  @hw: pointer to the HW structure
 256  *
 257  *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
 258  *  Return successful if access grant bit set, else clear the request for
 259  *  EEPROM access and return -E1000_ERR_NVM (-1).
 260  **/
 261 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
 262 {
 263         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 264         s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
 265
 266         DEBUGFUNC("e1000_acquire_nvm_generic");
 267
 268         E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);
 269         eecd = E1000_READ_REG(hw, E1000_EECD);
 270
 271         while (timeout) {
 272                 if (eecd & E1000_EECD_GNT)
 273                         break;
 274                 usec_delay(5);
 275                 eecd = E1000_READ_REG(hw, E1000_EECD);
 276                 timeout--;
 277         }
 278
 279         if (!timeout) {
 280                 eecd &= ~E1000_EECD_REQ;
 281                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 282                 DEBUGOUT("Could not acquire NVM grant\n");
 283                 return -E1000_ERR_NVM;
 284         }
 285
 286         return E1000_SUCCESS;
 287 }
 288
 289 /**
 290  *  e1000_standby_nvm - Return EEPROM to standby state
 291  *  @hw: pointer to the HW structure
 292  *
 293  *  Return the EEPROM to a standby state.
 294  **/
 295 static void e1000_standby_nvm(struct e1000_hw *hw)
 296 {
 297         struct e1000_nvm_info *nvm = &hw->nvm;
 298         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 299
 300         DEBUGFUNC("e1000_standby_nvm");
 301
 302         if (nvm->type == e1000_nvm_eeprom_microwire) {
 303                 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
 304                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 305                 E1000_WRITE_FLUSH(hw);
 306                 usec_delay(nvm->delay_usec);
 307
 308                 e1000_raise_eec_clk(hw, &eecd);
 309
 310                 /* Select EEPROM */
 311                 eecd |= E1000_EECD_CS;
 312                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 313                 E1000_WRITE_FLUSH(hw);
 314                 usec_delay(nvm->delay_usec);
 315
 316                 e1000_lower_eec_clk(hw, &eecd);
 317         } else if (nvm->type == e1000_nvm_eeprom_spi) {
 318                 /* Toggle CS to flush commands */
 319                 eecd |= E1000_EECD_CS;
 320                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 321                 E1000_WRITE_FLUSH(hw);
 322                 usec_delay(nvm->delay_usec);
 323                 eecd &= ~E1000_EECD_CS;
 324                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 325                 E1000_WRITE_FLUSH(hw);
 326                 usec_delay(nvm->delay_usec);
 327         }
 328 }
 329
 330 /**
 331  *  e1000_stop_nvm - Terminate EEPROM command
 332  *  @hw: pointer to the HW structure
 333  *
 334  *  Terminates the current command by inverting the EEPROM's chip select pin.
 335  **/
 336 void e1000_stop_nvm(struct e1000_hw *hw)
 337 {
 338         u32 eecd;
 339
 340         DEBUGFUNC("e1000_stop_nvm");
 341
 342         eecd = E1000_READ_REG(hw, E1000_EECD);
 343         if (hw->nvm.type == e1000_nvm_eeprom_spi) {
 344                 /* Pull CS high */
 345                 eecd |= E1000_EECD_CS;
 346                 e1000_lower_eec_clk(hw, &eecd);
 347         } else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {
 348                 /* CS on Microwire is active-high */
 349                 eecd &= ~(E1000_EECD_CS | E1000_EECD_DI);
 350                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 351                 e1000_raise_eec_clk(hw, &eecd);
 352                 e1000_lower_eec_clk(hw, &eecd);
 353         }
 354 }
 355
 356 /**
 357  *  e1000_release_nvm_generic - Release exclusive access to EEPROM
 358  *  @hw: pointer to the HW structure
 359  *
 360  *  Stop any current commands to the EEPROM and clear the EEPROM request bit.
 361  **/
 362 void e1000_release_nvm_generic(struct e1000_hw *hw)
 363 {
 364         u32 eecd;
 365
 366         DEBUGFUNC("e1000_release_nvm_generic");
 367
 368         e1000_stop_nvm(hw);
 369
 370         eecd = E1000_READ_REG(hw, E1000_EECD);
 371         eecd &= ~E1000_EECD_REQ;
 372         E1000_WRITE_REG(hw, E1000_EECD, eecd);
 373 }
 374
 375 /**
 376  *  e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
 377  *  @hw: pointer to the HW structure
 378  *
 379  *  Setups the EEPROM for reading and writing.
 380  **/
 381 static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
 382 {
 383         struct e1000_nvm_info *nvm = &hw->nvm;
 384         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
 385         u8 spi_stat_reg;
 386
 387         DEBUGFUNC("e1000_ready_nvm_eeprom");
 388
 389         if (nvm->type == e1000_nvm_eeprom_microwire) {
 390                 /* Clear SK and DI */
 391                 eecd &= ~(E1000_EECD_DI | E1000_EECD_SK);
 392                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 393                 /* Set CS */
 394                 eecd |= E1000_EECD_CS;
 395                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 396         } else if (nvm->type == e1000_nvm_eeprom_spi) {
 397                 u16 timeout = NVM_MAX_RETRY_SPI;
 398
 399                 /* Clear SK and CS */
 400                 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
 401                 E1000_WRITE_REG(hw, E1000_EECD, eecd);
 402                 E1000_WRITE_FLUSH(hw);
 403                 usec_delay(1);
 404
 405                 /* Read "Status Register" repeatedly until the LSB is cleared.
 406                  * The EEPROM will signal that the command has been completed
 407                  * by clearing bit 0 of the internal status register.  If it's
 408                  * not cleared within 'timeout', then error out.
 409                  */
 410                 while (timeout) {
 411                         e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
 412                                                  hw->nvm.opcode_bits);
 413                         spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
 414                         if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
 415                                 break;
 416
 417                         usec_delay(5);
 418                         e1000_standby_nvm(hw);
 419                         timeout--;
 420                 }
 421
 422                 if (!timeout) {
 423                         DEBUGOUT("SPI NVM Status error\n");
 424                         return -E1000_ERR_NVM;
 425                 }
 426         }
 427
 428         return E1000_SUCCESS;
 429 }
 430
 431 /**
 432  *  e1000_read_nvm_spi - Read EEPROM's using SPI
 433  *  @hw: pointer to the HW structure
 434  *  @offset: offset of word in the EEPROM to read
 435  *  @words: number of words to read
 436  *  @data: word read from the EEPROM
 437  *
 438  *  Reads a 16 bit word from the EEPROM.
 439  **/
 440 s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 441 {
 442         struct e1000_nvm_info *nvm = &hw->nvm;
 443         u32 i = 0;
 444         s32 ret_val;
 445         u16 word_in;
 446         u8 read_opcode = NVM_READ_OPCODE_SPI;
 447
 448         DEBUGFUNC("e1000_read_nvm_spi");
 449
 450         /* A check for invalid values:  offset too large, too many words,
 451          * and not enough words.
 452          */
 453         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 454             (words == 0)) {
 455                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 456                 return -E1000_ERR_NVM;
 457         }
 458
 459         ret_val = nvm->ops.acquire(hw);
 460         if (ret_val)
 461                 return ret_val;
 462
 463         ret_val = e1000_ready_nvm_eeprom(hw);
 464         if (ret_val)
 465                 goto release;
 466
 467         e1000_standby_nvm(hw);
 468
 469         if ((nvm->address_bits == 8) && (offset >= 128))
 470                 read_opcode |= NVM_A8_OPCODE_SPI;
 471
 472         /* Send the READ command (opcode + addr) */
 473         e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
 474         e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
 475
 476         /* Read the data.  SPI NVMs increment the address with each byte
 477          * read and will roll over if reading beyond the end.  This allows
 478          * us to read the whole NVM from any offset
 479          */
 480         for (i = 0; i < words; i++) {
 481                 word_in = e1000_shift_in_eec_bits(hw, 16);
 482                 data[i] = (word_in >> 8) | (word_in << 8);
 483         }
 484
 485 release:
 486         nvm->ops.release(hw);
 487
 488         return ret_val;
 489 }
 490
 491 /**
 492  *  e1000_read_nvm_microwire - Reads EEPROM's using microwire
 493  *  @hw: pointer to the HW structure
 494  *  @offset: offset of word in the EEPROM to read
 495  *  @words: number of words to read
 496  *  @data: word read from the EEPROM
 497  *
 498  *  Reads a 16 bit word from the EEPROM.
 499  **/
 500 s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
 501                              u16 *data)
 502 {
 503         struct e1000_nvm_info *nvm = &hw->nvm;
 504         u32 i = 0;
 505         s32 ret_val;
 506         u8 read_opcode = NVM_READ_OPCODE_MICROWIRE;
 507
 508         DEBUGFUNC("e1000_read_nvm_microwire");
 509
 510         /* A check for invalid values:  offset too large, too many words,
 511          * and not enough words.
 512          */
 513         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 514             (words == 0)) {
 515                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 516                 return -E1000_ERR_NVM;
 517         }
 518
 519         ret_val = nvm->ops.acquire(hw);
 520         if (ret_val)
 521                 return ret_val;
 522
 523         ret_val = e1000_ready_nvm_eeprom(hw);
 524         if (ret_val)
 525                 goto release;
 526
 527         for (i = 0; i < words; i++) {
 528                 /* Send the READ command (opcode + addr) */
 529                 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
 530                 e1000_shift_out_eec_bits(hw, (u16)(offset + i),
 531                                         nvm->address_bits);
 532
 533                 /* Read the data.  For microwire, each word requires the
 534                  * overhead of setup and tear-down.
 535                  */
 536                 data[i] = e1000_shift_in_eec_bits(hw, 16);
 537                 e1000_standby_nvm(hw);
 538         }
 539
 540 release:
 541         nvm->ops.release(hw);
 542
 543         return ret_val;
 544 }
 545
 546 /**
 547  *  e1000_read_nvm_eerd - Reads EEPROM using EERD register
 548  *  @hw: pointer to the HW structure
 549  *  @offset: offset of word in the EEPROM to read
 550  *  @words: number of words to read
 551  *  @data: word read from the EEPROM
 552  *
 553  *  Reads a 16 bit word from the EEPROM using the EERD register.
 554  **/
 555 s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 556 {
 557         struct e1000_nvm_info *nvm = &hw->nvm;
 558         u32 i, eerd = 0;
 559         s32 ret_val = E1000_SUCCESS;
 560
 561         DEBUGFUNC("e1000_read_nvm_eerd");
 562
 563         /* A check for invalid values:  offset too large, too many words,
 564          * too many words for the offset, and not enough words.
 565          */
 566         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 567             (words == 0)) {
 568                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 569                 return -E1000_ERR_NVM;
 570         }
 571
 572         for (i = 0; i < words; i++) {
 573                 eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
 574                        E1000_NVM_RW_REG_START;
 575
 576                 E1000_WRITE_REG(hw, E1000_EERD, eerd);
 577                 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
 578                 if (ret_val)
 579                         break;
 580
 581                 data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
 582                            E1000_NVM_RW_REG_DATA);
 583         }
 584
 585         if (ret_val)
 586                 DEBUGOUT1("NVM read error: %d\n", ret_val);
 587
 588         return ret_val;
 589 }
 590
 591 /**
 592  *  e1000_write_nvm_spi - Write to EEPROM using SPI
 593  *  @hw: pointer to the HW structure
 594  *  @offset: offset within the EEPROM to be written to
 595  *  @words: number of words to write
 596  *  @data: 16 bit word(s) to be written to the EEPROM
 597  *
 598  *  Writes data to EEPROM at offset using SPI interface.
 599  *
 600  *  If e1000_update_nvm_checksum is not called after this function , the
 601  *  EEPROM will most likely contain an invalid checksum.
 602  **/
 603 s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 604 {
 605         struct e1000_nvm_info *nvm = &hw->nvm;
 606         s32 ret_val = -E1000_ERR_NVM;
 607         u16 widx = 0;
 608
 609         DEBUGFUNC("e1000_write_nvm_spi");
 610
 611         /* A check for invalid values:  offset too large, too many words,
 612          * and not enough words.
 613          */
 614         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 615             (words == 0)) {
 616                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 617                 return -E1000_ERR_NVM;
 618         }
 619
 620         while (widx < words) {
 621                 u8 write_opcode = NVM_WRITE_OPCODE_SPI;
 622
 623                 ret_val = nvm->ops.acquire(hw);
 624                 if (ret_val)
 625                         return ret_val;
 626
 627                 ret_val = e1000_ready_nvm_eeprom(hw);
 628                 if (ret_val) {
 629                         nvm->ops.release(hw);
 630                         return ret_val;
 631                 }
 632
 633                 e1000_standby_nvm(hw);
 634
 635                 /* Send the WRITE ENABLE command (8 bit opcode) */
 636                 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
 637                                          nvm->opcode_bits);
 638
 639                 e1000_standby_nvm(hw);
 640
 641                 /* Some SPI eeproms use the 8th address bit embedded in the
 642                  * opcode
 643                  */
 644                 if ((nvm->address_bits == 8) && (offset >= 128))
 645                         write_opcode |= NVM_A8_OPCODE_SPI;
 646
 647                 /* Send the Write command (8-bit opcode + addr) */
 648                 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
 649                 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
 650                                          nvm->address_bits);
 651
 652                 /* Loop to allow for up to whole page write of eeprom */
 653                 while (widx < words) {
 654                         u16 word_out = data[widx];
 655                         word_out = (word_out >> 8) | (word_out << 8);
 656                         e1000_shift_out_eec_bits(hw, word_out, 16);
 657                         widx++;
 658
 659                         if ((((offset + widx) * 2) % nvm->page_size) == 0) {
 660                                 e1000_standby_nvm(hw);
 661                                 break;
 662                         }
 663                 }
 664                 msec_delay(10);
 665                 nvm->ops.release(hw);
 666         }
 667
 668         return ret_val;
 669 }
 670
 671 /**
 672  *  e1000_write_nvm_microwire - Writes EEPROM using microwire
 673  *  @hw: pointer to the HW structure
 674  *  @offset: offset within the EEPROM to be written to
 675  *  @words: number of words to write
 676  *  @data: 16 bit word(s) to be written to the EEPROM
 677  *
 678  *  Writes data to EEPROM at offset using microwire interface.
 679  *
 680  *  If e1000_update_nvm_checksum is not called after this function , the
 681  *  EEPROM will most likely contain an invalid checksum.
 682  **/
 683 s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
 684                               u16 *data)
 685 {
 686         struct e1000_nvm_info *nvm = &hw->nvm;
 687         s32  ret_val;
 688         u32 eecd;
 689         u16 words_written = 0;
 690         u16 widx = 0;
 691
 692         DEBUGFUNC("e1000_write_nvm_microwire");
 693
 694         /* A check for invalid values:  offset too large, too many words,
 695          * and not enough words.
 696          */
 697         if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 698             (words == 0)) {
 699                 DEBUGOUT("nvm parameter(s) out of bounds\n");
 700                 return -E1000_ERR_NVM;
 701         }
 702
 703         ret_val = nvm->ops.acquire(hw);
 704         if (ret_val)
 705                 return ret_val;
 706
 707         ret_val = e1000_ready_nvm_eeprom(hw);
 708         if (ret_val)
 709                 goto release;
 710
 711         e1000_shift_out_eec_bits(hw, NVM_EWEN_OPCODE_MICROWIRE,
 712                                  (u16)(nvm->opcode_bits + 2));
 713
 714         e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
 715
 716         e1000_standby_nvm(hw);
 717
 718         while (words_written < words) {
 719                 e1000_shift_out_eec_bits(hw, NVM_WRITE_OPCODE_MICROWIRE,
 720                                          nvm->opcode_bits);
 721
 722                 e1000_shift_out_eec_bits(hw, (u16)(offset + words_written),
 723                                          nvm->address_bits);
 724
 725                 e1000_shift_out_eec_bits(hw, data[words_written], 16);
 726
 727                 e1000_standby_nvm(hw);
 728
 729                 for (widx = 0; widx < 200; widx++) {
 730                         eecd = E1000_READ_REG(hw, E1000_EECD);
 731                         if (eecd & E1000_EECD_DO)
 732                                 break;
 733                         usec_delay(50);
 734                 }
 735
 736                 if (widx == 200) {
 737                         DEBUGOUT("NVM Write did not complete\n");
 738                         ret_val = -E1000_ERR_NVM;
 739                         goto release;
 740                 }
 741
 742                 e1000_standby_nvm(hw);
 743
 744                 words_written++;
 745         }
 746
 747         e1000_shift_out_eec_bits(hw, NVM_EWDS_OPCODE_MICROWIRE,
 748                                  (u16)(nvm->opcode_bits + 2));
 749
 750         e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
 751
 752 release:
 753         nvm->ops.release(hw);
 754
 755         return ret_val;
 756 }
 757
 758 /**
 759  *  e1000_read_pba_string_generic - Read device part number
 760  *  @hw: pointer to the HW structure
 761  *  @pba_num: pointer to device part number
 762  *  @pba_num_size: size of part number buffer
 763  *
 764  *  Reads the product board assembly (PBA) number from the EEPROM and stores
 765  *  the value in pba_num.
 766  **/
 767 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
 768                                   u32 pba_num_size)
 769 {
 770         s32 ret_val;
 771         u16 nvm_data;
 772         u16 pba_ptr;
 773         u16 offset;
 774         u16 length;
 775
 776         DEBUGFUNC("e1000_read_pba_string_generic");
 777
 778         if ((hw->mac.type >= e1000_i210) &&
 779             !e1000_get_flash_presence_i210(hw)) {
 780                 DEBUGOUT("Flashless no PBA string\n");
 781                 return -E1000_ERR_NVM_PBA_SECTION;
 782         }
 783
 784         if (pba_num == NULL) {
 785                 DEBUGOUT("PBA string buffer was null\n");
 786                 return -E1000_ERR_INVALID_ARGUMENT;
 787         }
 788
 789         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
 790         if (ret_val) {
 791                 DEBUGOUT("NVM Read Error\n");
 792                 return ret_val;
 793         }
 794
 795         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
 796         if (ret_val) {
 797                 DEBUGOUT("NVM Read Error\n");
 798                 return ret_val;
 799         }
 800
 801         /* if nvm_data is not ptr guard the PBA must be in legacy format which
 802          * means pba_ptr is actually our second data word for the PBA number
 803          * and we can decode it into an ascii string
 804          */
 805         if (nvm_data != NVM_PBA_PTR_GUARD) {
 806                 DEBUGOUT("NVM PBA number is not stored as string\n");
 807
 808                 /* make sure callers buffer is big enough to store the PBA */
 809                 if (pba_num_size < E1000_PBANUM_LENGTH) {
 810                         DEBUGOUT("PBA string buffer too small\n");
 811                         return E1000_ERR_NO_SPACE;
 812                 }
 813
 814                 /* extract hex string from data and pba_ptr */
 815                 pba_num[0] = (nvm_data >> 12) & 0xF;
 816                 pba_num[1] = (nvm_data >> 8) & 0xF;
 817                 pba_num[2] = (nvm_data >> 4) & 0xF;
 818                 pba_num[3] = nvm_data & 0xF;
 819                 pba_num[4] = (pba_ptr >> 12) & 0xF;
 820                 pba_num[5] = (pba_ptr >> 8) & 0xF;
 821                 pba_num[6] = '-';
 822                 pba_num[7] = 0;
 823                 pba_num[8] = (pba_ptr >> 4) & 0xF;
 824                 pba_num[9] = pba_ptr & 0xF;
 825
 826                 /* put a null character on the end of our string */
 827                 pba_num[10] = '\0';
 828
 829                 /* switch all the data but the '-' to hex char */
 830                 for (offset = 0; offset < 10; offset++) {
 831                         if (pba_num[offset] < 0xA)
 832                                 pba_num[offset] += '0';
 833                         else if (pba_num[offset] < 0x10)
 834                                 pba_num[offset] += 'A' - 0xA;
 835                 }
 836
 837                 return E1000_SUCCESS;
 838         }
 839
 840         ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
 841         if (ret_val) {
 842                 DEBUGOUT("NVM Read Error\n");
 843                 return ret_val;
 844         }
 845
 846         if (length == 0xFFFF || length == 0) {
 847                 DEBUGOUT("NVM PBA number section invalid length\n");
 848                 return -E1000_ERR_NVM_PBA_SECTION;
 849         }
 850         /* check if pba_num buffer is big enough */
 851         if (pba_num_size < (((u32)length * 2) - 1)) {
 852                 DEBUGOUT("PBA string buffer too small\n");
 853                 return -E1000_ERR_NO_SPACE;
 854         }
 855
 856         /* trim pba length from start of string */
 857         pba_ptr++;
 858         length--;
 859
 860         for (offset = 0; offset < length; offset++) {
 861                 ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);
 862                 if (ret_val) {
 863                         DEBUGOUT("NVM Read Error\n");
 864                         return ret_val;
 865                 }
 866                 pba_num[offset * 2] = (u8)(nvm_data >> 8);
 867                 pba_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF);
 868         }
 869         pba_num[offset * 2] = '\0';
 870
 871         return E1000_SUCCESS;
 872 }
 873
 874 /**
 875  *  e1000_read_pba_length_generic - Read device part number length
 876  *  @hw: pointer to the HW structure
 877  *  @pba_num_size: size of part number buffer
 878  *
 879  *  Reads the product board assembly (PBA) number length from the EEPROM and
 880  *  stores the value in pba_num_size.
 881  **/
 882 s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)
 883 {
 884         s32 ret_val;
 885         u16 nvm_data;
 886         u16 pba_ptr;
 887         u16 length;
 888
 889         DEBUGFUNC("e1000_read_pba_length_generic");
 890
 891         if (pba_num_size == NULL) {
 892                 DEBUGOUT("PBA buffer size was null\n");
 893                 return -E1000_ERR_INVALID_ARGUMENT;
 894         }
 895
 896         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
 897         if (ret_val) {
 898                 DEBUGOUT("NVM Read Error\n");
 899                 return ret_val;
 900         }
 901
 902         ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
 903         if (ret_val) {
 904                 DEBUGOUT("NVM Read Error\n");
 905                 return ret_val;
 906         }
 907
 908          /* if data is not ptr guard the PBA must be in legacy format */
 909         if (nvm_data != NVM_PBA_PTR_GUARD) {
 910                 *pba_num_size = E1000_PBANUM_LENGTH;
 911                 return E1000_SUCCESS;
 912         }
 913
 914         ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
 915         if (ret_val) {
 916                 DEBUGOUT("NVM Read Error\n");
 917                 return ret_val;
 918         }
 919
 920         if (length == 0xFFFF || length == 0) {
 921                 DEBUGOUT("NVM PBA number section invalid length\n");
 922                 return -E1000_ERR_NVM_PBA_SECTION;
 923         }
 924
 925         /* Convert from length in u16 values to u8 chars, add 1 for NULL,
 926          * and subtract 2 because length field is included in length.
 927          */
 928         *pba_num_size = ((u32)length * 2) - 1;
 929
 930         return E1000_SUCCESS;
 931 }
 932
 933
 934 /**
 935  *  e1000_read_pba_raw
 936  *  @hw: pointer to the HW structure
 937  *  @eeprom_buf: optional pointer to EEPROM image
 938  *  @eeprom_buf_size: size of EEPROM image in words
 939  *  @max_pba_block_size: PBA block size limit
 940  *  @pba: pointer to output PBA structure
 941  *
 942  *  Reads PBA from EEPROM image when eeprom_buf is not NULL.
 943  *  Reads PBA from physical EEPROM device when eeprom_buf is NULL.
 944  *
 945  **/
 946 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
 947                        u32 eeprom_buf_size, u16 max_pba_block_size,
 948                        struct e1000_pba *pba)
 949 {
 950         s32 ret_val;
 951         u16 pba_block_size;
 952
 953         if (pba == NULL)
 954                 return -E1000_ERR_PARAM;
 955
 956         if (eeprom_buf == NULL) {
 957                 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2,
 958                                          &pba->word[0]);
 959                 if (ret_val)
 960                         return ret_val;
 961         } else {
 962                 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
 963                         pba->word[0] = eeprom_buf[NVM_PBA_OFFSET_0];
 964                         pba->word[1] = eeprom_buf[NVM_PBA_OFFSET_1];
 965                 } else {
 966                         return -E1000_ERR_PARAM;
 967                 }
 968         }
 969
 970         if (pba->word[0] == NVM_PBA_PTR_GUARD) {
 971                 if (pba->pba_block == NULL)
 972                         return -E1000_ERR_PARAM;
 973
 974                 ret_val = e1000_get_pba_block_size(hw, eeprom_buf,
 975                                                    eeprom_buf_size,
 976                                                    &pba_block_size);
 977                 if (ret_val)
 978                         return ret_val;
 979
 980                 if (pba_block_size > max_pba_block_size)
 981                         return -E1000_ERR_PARAM;
 982
 983                 if (eeprom_buf == NULL) {
 984                         ret_val = e1000_read_nvm(hw, pba->word[1],
 985                                                  pba_block_size,
 986                                                  pba->pba_block);
 987                         if (ret_val)
 988                                 return ret_val;
 989                 } else {
 990                         if (eeprom_buf_size > (u32)(pba->word[1] +
 991                                               pba_block_size)) {
 992                                 memcpy(pba->pba_block,
 993                                        &eeprom_buf[pba->word[1]],
 994                                        pba_block_size * sizeof(u16));
 995                         } else {
 996                                 return -E1000_ERR_PARAM;
 997                         }
 998                 }
 999         }
1000
1001         return E1000_SUCCESS;
1002 }
1003
1004 /**
1005  *  e1000_write_pba_raw
1006  *  @hw: pointer to the HW structure
1007  *  @eeprom_buf: optional pointer to EEPROM image
1008  *  @eeprom_buf_size: size of EEPROM image in words
1009  *  @pba: pointer to PBA structure
1010  *
1011  *  Writes PBA to EEPROM image when eeprom_buf is not NULL.
1012  *  Writes PBA to physical EEPROM device when eeprom_buf is NULL.
1013  *
1014  **/
1015 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
1016                         u32 eeprom_buf_size, struct e1000_pba *pba)
1017 {
1018         s32 ret_val;
1019
1020         if (pba == NULL)
1021                 return -E1000_ERR_PARAM;
1022
1023         if (eeprom_buf == NULL) {
1024                 ret_val = e1000_write_nvm(hw, NVM_PBA_OFFSET_0, 2,
1025                                           &pba->word[0]);
1026                 if (ret_val)
1027                         return ret_val;
1028         } else {
1029                 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
1030                         eeprom_buf[NVM_PBA_OFFSET_0] = pba->word[0];
1031                         eeprom_buf[NVM_PBA_OFFSET_1] = pba->word[1];
1032                 } else {
1033                         return -E1000_ERR_PARAM;
1034                 }
1035         }
1036
1037         if (pba->word[0] == NVM_PBA_PTR_GUARD) {
1038                 if (pba->pba_block == NULL)
1039                         return -E1000_ERR_PARAM;
1040
1041                 if (eeprom_buf == NULL) {
1042                         ret_val = e1000_write_nvm(hw, pba->word[1],
1043                                                   pba->pba_block[0],
1044                                                   pba->pba_block);
1045                         if (ret_val)
1046                                 return ret_val;
1047                 } else {
1048                         if (eeprom_buf_size > (u32)(pba->word[1] +
1049                                               pba->pba_block[0])) {
1050                                 memcpy(&eeprom_buf[pba->word[1]],
1051                                        pba->pba_block,
1052                                        pba->pba_block[0] * sizeof(u16));
1053                         } else {
1054                                 return -E1000_ERR_PARAM;
1055                         }
1056                 }
1057         }
1058
1059         return E1000_SUCCESS;
1060 }
1061
1062 /**
1063  *  e1000_get_pba_block_size
1064  *  @hw: pointer to the HW structure
1065  *  @eeprom_buf: optional pointer to EEPROM image
1066  *  @eeprom_buf_size: size of EEPROM image in words
1067  *  @pba_data_size: pointer to output variable
1068  *
1069  *  Returns the size of the PBA block in words. Function operates on EEPROM
1070  *  image if the eeprom_buf pointer is not NULL otherwise it accesses physical
1071  *  EEPROM device.
1072  *
1073  **/
1074 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
1075                              u32 eeprom_buf_size, u16 *pba_block_size)
1076 {
1077         s32 ret_val;
1078         u16 pba_word[2];
1079         u16 length;
1080
1081         DEBUGFUNC("e1000_get_pba_block_size");
1082
1083         if (eeprom_buf == NULL) {
1084                 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2, &pba_word[0]);
1085                 if (ret_val)
1086                         return ret_val;
1087         } else {
1088                 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
1089                         pba_word[0] = eeprom_buf[NVM_PBA_OFFSET_0];
1090                         pba_word[1] = eeprom_buf[NVM_PBA_OFFSET_1];
1091                 } else {
1092                         return -E1000_ERR_PARAM;
1093                 }
1094         }
1095
1096         if (pba_word[0] == NVM_PBA_PTR_GUARD) {
1097                 if (eeprom_buf == NULL) {
1098                         ret_val = e1000_read_nvm(hw, pba_word[1] + 0, 1,
1099                                                  &length);
1100                         if (ret_val)
1101                                 return ret_val;
1102                 } else {
1103                         if (eeprom_buf_size > pba_word[1])
1104                                 length = eeprom_buf[pba_word[1] + 0];
1105                         else
1106                                 return -E1000_ERR_PARAM;
1107                 }
1108
1109                 if (length == 0xFFFF || length == 0)
1110                         return -E1000_ERR_NVM_PBA_SECTION;
1111         } else {
1112                 /* PBA number in legacy format, there is no PBA Block. */
1113                 length = 0;
1114         }
1115
1116         if (pba_block_size != NULL)
1117                 *pba_block_size = length;
1118
1119         return E1000_SUCCESS;
1120 }
1121
1122 /**
1123  *  e1000_read_mac_addr_generic - Read device MAC address
1124  *  @hw: pointer to the HW structure
1125  *
1126  *  Reads the device MAC address from the EEPROM and stores the value.
1127  *  Since devices with two ports use the same EEPROM, we increment the
1128  *  last bit in the MAC address for the second port.
1129  **/
1130 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
1131 {
1132         u32 rar_high;
1133         u32 rar_low;
1134         u16 i;
1135
1136         rar_high = E1000_READ_REG(hw, E1000_RAH(0));
1137         rar_low = E1000_READ_REG(hw, E1000_RAL(0));
1138
1139         for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
1140                 hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
1141
1142         for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
1143                 hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
1144
1145         for (i = 0; i < ETH_ADDR_LEN; i++)
1146                 hw->mac.addr[i] = hw->mac.perm_addr[i];
1147
1148         return E1000_SUCCESS;
1149 }
1150
1151 /**
1152  *  e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
1153  *  @hw: pointer to the HW structure
1154  *
1155  *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
1156  *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
1157  **/
1158 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
1159 {
1160         s32 ret_val;
1161         u16 checksum = 0;
1162         u16 i, nvm_data;
1163
1164         DEBUGFUNC("e1000_validate_nvm_checksum_generic");
1165
1166         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1167                 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1168                 if (ret_val) {
1169                         DEBUGOUT("NVM Read Error\n");
1170                         return ret_val;
1171                 }
1172                 checksum += nvm_data;
1173         }
1174
1175         if (checksum != (u16) NVM_SUM) {
1176                 DEBUGOUT("NVM Checksum Invalid\n");
1177                 return -E1000_ERR_NVM;
1178         }
1179
1180         return E1000_SUCCESS;
1181 }
1182
1183 /**
1184  *  e1000_update_nvm_checksum_generic - Update EEPROM checksum
1185  *  @hw: pointer to the HW structure
1186  *
1187  *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
1188  *  up to the checksum.  Then calculates the EEPROM checksum and writes the
1189  *  value to the EEPROM.
1190  **/
1191 s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
1192 {
1193         s32 ret_val;
1194         u16 checksum = 0;
1195         u16 i, nvm_data;
1196
1197         DEBUGFUNC("e1000_update_nvm_checksum");
1198
1199         for (i = 0; i < NVM_CHECKSUM_REG; i++) {
1200                 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1201                 if (ret_val) {
1202                         DEBUGOUT("NVM Read Error while updating checksum.\n");
1203                         return ret_val;
1204                 }
1205                 checksum += nvm_data;
1206         }
1207         checksum = (u16) NVM_SUM - checksum;
1208         ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
1209         if (ret_val)
1210                 DEBUGOUT("NVM Write Error while updating checksum.\n");
1211
1212         return ret_val;
1213 }
1214
1215 /**
1216  *  e1000_reload_nvm_generic - Reloads EEPROM
1217  *  @hw: pointer to the HW structure
1218  *
1219  *  Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
1220  *  extended control register.
1221  **/
1222 static void e1000_reload_nvm_generic(struct e1000_hw *hw)
1223 {
1224         u32 ctrl_ext;
1225
1226         DEBUGFUNC("e1000_reload_nvm_generic");
1227
1228         usec_delay(10);
1229         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1230         ctrl_ext |= E1000_CTRL_EXT_EE_RST;
1231         E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1232         E1000_WRITE_FLUSH(hw);
1233 }
1234
1235