2 * Copyright (c) 2011-2012 Stefan Bethke.
3 * Copyright (c) 2012 Adrian Chadd.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/param.h>
32 #include <sys/errno.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/socket.h>
36 #include <sys/sockio.h>
37 #include <sys/sysctl.h>
38 #include <sys/systm.h>
41 #include <net/if_arp.h>
42 #include <net/ethernet.h>
43 #include <net/if_dl.h>
44 #include <net/if_media.h>
45 #include <net/if_types.h>
47 #include <machine/bus.h>
48 #include <dev/iicbus/iic.h>
49 #include <dev/iicbus/iiconf.h>
50 #include <dev/iicbus/iicbus.h>
51 #include <dev/mii/mii.h>
52 #include <dev/mii/miivar.h>
53 #include <dev/etherswitch/mdio.h>
55 #include <dev/etherswitch/etherswitch.h>
57 #include <dev/etherswitch/arswitch/arswitchreg.h>
58 #include <dev/etherswitch/arswitch/arswitchvar.h>
60 #include <dev/etherswitch/arswitch/arswitch_reg.h>
61 #include <dev/etherswitch/arswitch/arswitch_phy.h>
64 #include "miibus_if.h"
65 #include "etherswitch_if.h"
68 static SYSCTL_NODE(_debug, OID_AUTO, arswitch, CTLFLAG_RD, 0, "arswitch");
72 * access PHYs integrated into the switch chip through the switch's MDIO
76 arswitch_readphy(device_t dev, int phy, int reg)
78 struct arswitch_softc *sc;
79 uint32_t data = 0, ctrl;
82 sc = device_get_softc(dev);
83 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
85 if (phy < 0 || phy >= 32)
87 if (reg < 0 || reg >= 32)
91 err = arswitch_writereg_msb(dev, AR8X16_REG_MDIO_CTRL,
92 AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN |
93 AR8X16_MDIO_CTRL_CMD_READ |
94 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
95 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT));
96 DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg);
99 for (timeout = 100; timeout--; ) {
100 ctrl = arswitch_readreg_msb(dev, AR8X16_REG_MDIO_CTRL);
101 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
106 data = arswitch_readreg_lsb(dev, AR8X16_REG_MDIO_CTRL) &
107 AR8X16_MDIO_CTRL_DATA_MASK;
117 arswitch_writephy(device_t dev, int phy, int reg, int data)
119 struct arswitch_softc *sc;
123 sc = device_get_softc(dev);
124 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
126 if (reg < 0 || reg >= 32)
130 err = arswitch_writereg(dev, AR8X16_REG_MDIO_CTRL,
131 AR8X16_MDIO_CTRL_BUSY |
132 AR8X16_MDIO_CTRL_MASTER_EN |
133 AR8X16_MDIO_CTRL_CMD_WRITE |
134 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
135 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT) |
136 (data & AR8X16_MDIO_CTRL_DATA_MASK));
139 for (timeout = 100; timeout--; ) {
140 ctrl = arswitch_readreg(dev, AR8X16_REG_MDIO_CTRL);
141 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
147 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg);