1 /******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
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16 3. Neither the name of the Intel Corporation nor the names of its
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18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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30 POSSIBILITY OF SUCH DAMAGE.
32 ******************************************************************************/
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #ifndef IXGBE_LEGACY_TX
43 #include <sys/buf_ring.h>
46 #include <sys/protosw.h>
47 #include <sys/socket.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/sockio.h>
54 #include <net/if_arp.h>
56 #include <net/ethernet.h>
57 #include <net/if_dl.h>
58 #include <net/if_media.h>
61 #include <net/if_types.h>
62 #include <net/if_vlan_var.h>
64 #include <netinet/in_systm.h>
65 #include <netinet/in.h>
66 #include <netinet/if_ether.h>
67 #include <netinet/ip.h>
68 #include <netinet/ip6.h>
69 #include <netinet/tcp.h>
70 #include <netinet/tcp_lro.h>
71 #include <netinet/udp.h>
73 #include <machine/in_cksum.h>
76 #include <machine/bus.h>
78 #include <machine/resource.h>
81 #include <machine/clock.h>
82 #include <dev/pci/pcivar.h>
83 #include <dev/pci/pcireg.h>
85 #include <sys/sysctl.h>
86 #include <sys/endian.h>
87 #include <sys/taskqueue.h>
90 #include <machine/smp.h>
93 #include "ixgbe_api.h"
94 #include "ixgbe_common.h"
95 #include "ixgbe_phy.h"
101 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
102 * number of transmit descriptors allocated by the driver. Increasing this
103 * value allows the driver to queue more transmits. Each descriptor is 16
104 * bytes. Performance tests have show the 2K value to be optimal for top
107 #define DEFAULT_TXD 1024
108 #define PERFORM_TXD 2048
113 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
114 * number of receive descriptors allocated for each RX queue. Increasing this
115 * value allows the driver to buffer more incoming packets. Each descriptor
116 * is 16 bytes. A receive buffer is also allocated for each descriptor.
118 * Note: with 8 rings and a dual port card, it is possible to bump up
119 * against the system mbuf pool limit, you can tune nmbclusters
120 * to adjust for this.
122 #define DEFAULT_RXD 1024
123 #define PERFORM_RXD 2048
127 /* Alignment for rings */
128 #define DBA_ALIGN 128
131 * This parameter controls the maximum no of times the driver will loop in
132 * the isr. Minimum Value = 1
137 * This is the max watchdog interval, ie. the time that can
138 * pass between any two TX clean operations, such only happening
139 * when the TX hardware is functioning.
141 #define IXGBE_WATCHDOG (10 * hz)
144 * This parameters control when the driver calls the routine to reclaim
145 * transmit descriptors.
147 #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
148 #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
150 /* These defines are used in MTU calculations */
151 #define IXGBE_MAX_FRAME_SIZE 9728
152 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN + \
153 ETHER_VLAN_ENCAP_LEN)
154 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
156 /* Flow control constants */
157 #define IXGBE_FC_PAUSE 0xFFFF
158 #define IXGBE_FC_HI 0x20000
159 #define IXGBE_FC_LO 0x10000
162 * Used for optimizing small rx mbufs. Effort is made to keep the copy
163 * small and aligned for the CPU L1 cache.
165 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting
166 * 32 byte alignment needed for the fast bcopy results in 8 bytes being
167 * wasted. Getting 64 byte alignment, which _should_ be ideal for
168 * modern Intel CPUs, results in 40 bytes wasted and a significant drop
169 * in observed efficiency of the optimization, 97.9% -> 81.8%.
171 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32)
172 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
173 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
175 /* Keep older OS drivers building... */
176 #if !defined(SYSCTL_ADD_UQUAD)
177 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
180 /* Defines for printing debug information */
182 #define DEBUG_IOCTL 0
185 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
186 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
187 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
188 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
189 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
190 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
191 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
192 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
193 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
195 #define MAX_NUM_MULTICAST_ADDRESSES 128
196 #define IXGBE_82598_SCATTER 100
197 #define IXGBE_82599_SCATTER 32
198 #define MSIX_82598_BAR 3
199 #define MSIX_82599_BAR 4
200 #define IXGBE_TSO_SIZE 262140
201 #define IXGBE_TX_BUFFER_SIZE ((u32) 1514)
202 #define IXGBE_RX_HDR 128
203 #define IXGBE_VFTA_SIZE 128
204 #define IXGBE_BR_SIZE 4096
205 #define IXGBE_QUEUE_MIN_FREE 32
206 #define IXGBE_MAX_TX_BUSY 10
207 #define IXGBE_QUEUE_HUNG 0x80000000
209 #define IXV_EITR_DEFAULT 128
211 /* Offload bits in mbuf flag */
212 #if __FreeBSD_version >= 800000
213 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
215 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
218 /* Backward compatibility items for very old versions */
220 #define pci_find_cap pci_find_extcap
223 #ifndef DEVMETHOD_END
224 #define DEVMETHOD_END { NULL, NULL }
228 * Interrupt Moderation parameters
230 #define IXGBE_LOW_LATENCY 128
231 #define IXGBE_AVE_LATENCY 400
232 #define IXGBE_BULK_LATENCY 1200
233 #define IXGBE_LINK_ITR 2000
235 /* MAC type macros */
236 #define IXGBE_IS_X550VF(_adapter) \
237 ((_adapter->hw.mac.type == ixgbe_mac_X550_vf) || \
238 (_adapter->hw.mac.type == ixgbe_mac_X550EM_x_vf))
240 #define IXGBE_IS_VF(_adapter) \
241 (IXGBE_IS_X550VF(_adapter) || \
242 (_adapter->hw.mac.type == ixgbe_mac_X540_vf) || \
243 (_adapter->hw.mac.type == ixgbe_mac_82599_vf))
247 *****************************************************************************
250 * This array contains the list of Subvendor/Subdevice IDs on which the driver
253 *****************************************************************************
255 typedef struct _ixgbe_vendor_info_t {
256 unsigned int vendor_id;
257 unsigned int device_id;
258 unsigned int subvendor_id;
259 unsigned int subdevice_id;
261 } ixgbe_vendor_info_t;
264 /* This is used to get SFP+ module data */
265 struct ixgbe_i2c_req {
272 struct ixgbe_tx_buf {
273 union ixgbe_adv_tx_desc *eop;
278 struct ixgbe_rx_buf {
283 #define IXGBE_RX_COPY 0x01
288 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
290 struct ixgbe_dma_alloc {
291 bus_addr_t dma_paddr;
293 bus_dma_tag_t dma_tag;
294 bus_dmamap_t dma_map;
295 bus_dma_segment_t dma_seg;
301 ** Driver queue struct: this is the interrupt container
302 ** for the associated tx and rx ring.
305 struct adapter *adapter;
306 u32 msix; /* This queue's MSIX vector */
307 u32 eims; /* This queue's EIMS bit */
310 struct resource *res;
315 struct task que_task;
316 struct taskqueue *tq;
321 * The transmit ring, one per queue
324 struct adapter *adapter;
329 union ixgbe_adv_tx_desc *tx_base;
330 struct ixgbe_tx_buf *tx_buffers;
331 struct ixgbe_dma_alloc txdma;
332 volatile u16 tx_avail;
340 #ifndef IXGBE_LEGACY_TX
342 struct task txq_task;
348 u32 bytes; /* used for AIM */
351 unsigned long tso_tx;
352 unsigned long no_tx_map_avail;
353 unsigned long no_tx_dma_setup;
360 * The Receive ring, one per rx queue
363 struct adapter *adapter;
367 union ixgbe_adv_rx_desc *rx_base;
368 struct ixgbe_dma_alloc rxdma;
379 struct ixgbe_rx_buf *rx_buffers;
382 u32 bytes; /* Used for AIM calc */
397 /* Our adapter structure */
402 struct ixgbe_osdep osdep;
405 struct resource *pci_mem;
406 struct resource *msix_mem;
409 * Interrupt resources: this set is
410 * either used for legacy, or for Link
414 struct resource *res;
416 struct ifmedia media;
417 struct callout timer;
423 eventhandler_tag vlan_attach;
424 eventhandler_tag vlan_detach;
430 ** Shadow VFTA table, this is needed because
431 ** the real vlan filter table gets cleared during
432 ** a soft reset and the driver needs to be able
435 u32 shadow_vfta[IXGBE_VFTA_SIZE];
437 /* Info about the interface */
439 u32 fc; /* local flow ctrl setting */
440 int advertise; /* link speeds */
451 /* Power management-related */
455 /* Mbuf cluster size */
458 /* Support for pluggable optics */
460 struct task link_task; /* Link tasklet */
461 struct task mod_task; /* SFP tasklet */
462 struct task msf_task; /* Multispeed Fiber */
465 struct task fdir_task;
467 struct task phy_task; /* PHY intr tasklet */
468 struct taskqueue *tq;
472 ** This is the irq holder, it has
473 ** and RX/TX pair or rings associated
476 struct ix_queue *queues;
480 * Allocated at run time, an array of rings.
482 struct tx_ring *tx_rings;
487 * Allocated at run time, an array of rings.
489 struct rx_ring *rx_rings;
493 /* Multicast array memory */
497 /* Misc stats maintained by the driver */
498 unsigned long dropped_pkts;
499 unsigned long mbuf_defrag_failed;
500 unsigned long mbuf_header_failed;
501 unsigned long mbuf_packet_failed;
502 unsigned long watchdog_events;
503 unsigned long link_irq;
505 struct ixgbe_hw_stats pf;
506 struct ixgbevf_hw_stats vf;
508 #if __FreeBSD_version >= 1100036
509 /* counter(9) stats */
524 /* Precision Time Sync (IEEE 1588) defines */
525 #define ETHERTYPE_IEEE1588 0x88F7
526 #define PICOSECS_PER_TICK 20833
527 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
528 #define IXGBE_ADVTXD_TSTAMP 0x00080000
531 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
532 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
533 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx)
534 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx)
535 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx)
536 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx)
537 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx)
538 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx)
539 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx)
540 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx)
541 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx)
542 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx)
543 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED)
544 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
546 /* For backward compatibility */
547 #if !defined(PCIER_LINK_STA)
548 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
552 #if __FreeBSD_version >= 1100036
553 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count)
554 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count)
555 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count)
556 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count)
557 #define IXGBE_SET_COLLISIONS(sc, count)
558 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count)
559 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count)
560 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count)
561 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count)
562 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count)
564 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count)
565 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count)
566 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count)
567 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count)
568 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count)
569 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count)
570 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count)
571 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count)
572 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count)
573 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count)
576 /* External PHY register addresses */
577 #define IXGBE_PHY_CURRENT_TEMP 0xC820
578 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830
580 /* Sysctl help messages; displayed with sysctl -d */
581 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
582 "\nControl advertised link speed using these flags:\n" \
583 "\t0x1 - advertise 100M\n" \
584 "\t0x2 - advertise 1G\n" \
585 "\t0x4 - advertise 10G\n\n" \
586 "\t100M is only supported on certain 10GBaseT adapters.\n"
588 #define IXGBE_SYSCTL_DESC_SET_FC \
589 "\nSet flow control mode using these values:\n" \
593 "\t3 - tx and rx pause"
596 ixgbe_is_sfp(struct ixgbe_hw *hw)
598 switch (hw->phy.type) {
599 case ixgbe_phy_sfp_avago:
600 case ixgbe_phy_sfp_ftl:
601 case ixgbe_phy_sfp_intel:
602 case ixgbe_phy_sfp_unknown:
603 case ixgbe_phy_sfp_passive_tyco:
604 case ixgbe_phy_sfp_passive_unknown:
605 case ixgbe_phy_qsfp_passive_unknown:
606 case ixgbe_phy_qsfp_active_unknown:
607 case ixgbe_phy_qsfp_intel:
608 case ixgbe_phy_qsfp_unknown:
615 /* Workaround to make 8.0 buildable */
616 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
618 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
621 if (ALTQ_IS_ENABLED(&ifp->if_snd))
624 return (!buf_ring_empty(br));
629 ** Find the number of unrefreshed RX descriptors
632 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
634 if (rxr->next_to_check > rxr->next_to_refresh)
635 return (rxr->next_to_check - rxr->next_to_refresh - 1);
637 return ((rxr->num_desc + rxr->next_to_check) -
638 rxr->next_to_refresh - 1);
642 ** This checks for a zero mac addr, something that will be likely
643 ** unless the Admin on the Host has created one.
646 ixv_check_ether_addr(u8 *addr)
650 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
651 addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
656 /* Shared Prototypes */
658 #ifdef IXGBE_LEGACY_TX
659 void ixgbe_start(struct ifnet *);
660 void ixgbe_start_locked(struct tx_ring *, struct ifnet *);
661 #else /* ! IXGBE_LEGACY_TX */
662 int ixgbe_mq_start(struct ifnet *, struct mbuf *);
663 int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *);
664 void ixgbe_qflush(struct ifnet *);
665 void ixgbe_deferred_mq_start(void *, int);
666 #endif /* IXGBE_LEGACY_TX */
668 int ixgbe_allocate_queues(struct adapter *);
669 int ixgbe_allocate_transmit_buffers(struct tx_ring *);
670 int ixgbe_setup_transmit_structures(struct adapter *);
671 void ixgbe_free_transmit_structures(struct adapter *);
672 int ixgbe_allocate_receive_buffers(struct rx_ring *);
673 int ixgbe_setup_receive_structures(struct adapter *);
674 void ixgbe_free_receive_structures(struct adapter *);
675 void ixgbe_txeof(struct tx_ring *);
676 bool ixgbe_rxeof(struct ix_queue *);
678 int ixgbe_dma_malloc(struct adapter *,
679 bus_size_t, struct ixgbe_dma_alloc *, int);
680 void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *);
681 #endif /* _IXGBE_H_ */