2 * Copyright (c) 2012-2015 LSI Corp.
3 * Copyright (c) 2013-2015 Avago Technologies
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30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
36 * Copyright (c) 2012-2015 LSI Corporation.
37 * Copyright (c) 2013-2015 Avago Technologies
41 * Title: MPI RAID Accelerator messages and structures
42 * Creation Date: April 13, 2009
44 * mpi2_ra.h Version: 02.00.00
49 * Date Version Description
50 * -------- -------- ------------------------------------------------------
51 * 05-06-09 02.00.00 Initial version.
52 * --------------------------------------------------------------------------
58 /* generic structure for RAID Accelerator Control Block */
59 typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
61 U32 Reserved[8]; /* 0x00 */
62 U32 RaidAcceleratorCDB[1]; /* 0x20 */
63 } MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
64 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
65 Mpi2RAIDAcceleratorControlBlock_t,
66 MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
69 /******************************************************************************
71 * RAID Accelerator Messages
73 *******************************************************************************/
75 /* RAID Accelerator Request Message */
76 typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
78 U16 Reserved0; /* 0x00 */
79 U8 ChainOffset; /* 0x02 */
80 U8 Function; /* 0x03 */
81 U16 Reserved1; /* 0x04 */
82 U8 Reserved2; /* 0x06 */
83 U8 MsgFlags; /* 0x07 */
86 U16 Reserved3; /* 0x0A */
87 U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
88 U8 DmaEngineNumber; /* 0x14 */
89 U8 Reserved4; /* 0x15 */
90 U16 Reserved5; /* 0x16 */
91 U32 Reserved6; /* 0x18 */
92 U32 Reserved7; /* 0x1C */
93 U32 Reserved8; /* 0x20 */
94 } MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
95 Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
98 /* RAID Accelerator Error Reply Message */
99 typedef struct _MPI2_RAID_ACCELERATOR_REPLY
101 U16 Reserved0; /* 0x00 */
102 U8 MsgLength; /* 0x02 */
103 U8 Function; /* 0x03 */
104 U16 Reserved1; /* 0x04 */
105 U8 Reserved2; /* 0x06 */
106 U8 MsgFlags; /* 0x07 */
109 U16 Reserved3; /* 0x0A */
110 U16 Reserved4; /* 0x0C */
111 U16 IOCStatus; /* 0x0E */
112 U32 IOCLogInfo; /* 0x10 */
113 U32 ProductSpecificData[3]; /* 0x14 */
114 } MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
115 Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;