2 * Copyright (c) 2009-2015 LSI Corp.
3 * Copyright (c) 2013-2015 Avago Technologies
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7 * modification, are permitted provided that the following conditions
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33 * Copyright (c) 2009-2015 LSI Corporation.
34 * Copyright (c) 2013-2015 Avago Technologies
38 * Title: MPI RAID Accelerator messages and structures
39 * Creation Date: April 13, 2009
41 * mpi2_ra.h Version: 02.00.00
46 * Date Version Description
47 * -------- -------- ------------------------------------------------------
48 * 05-06-09 02.00.00 Initial version.
49 * --------------------------------------------------------------------------
55 /* generic structure for RAID Accelerator Control Block */
56 typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
58 U32 Reserved[8]; /* 0x00 */
59 U32 RaidAcceleratorCDB[1]; /* 0x20 */
60 } MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
61 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
62 Mpi2RAIDAcceleratorControlBlock_t,
63 MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
66 /******************************************************************************
68 * RAID Accelerator Messages
70 *******************************************************************************/
72 /* RAID Accelerator Request Message */
73 typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
75 U16 Reserved0; /* 0x00 */
76 U8 ChainOffset; /* 0x02 */
77 U8 Function; /* 0x03 */
78 U16 Reserved1; /* 0x04 */
79 U8 Reserved2; /* 0x06 */
80 U8 MsgFlags; /* 0x07 */
83 U16 Reserved3; /* 0x0A */
84 U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
85 U8 DmaEngineNumber; /* 0x14 */
86 U8 Reserved4; /* 0x15 */
87 U16 Reserved5; /* 0x16 */
88 U32 Reserved6; /* 0x18 */
89 U32 Reserved7; /* 0x1C */
90 U32 Reserved8; /* 0x20 */
91 } MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
92 Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
95 /* RAID Accelerator Error Reply Message */
96 typedef struct _MPI2_RAID_ACCELERATOR_REPLY
98 U16 Reserved0; /* 0x00 */
99 U8 MsgLength; /* 0x02 */
100 U8 Function; /* 0x03 */
101 U16 Reserved1; /* 0x04 */
102 U8 Reserved2; /* 0x06 */
103 U8 MsgFlags; /* 0x07 */
106 U16 Reserved3; /* 0x0A */
107 U16 Reserved4; /* 0x0C */
108 U16 IOCStatus; /* 0x0E */
109 U32 IOCLogInfo; /* 0x10 */
110 U32 ProductSpecificData[3]; /* 0x14 */
111 } MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
112 Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;