2 * Copyright (c) 2006-2015 LSI Corp.
3 * Copyright (c) 2013-2015 Avago Technologies
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
33 * Copyright (c) 2006-2015 LSI Corporation.
34 * Copyright (c) 2013-2015 Avago Technologies
38 * Title: MPI Target mode messages and structures
39 * Creation Date: September 8, 2006
41 * mpi2_targ.h Version: 02.00.04
46 * Date Version Description
47 * -------- -------- ------------------------------------------------------
48 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
49 * 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to
50 * BufferPostFlags field of CommandBufferPostBase Request.
51 * 02-29-08 02.00.02 Modified various names to make them 32-character unique.
52 * 10-02-08 02.00.03 Removed NextCmdBufferOffset from
53 * MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
54 * Target Status Send Request only takes a single SGE for
56 * 02-10-10 02.00.04 Added comment to MPI2_TARGET_SSP_RSP_IU structure.
57 * --------------------------------------------------------------------------
64 /******************************************************************************
66 * SCSI Target Messages
68 *******************************************************************************/
70 /****************************************************************************
71 * Target Command Buffer Post Base Request
72 ****************************************************************************/
74 typedef struct _MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST
76 U8 BufferPostFlags; /* 0x00 */
77 U8 Reserved1; /* 0x01 */
78 U8 ChainOffset; /* 0x02 */
79 U8 Function; /* 0x03 */
80 U16 TotalCmdBuffers; /* 0x04 */
81 U8 Reserved; /* 0x06 */
82 U8 MsgFlags; /* 0x07 */
85 U16 Reserved2; /* 0x0A */
86 U32 Reserved3; /* 0x0C */
87 U16 CmdBufferLength; /* 0x10 */
88 U16 Reserved4; /* 0x12 */
89 U32 BaseAddressLow; /* 0x14 */
90 U32 BaseAddressHigh; /* 0x18 */
91 } MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
92 MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
93 Mpi2TargetCmdBufferPostBaseRequest_t,
94 MPI2_POINTER pMpi2TargetCmdBufferPostBaseRequest_t;
96 /* values for the BufferPostflags field */
97 #define MPI2_CMD_BUF_POST_BASE_ADDRESS_SPACE_MASK (0x0C)
98 #define MPI2_CMD_BUF_POST_BASE_SYSTEM_ADDRESS_SPACE (0x00)
99 #define MPI2_CMD_BUF_POST_BASE_IOCDDR_ADDRESS_SPACE (0x04)
100 #define MPI2_CMD_BUF_POST_BASE_IOCPLB_ADDRESS_SPACE (0x08)
101 #define MPI2_CMD_BUF_POST_BASE_IOCPLBNTA_ADDRESS_SPACE (0x0C)
103 #define MPI2_CMD_BUF_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
106 /****************************************************************************
107 * Target Command Buffer Post List Request
108 ****************************************************************************/
110 typedef struct _MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST
112 U16 Reserved; /* 0x00 */
113 U8 ChainOffset; /* 0x02 */
114 U8 Function; /* 0x03 */
115 U16 CmdBufferCount; /* 0x04 */
116 U8 Reserved1; /* 0x06 */
117 U8 MsgFlags; /* 0x07 */
120 U16 Reserved2; /* 0x0A */
121 U32 Reserved3; /* 0x0C */
122 U16 IoIndex[2]; /* 0x10 */
123 } MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST,
124 MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST,
125 Mpi2TargetCmdBufferPostListRequest_t,
126 MPI2_POINTER pMpi2TargetCmdBufferPostListRequest_t;
128 /****************************************************************************
129 * Target Command Buffer Post Base List Reply
130 ****************************************************************************/
132 typedef struct _MPI2_TARGET_BUF_POST_BASE_LIST_REPLY
135 U8 Reserved; /* 0x01 */
136 U8 MsgLength; /* 0x02 */
137 U8 Function; /* 0x03 */
138 U16 Reserved1; /* 0x04 */
139 U8 Reserved2; /* 0x06 */
140 U8 MsgFlags; /* 0x07 */
143 U16 Reserved3; /* 0x0A */
144 U16 Reserved4; /* 0x0C */
145 U16 IOCStatus; /* 0x0E */
146 U32 IOCLogInfo; /* 0x10 */
147 U16 IoIndex; /* 0x14 */
148 U16 Reserved5; /* 0x16 */
149 U32 Reserved6; /* 0x18 */
150 } MPI2_TARGET_BUF_POST_BASE_LIST_REPLY,
151 MPI2_POINTER PTR_MPI2_TARGET_BUF_POST_BASE_LIST_REPLY,
152 Mpi2TargetCmdBufferPostBaseListReply_t,
153 MPI2_POINTER pMpi2TargetCmdBufferPostBaseListReply_t;
156 #define MPI2_CMD_BUF_POST_REPLY_IOINDEX_VALID (0x01)
159 /****************************************************************************
160 * Command Buffer Formats (with 16 byte CDB)
161 ****************************************************************************/
163 typedef struct _MPI2_TARGET_SSP_CMD_BUFFER
165 U8 FrameType; /* 0x00 */
166 U8 Reserved1; /* 0x01 */
167 U16 InitiatorConnectionTag; /* 0x02 */
168 U32 HashedSourceSASAddress; /* 0x04 */
169 U16 Reserved2; /* 0x08 */
170 U16 Flags; /* 0x0A */
171 U32 Reserved3; /* 0x0C */
173 U16 TargetPortTransferTag; /* 0x12 */
174 U32 DataOffset; /* 0x14 */
175 /* COMMAND information unit starts here */
176 U8 LogicalUnitNumber[8]; /* 0x18 */
177 U8 Reserved4; /* 0x20 */
178 U8 TaskAttribute; /* lower 3 bits */ /* 0x21 */
179 U8 Reserved5; /* 0x22 */
180 U8 AdditionalCDBLength; /* upper 5 bits */ /* 0x23 */
181 U8 CDB[16]; /* 0x24 */
182 /* Additional CDB bytes extend past the CDB field */
183 } MPI2_TARGET_SSP_CMD_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_CMD_BUFFER,
184 Mpi2TargetSspCmdBuffer, MPI2_POINTER pMp2iTargetSspCmdBuffer;
186 typedef struct _MPI2_TARGET_SSP_TASK_BUFFER
188 U8 FrameType; /* 0x00 */
189 U8 Reserved1; /* 0x01 */
190 U16 InitiatorConnectionTag; /* 0x02 */
191 U32 HashedSourceSASAddress; /* 0x04 */
192 U16 Reserved2; /* 0x08 */
193 U16 Flags; /* 0x0A */
194 U32 Reserved3; /* 0x0C */
196 U16 TargetPortTransferTag; /* 0x12 */
197 U32 DataOffset; /* 0x14 */
198 /* TASK information unit starts here */
199 U8 LogicalUnitNumber[8]; /* 0x18 */
200 U16 Reserved4; /* 0x20 */
201 U8 TaskManagementFunction; /* 0x22 */
202 U8 Reserved5; /* 0x23 */
203 U16 ManagedTaskTag; /* 0x24 */
204 U16 Reserved6; /* 0x26 */
205 U32 Reserved7; /* 0x28 */
206 U32 Reserved8; /* 0x2C */
207 U32 Reserved9; /* 0x30 */
208 } MPI2_TARGET_SSP_TASK_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_TASK_BUFFER,
209 Mpi2TargetSspTaskBuffer, MPI2_POINTER pMpi2TargetSspTaskBuffer;
211 /* mask and shift for HashedSourceSASAddress field */
212 #define MPI2_TARGET_HASHED_SAS_ADDRESS_MASK (0xFFFFFF00)
213 #define MPI2_TARGET_HASHED_SAS_ADDRESS_SHIFT (8)
216 /****************************************************************************
217 * Target Assist Request
218 ****************************************************************************/
220 typedef struct _MPI2_TARGET_ASSIST_REQUEST
222 U8 Reserved1; /* 0x00 */
223 U8 TargetAssistFlags; /* 0x01 */
224 U8 ChainOffset; /* 0x02 */
225 U8 Function; /* 0x03 */
226 U16 QueueTag; /* 0x04 */
227 U8 Reserved2; /* 0x06 */
228 U8 MsgFlags; /* 0x07 */
231 U16 Reserved3; /* 0x0A */
232 U16 IoIndex; /* 0x0C */
233 U16 InitiatorConnectionTag; /* 0x0E */
234 U16 SGLFlags; /* 0x10 */
235 U8 SequenceNumber; /* 0x12 */
236 U8 Reserved4; /* 0x13 */
237 U8 SGLOffset0; /* 0x14 */
238 U8 SGLOffset1; /* 0x15 */
239 U8 SGLOffset2; /* 0x16 */
240 U8 SGLOffset3; /* 0x17 */
241 U32 SkipCount; /* 0x18 */
242 U32 DataLength; /* 0x1C */
243 U32 BidirectionalDataLength; /* 0x20 */
244 U16 IoFlags; /* 0x24 */
245 U16 EEDPFlags; /* 0x26 */
246 U32 EEDPBlockSize; /* 0x28 */
247 U32 SecondaryReferenceTag; /* 0x2C */
248 U16 SecondaryApplicationTag; /* 0x30 */
249 U16 ApplicationTagTranslationMask; /* 0x32 */
250 U32 PrimaryReferenceTag; /* 0x34 */
251 U16 PrimaryApplicationTag; /* 0x38 */
252 U16 PrimaryApplicationTagMask; /* 0x3A */
253 U32 RelativeOffset; /* 0x3C */
254 U32 Reserved5; /* 0x40 */
255 U32 Reserved6; /* 0x44 */
256 U32 Reserved7; /* 0x48 */
257 U32 Reserved8; /* 0x4C */
258 MPI2_SGE_IO_UNION SGL[1]; /* 0x50 */
259 } MPI2_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI2_TARGET_ASSIST_REQUEST,
260 Mpi2TargetAssistRequest_t, MPI2_POINTER pMpi2TargetAssistRequest_t;
262 /* Target Assist TargetAssistFlags bits */
264 #define MPI2_TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
265 #define MPI2_TARGET_ASSIST_FLAGS_TLR (0x10)
266 #define MPI2_TARGET_ASSIST_FLAGS_RETRANSMIT (0x04)
267 #define MPI2_TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
268 #define MPI2_TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
270 /* Target Assist SGLFlags bits */
272 /* base values for Data Location Address Space */
273 #define MPI2_TARGET_ASSIST_SGLFLAGS_ADDR_MASK (0x0C)
274 #define MPI2_TARGET_ASSIST_SGLFLAGS_SYSTEM_ADDR (0x00)
275 #define MPI2_TARGET_ASSIST_SGLFLAGS_IOCDDR_ADDR (0x04)
276 #define MPI2_TARGET_ASSIST_SGLFLAGS_IOCPLB_ADDR (0x08)
277 #define MPI2_TARGET_ASSIST_SGLFLAGS_PLBNTA_ADDR (0x0C)
279 /* base values for Type */
280 #define MPI2_TARGET_ASSIST_SGLFLAGS_TYPE_MASK (0x03)
281 #define MPI2_TARGET_ASSIST_SGLFLAGS_MPI_TYPE (0x00)
282 #define MPI2_TARGET_ASSIST_SGLFLAGS_32IEEE_TYPE (0x01)
283 #define MPI2_TARGET_ASSIST_SGLFLAGS_64IEEE_TYPE (0x02)
285 /* shift values for each sub-field */
286 #define MPI2_TARGET_ASSIST_SGLFLAGS_SGL3_SHIFT (12)
287 #define MPI2_TARGET_ASSIST_SGLFLAGS_SGL2_SHIFT (8)
288 #define MPI2_TARGET_ASSIST_SGLFLAGS_SGL1_SHIFT (4)
289 #define MPI2_TARGET_ASSIST_SGLFLAGS_SGL0_SHIFT (0)
291 /* Target Assist IoFlags bits */
293 #define MPI2_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800)
294 #define MPI2_TARGET_ASSIST_IOFLAGS_MULTICAST (0x0400)
295 #define MPI2_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200)
297 /* Target Assist EEDPFlags bits */
299 #define MPI2_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
300 #define MPI2_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
301 #define MPI2_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
302 #define MPI2_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
304 #define MPI2_TA_EEDPFLAGS_CHECK_REFTAG (0x0400)
305 #define MPI2_TA_EEDPFLAGS_CHECK_APPTAG (0x0200)
306 #define MPI2_TA_EEDPFLAGS_CHECK_GUARD (0x0100)
308 #define MPI2_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
310 #define MPI2_TA_EEDPFLAGS_MASK_OP (0x0007)
311 #define MPI2_TA_EEDPFLAGS_NOOP_OP (0x0000)
312 #define MPI2_TA_EEDPFLAGS_CHECK_OP (0x0001)
313 #define MPI2_TA_EEDPFLAGS_STRIP_OP (0x0002)
314 #define MPI2_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
315 #define MPI2_TA_EEDPFLAGS_INSERT_OP (0x0004)
316 #define MPI2_TA_EEDPFLAGS_REPLACE_OP (0x0006)
317 #define MPI2_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
320 /****************************************************************************
321 * Target Status Send Request
322 ****************************************************************************/
324 typedef struct _MPI2_TARGET_STATUS_SEND_REQUEST
326 U8 Reserved1; /* 0x00 */
327 U8 StatusFlags; /* 0x01 */
328 U8 ChainOffset; /* 0x02 */
329 U8 Function; /* 0x03 */
330 U16 QueueTag; /* 0x04 */
331 U8 Reserved2; /* 0x06 */
332 U8 MsgFlags; /* 0x07 */
335 U16 Reserved3; /* 0x0A */
336 U16 IoIndex; /* 0x0C */
337 U16 InitiatorConnectionTag; /* 0x0E */
338 U16 SGLFlags; /* 0x10 */
339 U16 Reserved4; /* 0x12 */
340 U8 SGLOffset0; /* 0x14 */
341 U8 Reserved5; /* 0x15 */
342 U16 Reserved6; /* 0x16 */
343 U32 Reserved7; /* 0x18 */
344 U32 Reserved8; /* 0x1C */
345 MPI2_SIMPLE_SGE_UNION StatusDataSGE; /* 0x20 */
346 } MPI2_TARGET_STATUS_SEND_REQUEST,
347 MPI2_POINTER PTR_MPI2_TARGET_STATUS_SEND_REQUEST,
348 Mpi2TargetStatusSendRequest_t, MPI2_POINTER pMpi2TargetStatusSendRequest_t;
350 /* Target Status Send StatusFlags bits */
352 #define MPI2_TSS_FLAGS_REPOST_CMD_BUFFER (0x80)
353 #define MPI2_TSS_FLAGS_RETRANSMIT (0x04)
354 #define MPI2_TSS_FLAGS_AUTO_GOOD_STATUS (0x01)
356 /* Target Status Send SGLFlags bits */
357 /* Data Location Address Space */
358 #define MPI2_TSS_SGLFLAGS_ADDR_MASK (0x0C)
359 #define MPI2_TSS_SGLFLAGS_SYSTEM_ADDR (0x00)
360 #define MPI2_TSS_SGLFLAGS_IOCDDR_ADDR (0x04)
361 #define MPI2_TSS_SGLFLAGS_IOCPLB_ADDR (0x08)
362 #define MPI2_TSS_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
364 #define MPI2_TSS_SGLFLAGS_TYPE_MASK (0x03)
365 #define MPI2_TSS_SGLFLAGS_MPI_TYPE (0x00)
366 #define MPI2_TSS_SGLFLAGS_IEEE32_TYPE (0x01)
367 #define MPI2_TSS_SGLFLAGS_IEEE64_TYPE (0x02)
372 * NOTE: The SSP status IU is big-endian. When used on a little-endian system,
373 * this structure properly orders the bytes.
375 typedef struct _MPI2_TARGET_SSP_RSP_IU
377 U32 Reserved0[6]; /* reserved for SSP header */ /* 0x00 */
379 /* start of RESPONSE information unit */
380 U32 Reserved1; /* 0x18 */
381 U32 Reserved2; /* 0x1C */
382 U16 Reserved3; /* 0x20 */
383 U8 DataPres; /* lower 2 bits */ /* 0x22 */
384 U8 Status; /* 0x23 */
385 U32 Reserved4; /* 0x24 */
386 U32 SenseDataLength; /* 0x28 */
387 U32 ResponseDataLength; /* 0x2C */
389 /* start of Response or Sense Data (size may vary dynamically) */
390 U8 ResponseSenseData[4]; /* 0x30 */
391 } MPI2_TARGET_SSP_RSP_IU, MPI2_POINTER PTR_MPI2_TARGET_SSP_RSP_IU,
392 Mpi2TargetSspRspIu_t, MPI2_POINTER pMpi2TargetSspRspIu_t;
395 /****************************************************************************
396 * Target Standard Reply - used with Target Assist or Target Status Send
397 ****************************************************************************/
399 typedef struct _MPI2_TARGET_STANDARD_REPLY
401 U16 Reserved; /* 0x00 */
402 U8 MsgLength; /* 0x02 */
403 U8 Function; /* 0x03 */
404 U16 Reserved1; /* 0x04 */
405 U8 Reserved2; /* 0x06 */
406 U8 MsgFlags; /* 0x07 */
409 U16 Reserved3; /* 0x0A */
410 U16 Reserved4; /* 0x0C */
411 U16 IOCStatus; /* 0x0E */
412 U32 IOCLogInfo; /* 0x10 */
413 U16 IoIndex; /* 0x14 */
414 U16 Reserved5; /* 0x16 */
415 U32 TransferCount; /* 0x18 */
416 U32 BidirectionalTransferCount; /* 0x1C */
417 } MPI2_TARGET_STANDARD_REPLY, MPI2_POINTER PTR_MPI2_TARGET_STANDARD_REPLY,
418 Mpi2TargetErrorReply_t, MPI2_POINTER pMpi2TargetErrorReply_t;
421 /****************************************************************************
422 * Target Mode Abort Request
423 ****************************************************************************/
425 typedef struct _MPI2_TARGET_MODE_ABORT_REQUEST
427 U8 AbortType; /* 0x00 */
428 U8 Reserved1; /* 0x01 */
429 U8 ChainOffset; /* 0x02 */
430 U8 Function; /* 0x03 */
431 U16 Reserved2; /* 0x04 */
432 U8 Reserved3; /* 0x06 */
433 U8 MsgFlags; /* 0x07 */
436 U16 Reserved4; /* 0x0A */
437 U16 IoIndexToAbort; /* 0x0C */
438 U16 Reserved6; /* 0x0E */
439 U32 MidToAbort; /* 0x10 */
440 } MPI2_TARGET_MODE_ABORT, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT,
441 Mpi2TargetModeAbort_t, MPI2_POINTER pMpi2TargetModeAbort_t;
443 /* Target Mode Abort AbortType values */
445 #define MPI2_TARGET_MODE_ABORT_ALL_CMD_BUFFERS (0x00)
446 #define MPI2_TARGET_MODE_ABORT_ALL_IO (0x01)
447 #define MPI2_TARGET_MODE_ABORT_EXACT_IO (0x02)
448 #define MPI2_TARGET_MODE_ABORT_EXACT_IO_REQUEST (0x03)
449 #define MPI2_TARGET_MODE_ABORT_IO_REQUEST_AND_IO (0x04)
452 /****************************************************************************
453 * Target Mode Abort Reply
454 ****************************************************************************/
456 typedef struct _MPI2_TARGET_MODE_ABORT_REPLY
458 U16 Reserved; /* 0x00 */
459 U8 MsgLength; /* 0x02 */
460 U8 Function; /* 0x03 */
461 U16 Reserved1; /* 0x04 */
462 U8 Reserved2; /* 0x06 */
463 U8 MsgFlags; /* 0x07 */
466 U16 Reserved3; /* 0x0A */
467 U16 Reserved4; /* 0x0C */
468 U16 IOCStatus; /* 0x0E */
469 U32 IOCLogInfo; /* 0x10 */
470 U32 AbortCount; /* 0x14 */
471 } MPI2_TARGET_MODE_ABORT_REPLY, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT_REPLY,
472 Mpi2TargetModeAbortReply_t, MPI2_POINTER pMpi2TargetModeAbortReply_t;