1 /*******************************************************************************
2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided
5 *that the following conditions are met:
6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
8 *2. Redistributions in binary form must reproduce the above copyright notice,
9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided
10 *with the distribution.
12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
23 *******************************************************************************/
24 /*****************************************************************************
28 * Abstract: This module contains data structure definition used
29 * by the Transport Dependent (TD) Layer IOCTL.
35 ** MODIFICATION HISTORY ******************************************************
37 * NAME DATE DESCRIPTION
38 * ---- ---- -----------
39 * IWN 12/11/02 Initial creation.
42 *****************************************************************************/
52 * PMC-Sierra IOCTL signature
54 #define PMC_SIERRA_SIGNATURE 0x1234
55 #define PMC_SIERRA_IOCTL_SIGNATURE "PMC-STRG"
58 * Major function code of IOCTL functions, common to target and initiator.
60 #define IOCTL_MJ_CARD_PARAMETER 0x01
61 #define IOCTL_MJ_FW_CONTROL 0x02
62 #define IOCTL_MJ_NVMD_GET 0x03
63 #define IOCTL_MJ_NVMD_SET 0x04
64 #define IOCTL_MJ_GET_EVENT_LOG1 0x05
65 #define IOCTL_MJ_GET_EVENT_LOG2 0x06
66 #define IOCTL_MJ_GET_CORE_DUMP 0x07
67 #define IOCTL_MJ_LL_TRACING 0x08
68 #define IOCTL_MJ_FW_PROFILE 0x09
69 #define IOCTL_MJ_MNID 0x0A
70 #define IOCTL_MJ_ENCRYPTION_CTL 0x0B
72 #define IOCTL_MJ_FW_INFO 0x0C
74 #define IOCTL_MJ_LL_API_TEST 0x11
75 #define IOCTL_MJ_CHECK_DPMC_EVENT 0x16
76 #define IOCTL_MJ_GET_FW_REV 0x1A
77 #define IOCTL_MJ_GET_DEVICE_INFO 0x1B
78 #define IOCTL_MJ_GET_IO_ERROR_STATISTIC 0x1C
79 #define IOCTL_MJ_GET_IO_EVENT_STATISTIC 0x1D
80 #define IOCTL_MJ_GET_FORENSIC_DATA 0x1E
81 #define IOCTL_MJ_GET_DEVICE_LIST 0x1F
82 #define IOCTL_MJ_SMP_REQUEST 0x6D
83 #define IOCTL_MJ_GET_DEVICE_LUN 0x7A1
84 #define IOCTL_MJ_PHY_GENERAL_STATUS 0x7A6
85 #define IOCTL_MJ_PHY_DETAILS 0x7A7
86 #define IOCTL_MJ_SEND_BIST 0x20
87 #define IOCTL_MJ_CHECK_FATAL_ERROR 0x70
88 #define IOCTL_MJ_FATAL_ERROR_DUMP_COMPLETE 0x71
89 #define IOCTL_MJ_GPIO 0x41
90 #define IOCTL_MJ_SGPIO 0x42
91 #define IOCTL_MJ_SEND_TMF 0x6E
92 #define IOCTL_MJ_FATAL_ERROR_SOFT_RESET_TRIG 0x72
93 #define IOCTL_MJ_FATAL_ERR_CHK_RET_FALSE 0x76
94 #define IOCTL_MJ_FATAL_ERR_CHK_SEND_FALSE 0x76
95 #define IOCTL_MJ_FATAL_ERR_CHK_SEND_TRUE 0x77
99 * Major function code of IOCTL functions, specific to initiator.
101 #define IOCTL_MJ_INI_ISCSI_DISCOVERY 0x21
102 #define IOCTL_MJ_INI_SESSION_CONTROL 0x22
103 #define IOCTL_MJ_INI_SNIA_IMA 0x23
104 #define IOCTL_MJ_INI_SCSI 0x24
105 #define IOCTL_MJ_INI_WMI 0x25
106 #define IOCTL_MJ_INI_DRIVER_EVENT_LOG 0x26
107 #define IOCTL_MJ_INI_PERSISTENT_BINDING 0x27
108 #define IOCTL_MJ_INI_DRIVER_IDENTIFY 0x28
111 #define IOCTL_MJ_PORT_STOP 0x29
112 #define IOCTL_MJ_PORT_START 0x30
114 /* SPCv controller configuration page commands */
115 #define IOCTL_MJ_MODE_CTL_PAGE 0x40
117 #define IOCTL_MJ_SET_OR_GET_REGISTER 0x41
119 #define IOCTL_MJ_GET_PHY_PROFILE 0x44
120 #define IOCTL_MJ_SET_PHY_PROFILE 0x43
122 #define IOCTL_MJ_GET_DRIVER_VERSION 0x101
124 #define IOCTL_MN_PHY_PROFILE_COUNTERS 0x01
125 #define IOCTL_MN_PHY_PROFILE_COUNTERS_CLR 0x02
126 #define IOCTL_MN_PHY_PROFILE_BW_COUNTERS 0x03
127 #define IOCTL_MN_PHY_PROFILE_ANALOG_SETTINGS 0x04
130 * Minor functions for Card parameter IOCTL functions.
132 #define IOCTL_MN_CARD_GET_VPD_INFO 0x01
133 #define IOCTL_MN_CARD_GET_PORTSTART_INFO 0x02
134 #define IOCTL_MN_CARD_GET_INTERRUPT_CONFIG 0x03
135 #define IOCTL_MN_CARD_GET_PHY_ANALOGSETTING 0x04
136 #define IOCTL_MN_CARD_GET_TIMER_CONFIG 0x05
137 #define IOCTL_MN_CARD_GET_TYPE_FATAL_DUMP 0x06
140 * Minor functions for FW control IOCTL functions.
143 /* Send FW data requests.
145 #define IOCTL_MN_FW_DOWNLOAD_DATA 0x01
147 /* Send the request for burning the new firmware.
149 #define IOCTL_MN_FW_DOWNLOAD_BURN 0x02
151 /* Poll for the flash burn phases. Sequences of poll function calls are
152 * needed following the IOCTL_MN_FW_DOWNLOAD_BURN, IOCTL_MN_FW_BURN_OSPD
153 * and IOCTL_MN_FW_ROLL_BACK_FW functions.
155 #define IOCTL_MN_FW_BURN_POLL 0x03
157 /* Instruct the FW to roll back FW to prior revision.
159 #define IOCTL_MN_FW_ROLL_BACK_FW 0x04
161 /* Instruct the FW to return the current firmware revision number.
163 #define IOCTL_MN_FW_VERSION 0x05
165 /* Retrieve the maximum size of the OS Persistent Data stored on the card.
167 #define IOCTL_MN_FW_GET_OSPD_SIZE 0x06
169 /* Retrieve the OS Persistent Data from the card.
171 #define IOCTL_MN_FW_GET_OSPD 0x07
173 /* Send a new OS Persistent Data to the card and burn in flash.
175 #define IOCTL_MN_FW_BURN_OSPD 0x08
177 /* Retrieve the trace buffer from the card FW. Only available on the debug
180 #define IOCTL_MN_FW_GET_TRACE_BUFFER 0x0f
182 #define IOCTL_MN_NVMD_GET_CONFIG 0x0A
183 #define IOCTL_MN_NVMD_SET_CONFIG 0x0B
185 #define IOCTL_MN_FW_GET_CORE_DUMP_AAP1 0x0C
186 #define IOCTL_MN_FW_GET_CORE_DUMP_IOP 0x0D
187 #define IOCTL_MN_FW_GET_CORE_DUMP_FLASH_AAP1 0x12
188 #define IOCTL_MN_FW_GET_CORE_DUMP_FLASH_IOP 0x13
190 #define IOCTL_MN_LL_RESET_TRACE_INDEX 0x0e
191 #define IOCTL_MN_LL_GET_TRACE_BUFFER_INFO 0x0f
192 #define IOCTL_MN_LL_GET_TRACE_BUFFER 0x10
194 #define IOCTL_MN_ENCRYPTION_GET_INFO 0x13
195 #define IOCTL_MN_ENCRYPTION_SET_MODE 0x14
196 #define IOCTL_MN_ENCRYPTION_KEK_ADD 0x15
197 #define IOCTL_MN_ENCRYPTION_DEK_ADD 0x16
198 #define IOCTL_MN_ENCRYPTION_DEK_INVALID 0x17
199 #define IOCTL_MN_ENCRYPTION_KEK_NVRAM 0x18
200 #define IOCTL_MN_ENCRYPTION_DEK_ASSIGN 0x19
201 #define IOCTL_MN_ENCRYPTION_LUN_QUERY 0x1A
202 #define IOCTL_MN_ENCRYPTION_KEK_LOAD_NVRAM 0x1B
203 #define IOCTL_MN_ENCRYPTION_ERROR_QUERY 0x1C
204 #define IOCTL_MN_ENCRYPTION_DEK_TABLE_INIT 0x1D
205 #define IOCTL_MN_ENCRYPT_LUN_VERIFY 0x1E
206 #define IOCTL_MN_ENCRYPT_OPERATOR_MGMT 0x1F
207 #define IOCTL_MN_ENCRYPT_SET_DEK_CONFIG_PAGE 0x21
208 #define IOCTL_MN_ENCRYPT_SET_CONTROL_PAGE 0x22
209 #define IOCTL_MN_ENCRYPT_SET_OPERATOR_CMD 0x23
210 #define IOCTL_MN_ENCRYPT_TEST_EXECUTE 0x24
211 #define IOCTL_MN_ENCRYPT_SET_HMAC_CONFIG_PAGE 0x25
212 #define IOCTL_MN_ENCRYPT_GET_OPERATOR_CMD 0x26
213 #define IOCTL_MN_ENCRYPT_RESCAN 0x27
214 #ifdef SOFT_RESET_TEST
215 #define IOCTL_MN_SOFT_RESET 0x28
217 /* SPCv configuration pages */
218 #define IOCTL_MN_MODE_SENSE 0x30
219 #define IOCTL_MN_MODE_SELECT 0x31
221 #define IOCTL_MN_TISA_TEST_ENCRYPT_DEK_DUMP 0x51
223 #define IOCTL_MN_FW_GET_EVENT_FLASH_LOG1 0x5A
224 #define IOCTL_MN_FW_GET_EVENT_FLASH_LOG2 0x6A
225 #define IOCTL_MN_GET_EVENT_LOG1 0x5B
226 #define IOCTL_MN_GET_EVENT_LOG2 0x6B
228 #define IOCTL_MN_GPIO_PINSETUP 0x01
229 #define IOCTL_MN_GPIO_EVENTSETUP 0x02
230 #define IOCTL_MN_GPIO_READ 0x03
231 #define IOCTL_MN_GPIO_WRITE 0x04
233 #define IOCTL_MN_TMF_DEVICE_RESET 0x6F
234 #define IOCTL_MN_TMF_LUN_RESET 0x70
235 typedef struct tdFWControl
237 bit32 retcode; /* ret code (status) = (bit32)oscmCtrlEvnt_e */
238 bit32 phase; /* ret code phase = (bit32)agcmCtrlFwPhase_e */
239 bit32 phaseCmplt; /* percent complete for the current update phase */
240 bit32 version; /* Hex encoded firmware version number */
241 bit32 offset; /* Used for downloading firmware */
242 bit32 len; /* len of buffer */
243 bit32 size; /* Used in OS VPD and Trace get size operations. */
244 bit32 reserved; /* padding required for 64 bit alignment */
245 bit8 buffer[1]; /* Start of buffer */
249 typedef struct tdFWControlEx
251 tdFWControl_t *tdFWControl;
252 bit8 *buffer; // keep buffer pointer to be freed when the responce comes
253 bit8 *virtAddr; /* keep virtual address of the data */
254 bit8 *usrAddr; /* keep virtual address of the user data */
255 bit32 len; /* len of buffer */
256 void *payload; /* pointer to IOCTL Payload */
257 bit8 inProgress; /* if 1 - the IOCTL request is in progress */
263 /************************************************************/
264 //This flag and datastructure are specific for fw profiling, Now defined as
266 //#define SPC_ENABLE_PROFILE
268 #ifdef SPC_ENABLE_PROFILE
269 typedef struct tdFWProfile
273 bit32 processor; /* processor name "iop/aap1" */
274 bit32 cmd; /* cmd to fw */
275 bit32 len; /* len of buffer */
278 bit32 reserved; /* padding required for 64 bit alignment */
279 bit8 buffer[1]; /* Start of buffer */
282 /************************************************/
283 /**Definations for FW profile*/
284 #define FW_PROFILE_PROCESSOR_ID_IOP 0x00
285 #define FW_PROFILE_PROCESSOR_ID_AAP1 0x02
286 /* definitions for sub operation */
287 #define START_TIMER_PROFILE 0x01
288 #define START_CODE_PROFILE 0x02
289 #define STOP_TIMER_PROFILE 0x81
290 #define STOP_CODE_PROFILE 0x82
291 /************************************************/
293 typedef struct tdFWProfileEx
295 tdFWProfile_t *tdFWProfile;
296 bit8 *buffer; // keep buffer pointer to be freed when the responce comes
297 bit8 *virtAddr; /* keep virtual address of the data */
298 bit8 *usrAddr; /* keep virtual address of the user data */
299 bit32 len; /* len of buffer */
300 void *payload; /* pointer to IOCTL Payload */
301 bit8 inProgress; /* if 1 - the IOCTL request is in progress */
307 /************************************************************/
308 typedef struct tdVPDControl
310 bit32 retcode; /* ret code (status) */
311 bit32 phase; /* ret code phase */
312 bit32 phaseCmplt; /* percent complete for the current update phase */
313 bit32 version; /* Hex encoded firmware version number */
314 bit32 offset; /* Used for downloading firmware */
315 bit32 len; /* len of buffer */
316 bit32 size; /* Used in OS VPD and Trace get size operations. */
317 bit8 deviceID; /* padding required for 64 bit alignment */
321 bit8 buffer[1]; /* Start of buffer */
324 typedef struct tdDeviceInfoIOCTL_s
326 bit8 deviceType; // TD_SATA_DEVICE or TD_SAS_DEVICE
327 bit8 linkRate; // 0x08: 1.5 Gbit/s; 0x09: 3.0; 0x0A: 6.0 Gbit/s.
330 bit32 sasAddressHi; // SAS address high
331 bit32 sasAddressLo; // SAS address low
332 bit32 up_sasAddressHi; // upstream SAS address high
333 bit32 up_sasAddressLo; // upstream SAS address low
335 bit32 isEncryption; // is encryption enabled
336 bit32 isDIF; // is DIF enabled
337 unsigned long DeviceHandle;
342 }tdDeviceInfoIOCTL_t;
344 /* Payload of IOCTL dump device list at OS layer */
345 typedef struct tdDeviceInfoPayload_s
350 bit32 Reserved; /* Had better aligned to 64-bit. */
353 tdDeviceInfoIOCTL_t devInfo;
354 }tdDeviceInfoPayload_t;
356 typedef struct tdDeviceListPayload_s
358 bit32 realDeviceCount;// the real device out in the array, returned by driver
359 bit32 deviceLength; // the length of tdDeviceInfoIOCTL_t array
360 bit8 pDeviceInfo[1]; // point to tdDeviceInfoIOCTL_t array
361 }tdDeviceListPayload_t;
363 // Payload of IO error and event statistic IOCTL.
364 typedef struct tdIoErrorEventStatisticIOCTL_s
366 bit32 agOSSA_IO_COMPLETED_ERROR_SCSI_STATUS;
367 bit32 agOSSA_IO_ABORTED;
368 bit32 agOSSA_IO_OVERFLOW;
369 bit32 agOSSA_IO_UNDERFLOW;
370 bit32 agOSSA_IO_FAILED;
371 bit32 agOSSA_IO_ABORT_RESET;
372 bit32 agOSSA_IO_NOT_VALID;
373 bit32 agOSSA_IO_NO_DEVICE;
374 bit32 agOSSA_IO_ILLEGAL_PARAMETER;
375 bit32 agOSSA_IO_LINK_FAILURE;
376 bit32 agOSSA_IO_PROG_ERROR;
377 bit32 agOSSA_IO_DIF_IN_ERROR;
378 bit32 agOSSA_IO_DIF_OUT_ERROR;
379 bit32 agOSSA_IO_ERROR_HW_TIMEOUT;
380 bit32 agOSSA_IO_XFER_ERROR_BREAK;
381 bit32 agOSSA_IO_XFER_ERROR_PHY_NOT_READY;
382 bit32 agOSSA_IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED;
383 bit32 agOSSA_IO_OPEN_CNX_ERROR_ZONE_VIOLATION;
384 bit32 agOSSA_IO_OPEN_CNX_ERROR_BREAK;
385 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS;
386 bit32 agOSSA_IO_OPEN_CNX_ERROR_BAD_DESTINATION;
387 bit32 agOSSA_IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED;
388 bit32 agOSSA_IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY;
389 bit32 agOSSA_IO_OPEN_CNX_ERROR_WRONG_DESTINATION;
390 bit32 agOSSA_IO_OPEN_CNX_ERROR_UNKNOWN_ERROR;
391 bit32 agOSSA_IO_XFER_ERROR_NAK_RECEIVED;
392 bit32 agOSSA_IO_XFER_ERROR_ACK_NAK_TIMEOUT;
393 bit32 agOSSA_IO_XFER_ERROR_PEER_ABORTED;
394 bit32 agOSSA_IO_XFER_ERROR_RX_FRAME;
395 bit32 agOSSA_IO_XFER_ERROR_DMA;
396 bit32 agOSSA_IO_XFER_ERROR_CREDIT_TIMEOUT;
397 bit32 agOSSA_IO_XFER_ERROR_SATA_LINK_TIMEOUT;
398 bit32 agOSSA_IO_XFER_ERROR_SATA;
399 bit32 agOSSA_IO_XFER_ERROR_ABORTED_DUE_TO_SRST;
400 bit32 agOSSA_IO_XFER_ERROR_REJECTED_NCQ_MODE;
401 bit32 agOSSA_IO_XFER_ERROR_ABORTED_NCQ_MODE;
402 bit32 agOSSA_IO_XFER_OPEN_RETRY_TIMEOUT;
403 bit32 agOSSA_IO_XFER_SMP_RESP_CONNECTION_ERROR;
404 bit32 agOSSA_IO_XFER_ERROR_UNEXPECTED_PHASE;
405 bit32 agOSSA_IO_XFER_ERROR_XFER_RDY_OVERRUN;
406 bit32 agOSSA_IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED;
407 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT;
408 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_BREAK_BEFORE_ACK_NAK;
409 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_PHY_DOWN_BEFORE_ACK_NAK;
410 bit32 agOSSA_IO_XFER_ERROR_OFFSET_MISMATCH;
411 bit32 agOSSA_IO_XFER_ERROR_XFER_ZERO_DATA_LEN;
412 bit32 agOSSA_IO_XFER_CMD_FRAME_ISSUED;
413 bit32 agOSSA_IO_ERROR_INTERNAL_SMP_RESOURCE;
414 bit32 agOSSA_IO_PORT_IN_RESET;
415 bit32 agOSSA_IO_DS_NON_OPERATIONAL;
416 bit32 agOSSA_IO_DS_IN_RECOVERY;
417 bit32 agOSSA_IO_TM_TAG_NOT_FOUND;
418 bit32 agOSSA_IO_XFER_PIO_SETUP_ERROR;
419 bit32 agOSSA_IO_SSP_EXT_IU_ZERO_LEN_ERROR;
420 bit32 agOSSA_IO_DS_IN_ERROR;
421 bit32 agOSSA_IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY;
422 bit32 agOSSA_IO_ABORT_IN_PROGRESS;
423 bit32 agOSSA_IO_ABORT_DELAYED;
424 bit32 agOSSA_IO_INVALID_LENGTH;
425 bit32 agOSSA_IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY_ALT;
426 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED;
427 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO;
428 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST;
429 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE;
430 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED;
431 bit32 agOSSA_IO_DS_INVALID;
432 bit32 agOSSA_IO_XFER_READ_COMPL_ERR;
433 bit32 agOSSA_IO_XFER_ERR_LAST_PIO_DATAIN_CRC_ERR;
434 bit32 agOSSA_IO_XFR_ERROR_INTERNAL_CRC_ERROR;
435 bit32 agOSSA_MPI_IO_RQE_BUSY_FULL;
436 bit32 agOSSA_MPI_ERR_IO_RESOURCE_UNAVAILABLE;
437 bit32 agOSSA_MPI_ERR_ATAPI_DEVICE_BUSY;
438 bit32 agOSSA_IO_XFR_ERROR_DEK_KEY_CACHE_MISS;
439 bit32 agOSSA_IO_XFR_ERROR_DEK_KEY_TAG_MISMATCH;
440 bit32 agOSSA_IO_XFR_ERROR_CIPHER_MODE_INVALID;
441 bit32 agOSSA_IO_XFR_ERROR_DEK_IV_MISMATCH;
442 bit32 agOSSA_IO_XFR_ERROR_DEK_RAM_INTERFACE_ERROR;
443 bit32 agOSSA_IO_XFR_ERROR_INTERNAL_RAM;
444 bit32 agOSSA_IO_XFR_ERROR_DIF_MISMATCH;
445 bit32 agOSSA_IO_XFR_ERROR_DIF_APPLICATION_TAG_MISMATCH;
446 bit32 agOSSA_IO_XFR_ERROR_DIF_REFERENCE_TAG_MISMATCH;
447 bit32 agOSSA_IO_XFR_ERROR_DIF_CRC_MISMATCH;
448 bit32 agOSSA_IO_XFR_ERROR_INVALID_SSP_RSP_FRAME;
449 bit32 agOSSA_IO_XFER_ERR_EOB_DATA_OVERRUN;
450 bit32 agOSSA_IO_XFR_ERROR_DEK_INDEX_OUT_OF_BOUNDS;
451 bit32 agOSSA_IO_OPEN_CNX_ERROR_OPEN_PREEMPTED;
452 bit32 agOSSA_IO_XFR_ERROR_DEK_ILLEGAL_TABLE;
453 bit32 agOSSA_IO_XFER_ERROR_DIF_INTERNAL_ERROR;
454 bit32 agOSSA_MPI_ERR_OFFLOAD_DIF_OR_ENC_NOT_ENABLED;
455 bit32 agOSSA_IO_UNKNOWN_ERROR;
457 } tdIoErrorEventStatisticIOCTL_t;
468 typedef struct tdSenseKeyCount_s{
470 bit32 MediumNotReady;
473 bit32 IllegalRequest;
480 Code Status Command completed Service response
481 00h GOOD Yes COMMAND COMPLETE
482 02h CHECK CONDITION Yes COMMAND COMPLETE
483 04h CONDITION MET Yes COMMAND COMPLETE
484 08h BUSY Yes COMMAND COMPLETE
487 18h RESERVATION CONFLICT Yes COMMAND COMPLETE
489 28h TASK SET FULL Yes COMMAND COMPLETE
490 30h ACA ACTIVE Yes COMMAND COMPLETE
491 40h TASK ABORTED Yes COMMAND COMPLETE
493 typedef struct tdSCSIStatusCount_s{
495 bit32 CheckCondition;
502 bit32 ObsoleteStatus;
503 }tdSCSIStatusCount_t;
505 /* Payload of Io Error Statistic IOCTL. */
506 typedef struct tdIoErrorStatisticPayload_s
509 bit32 Reserved; /* Had better aligned to 64-bit. */
512 tdIoErrorEventStatisticIOCTL_t IoError;
513 tdSCSIStatusCount_t ScsiStatusCounter;
514 tdSenseKeyCount_t SenseKeyCounter;
515 } tdIoErrorStatisticPayload_t;
517 /* Payload of Io Error Statistic IOCTL. */
518 typedef struct tdIoEventStatisticPayload_s
521 bit32 Reserved; /* Had better aligned to 64-bit. */
524 tdIoErrorEventStatisticIOCTL_t IoEvent;
525 } tdIoEventStatisticPayload_t;
527 /* Payload of Register IOCTL. */
528 typedef struct tdRegisterPayload_s
532 bit32 RegAddr; /* Register address */
533 bit32 RegValue; /* Register value */
535 } tdRegisterPayload_t;
538 #define FORENSIC_DATA_TYPE_GSM_SPACE 1
539 #define FORENSIC_DATA_TYPE_QUEUE 2
540 #define FORENSIC_DATA_TYPE_FATAL 3
541 #define FORENSIC_DATA_TYPE_NON_FATAL 4
542 #define FORENSIC_DATA_TYPE_IB_QUEUE 5
543 #define FORENSIC_DATA_TYPE_OB_QUEUE 6
544 #define FORENSIC_DATA_TYPE_CHECK_FATAL 0x70
546 #define FORENSIC_Q_TYPE_INBOUND 1
547 #define FORENSIC_Q_TYPE_OUTBOUND 2
549 /* get forensic data IOCTL payload */
550 typedef struct tdForensicDataPayload_s
579 }tdForensicDataPayload_t;
581 typedef struct tdBistPayload_s
588 typedef struct _TSTMTID_CARD_LOCATION_INFO
601 } TSTMTID_CARD_LOCATION_INFO;
603 typedef struct _TSTMTID_TRACE_BUFFER_INFO
610 bit32 CurrentTraceIndexWrapCount;
614 } TSTMTID_TRACE_BUFFER_INFO;
616 #define FetchBufferSIZE 32
617 #define LowFence32Bits 0xFCFD1234
618 #define HighFence32Bits 0x5678ABDC
620 typedef struct _TSTMTID_TRACE_BUFFER_FETCH
623 bit32 BufferOffsetBegin;
625 bit8 Data[FetchBufferSIZE];
629 } TSTMTID_TRACE_BUFFER_FETCH;
632 typedef struct _TSTMTID_TRACE_BUFFER_RESET
639 } TSTMTID_TRACE_BUFFER_RESET;
643 typedef struct tdPhyCount_s{
648 bit32 runningDisparityError;
651 bit32 phyResetProblem;
652 bit32 inboundCRCError;
656 typedef struct _PHY_GENERAL_STATE
662 typedef struct agsaPhyGeneralState_s
664 GetPhyGenState_t PhyGenData[16];
667 } agsaPhyGeneralState_t;
669 typedef struct _PHY_DETAILS_
671 bit8 sasAddressLo[4];
672 bit8 sasAddressHi[4];
673 bit8 attached_sasAddressLo[4];
674 bit8 attached_sasAddressHi[4];
676 bit8 attached_dev_type ;
679 enum SAS_SATA_DEVICE_TYPE {
682 SAS_PHY_EXPANDER_DEVICE,
683 SAS_PHY_SATA_DEVICE = 0x11,
685 #define PHY_SETTINGS_LEN 1024
687 #endif /* TD_IOCTL_H */