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11 * this list of conditions and the following disclaimer in the documentation
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31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
36 #include "efx_types.h"
44 __in efsys_mem_t *esmp,
49 uint32_t stop = start + n;
50 efsys_dma_addr_t addr;
55 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
56 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
58 #if EFSYS_OPT_HUNTINGTON
59 if (enp->en_family == EFX_FAMILY_HUNTINGTON) {
61 * FIXME: the efx_sram_buf_tbl_*() functionality needs to be
62 * pulled inside the Falcon/Siena queue create/destroy code,
63 * and then the original functions can be removed (see bug30834
64 * comment #1). But, for now, we just ensure that they are
65 * no-ops for Huntington, to allow bringing up existing drivers
66 * without modification.
71 #endif /* EFSYS_OPT_HUNTINGTON */
73 if (stop >= EFX_BUF_TBL_SIZE) {
78 /* Add the entries into the buffer table */
79 addr = EFSYS_MEM_ADDR(esmp);
80 for (id = start; id != stop; id++) {
81 EFX_POPULATE_QWORD_5(qword,
82 FRF_AZ_IP_DAT_BUF_SIZE, 0, FRF_AZ_BUF_ADR_REGION, 0,
83 FRF_AZ_BUF_ADR_FBUF_DW0,
84 (uint32_t)((addr >> 12) & 0xffffffff),
85 FRF_AZ_BUF_ADR_FBUF_DW1,
86 (uint32_t)((addr >> 12) >> 32),
87 FRF_AZ_BUF_OWNER_ID_FBUF, 0);
89 EFX_BAR_TBL_WRITEQ(enp, FR_AZ_BUF_FULL_TBL,
95 EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
97 /* Flush the write buffer */
98 EFX_POPULATE_OWORD_2(oword, FRF_AZ_BUF_UPD_CMD, 1,
99 FRF_AZ_BUF_CLR_CMD, 0);
100 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
102 /* Poll for the last entry being written to the buffer table */
103 EFSYS_ASSERT3U(id, ==, stop);
104 addr -= EFX_BUF_SIZE;
108 EFSYS_PROBE1(wait, unsigned int, count);
113 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
116 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) ==
117 (uint32_t)((addr >> 12) & 0xffffffff) &&
118 EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) ==
119 (uint32_t)((addr >> 12) >> 32))
122 } while (++count < 100);
128 /* Verify the rest of the entries in the buffer table */
129 while (--id != start) {
130 addr -= EFX_BUF_SIZE;
132 /* Read the buffer table entry */
133 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
136 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) !=
137 (uint32_t)((addr >> 12) & 0xffffffff) ||
138 EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) !=
139 (uint32_t)((addr >> 12) >> 32)) {
155 EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
156 FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, id - 1,
157 FRF_AZ_BUF_CLR_START_ID, start);
158 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
161 EFSYS_PROBE1(fail1, int, rc);
167 efx_sram_buf_tbl_clear(
174 uint32_t stop = start + n;
176 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
177 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
179 #if EFSYS_OPT_HUNTINGTON
180 if (enp->en_family == EFX_FAMILY_HUNTINGTON) {
182 * FIXME: the efx_sram_buf_tbl_*() functionality needs to be
183 * pulled inside the Falcon/Siena queue create/destroy code,
184 * and then the original functions can be removed (see bug30834
185 * comment #1). But, for now, we just ensure that they are
186 * no-ops for Huntington, to allow bringing up existing drivers
187 * without modification.
192 #endif /* EFSYS_OPT_HUNTINGTON */
194 EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE);
196 EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
198 EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
199 FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, stop - 1,
200 FRF_AZ_BUF_CLR_START_ID, start);
201 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
208 efx_sram_byte_increment_set(
210 __in boolean_t negate,
211 __out efx_qword_t *eqp)
213 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
216 _NOTE(ARGUNUSED(negate))
218 for (index = 0; index < sizeof (efx_qword_t); index++)
219 eqp->eq_u8[index] = offset + index;
223 efx_sram_all_the_same_set(
225 __in boolean_t negate,
226 __out efx_qword_t *eqp)
228 _NOTE(ARGUNUSED(row))
233 EFX_ZERO_QWORD(*eqp);
237 efx_sram_bit_alternate_set(
239 __in boolean_t negate,
240 __out efx_qword_t *eqp)
242 _NOTE(ARGUNUSED(row))
244 EFX_POPULATE_QWORD_2(*eqp,
245 EFX_DWORD_0, (negate) ? 0x55555555 : 0xaaaaaaaa,
246 EFX_DWORD_1, (negate) ? 0x55555555 : 0xaaaaaaaa);
250 efx_sram_byte_alternate_set(
252 __in boolean_t negate,
253 __out efx_qword_t *eqp)
255 _NOTE(ARGUNUSED(row))
257 EFX_POPULATE_QWORD_2(*eqp,
258 EFX_DWORD_0, (negate) ? 0x00ff00ff : 0xff00ff00,
259 EFX_DWORD_1, (negate) ? 0x00ff00ff : 0xff00ff00);
263 efx_sram_byte_changing_set(
265 __in boolean_t negate,
266 __out efx_qword_t *eqp)
268 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
271 for (index = 0; index < sizeof (efx_qword_t); index++) {
274 if (offset / 256 == 0)
275 byte = (uint8_t)((offset % 257) % 256);
277 byte = (uint8_t)(~((offset - 8) % 257) % 256);
279 eqp->eq_u8[index] = (negate) ? ~byte : byte;
284 efx_sram_bit_sweep_set(
286 __in boolean_t negate,
287 __out efx_qword_t *eqp)
289 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
293 EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
295 EFX_ZERO_QWORD(*eqp);
296 EFX_SET_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
300 efx_sram_pattern_fn_t __efx_sram_pattern_fns[] = {
301 efx_sram_byte_increment_set,
302 efx_sram_all_the_same_set,
303 efx_sram_bit_alternate_set,
304 efx_sram_byte_alternate_set,
305 efx_sram_byte_changing_set,
306 efx_sram_bit_sweep_set
312 __in efx_pattern_type_t type)
314 efx_nic_ops_t *enop = enp->en_enop;
315 efx_sram_pattern_fn_t func;
317 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
319 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
321 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
322 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
323 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV));
325 /* Select pattern generator */
326 EFSYS_ASSERT3U(type, <, EFX_PATTERN_NTYPES);
327 func = __efx_sram_pattern_fns[type];
329 return (enop->eno_sram_test(enp, func));
332 #endif /* EFSYS_OPT_DIAG */