sys/gnu/dts/arm/am437x-idk-evm.dts

   1 /*
   2  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include "am4372.dtsi"
  12 #include <dt-bindings/pinctrl/am43xx.h>
  13 #include <dt-bindings/pwm/pwm.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/input/input.h>
  16
  17 / {
  18         model = "TI AM437x Industrial Development Kit";
  19         compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
  20
  21         v24_0d: fixed-regulator-v24_0d {
  22                 compatible = "regulator-fixed";
  23                 regulator-name = "V24_0D";
  24                 regulator-min-microvolt = <24000000>;
  25                 regulator-max-microvolt = <24000000>;
  26                 regulator-always-on;
  27                 regulator-boot-on;
  28         };
  29
  30         v3_3d: fixed-regulator-v3_3d {
  31                 compatible = "regulator-fixed";
  32                 regulator-name = "V3_3D";
  33                 regulator-min-microvolt = <3300000>;
  34                 regulator-max-microvolt = <3300000>;
  35                 regulator-always-on;
  36                 regulator-boot-on;
  37                 vin-supply = <&v24_0d>;
  38         };
  39
  40         vdd_corereg: fixed-regulator-vdd_corereg {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "VDD_COREREG";
  43                 regulator-min-microvolt = <1100000>;
  44                 regulator-max-microvolt = <1100000>;
  45                 regulator-always-on;
  46                 regulator-boot-on;
  47                 vin-supply = <&v24_0d>;
  48         };
  49
  50         vdd_core: fixed-regulator-vdd_core {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "VDD_CORE";
  53                 regulator-min-microvolt = <1100000>;
  54                 regulator-max-microvolt = <1100000>;
  55                 regulator-always-on;
  56                 regulator-boot-on;
  57                 vin-supply = <&vdd_corereg>;
  58         };
  59
  60         v1_8dreg: fixed-regulator-v1_8dreg{
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "V1_8DREG";
  63                 regulator-min-microvolt = <1800000>;
  64                 regulator-max-microvolt = <1800000>;
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 vin-supply = <&v24_0d>;
  68         };
  69
  70         v1_8d: fixed-regulator-v1_8d{
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "V1_8D";
  73                 regulator-min-microvolt = <1800000>;
  74                 regulator-max-microvolt = <1800000>;
  75                 regulator-always-on;
  76                 regulator-boot-on;
  77                 vin-supply = <&v1_8dreg>;
  78         };
  79
  80         v1_5dreg: fixed-regulator-v1_5dreg{
  81                 compatible = "regulator-fixed";
  82                 regulator-name = "V1_5DREG";
  83                 regulator-min-microvolt = <1500000>;
  84                 regulator-max-microvolt = <1500000>;
  85                 regulator-always-on;
  86                 regulator-boot-on;
  87                 vin-supply = <&v24_0d>;
  88         };
  89
  90         v1_5d: fixed-regulator-v1_5d{
  91                 compatible = "regulator-fixed";
  92                 regulator-name = "V1_5D";
  93                 regulator-min-microvolt = <1500000>;
  94                 regulator-max-microvolt = <1500000>;
  95                 regulator-always-on;
  96                 regulator-boot-on;
  97                 vin-supply = <&v1_5dreg>;
  98         };
  99
 100         gpio_keys: gpio_keys {
 101                 compatible = "gpio-keys";
 102                 pinctrl-names = "default";
 103                 pinctrl-0 = <&gpio_keys_pins_default>;
 104                 #address-cells = <1>;
 105                 #size-cells = <0>;
 106
 107                 switch@0 {
 108                         label = "power-button";
 109                         linux,code = <KEY_POWER>;
 110                         gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
 111                 };
 112         };
 113 };
 114
 115 &am43xx_pinmux {
 116         gpio_keys_pins_default: gpio_keys_pins_default {
 117                 pinctrl-single,pins = <
 118                         0x1b8 (PIN_INPUT | MUX_MODE7)   /* cam0_field.gpio4_2 */
 119                 >;
 120         };
 121
 122         i2c0_pins_default: i2c0_pins_default {
 123                 pinctrl-single,pins = <
 124                         0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
 125                         0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
 126                 >;
 127         };
 128
 129         i2c0_pins_sleep: i2c0_pins_sleep {
 130                 pinctrl-single,pins = <
 131                         0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 132                         0x18c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 133                 >;
 134         };
 135
 136         i2c1_pins_default: i2c1_pins_default {
 137                 pinctrl-single,pins = <
 138                         0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
 139                         0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
 140                 >;
 141         };
 142
 143         i2c1_pins_sleep: i2c1_pins_sleep {
 144                 pinctrl-single,pins = <
 145                         0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
 146                         0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
 147                 >;
 148         };
 149
 150         mmc1_pins_default: pinmux_mmc1_pins_default {
 151                 pinctrl-single,pins = <
 152                         0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
 153                         0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
 154                         0x1f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
 155                         0x1f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
 156                         0x1f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
 157                         0x1fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
 158                         0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 159                 >;
 160         };
 161
 162         mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
 163                 pinctrl-single,pins = <
 164                         0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 165                         0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 166                         0x1f0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 167                         0x1f4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 168                         0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 169                         0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7)
 170                         0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 171                 >;
 172         };
 173
 174         ecap0_pins_default: backlight_pins_default {
 175                 pinctrl-single,pins = <
 176                         0x164 (PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
 177                 >;
 178         };
 179
 180         cpsw_default: cpsw_default {
 181                 pinctrl-single,pins = <
 182                         0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
 183                         0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
 184                         0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
 185                         0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
 186                         0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
 187                         0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
 188                         0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rmii1_rclk */
 189                         0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rctl */
 190                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd0 */
 191                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd1 */
 192                         0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd2 */
 193                         0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd3 */
 194                 >;
 195         };
 196
 197         cpsw_sleep: cpsw_sleep {
 198                 pinctrl-single,pins = <
 199                         0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 200                         0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 201                         0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 202                         0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 203                         0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 204                         0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 205                         0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 206                         0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 207                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 208                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 209                         0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 210                         0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 211                 >;
 212         };
 213
 214         davinci_mdio_default: davinci_mdio_default {
 215                 pinctrl-single,pins = <
 216                         /* MDIO */
 217                         0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
 218                         0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
 219                 >;
 220         };
 221
 222         davinci_mdio_sleep: davinci_mdio_sleep {
 223                 pinctrl-single,pins = <
 224                         /* MDIO reset value */
 225                         0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 226                         0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 227                 >;
 228         };
 229
 230         qspi_pins_default: qspi_pins_default {
 231                 pinctrl-single,pins = <
 232                         0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3)    /* gpmc_csn0.qspi_csn */
 233                         0x88 (PIN_OUTPUT | MUX_MODE2)           /* gpmc_csn3.qspi_clk */
 234                         0x90 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_advn_ale.qspi_d0 */
 235                         0x94 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_oen_ren.qspi_d1 */
 236                         0x98 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_wen.qspi_d2 */
 237                         0x9c (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_be0n_cle.qspi_d3 */
 238                 >;
 239         };
 240
 241         qspi_pins_sleep: qspi_pins_sleep{
 242                 pinctrl-single,pins = <
 243                         0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 244                         0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 245                         0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 246                         0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 247                         0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 248                         0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 249                 >;
 250         };
 251 };
 252
 253 &i2c0 {
 254         status = "okay";
 255         pinctrl-names = "default", "sleep";
 256         pinctrl-0 = <&i2c0_pins_default>;
 257         pinctrl-1 = <&i2c0_pins_default>;
 258         clock-frequency = <400000>;
 259
 260         at24@50 {
 261                 compatible = "at24,24c256";
 262                 pagesize = <64>;
 263                 reg = <0x50>;
 264         };
 265 };
 266
 267 &i2c1 {
 268         status = "okay";
 269         pinctrl-names = "default", "sleep";
 270         pinctrl-0 = <&i2c1_pins_default>;
 271         pinctrl-1 = <&i2c1_pins_default>;
 272         clock-frequency = <400000>;
 273
 274         tps: tps62362@60 {
 275                 compatible = "ti,tps62362";
 276                 regulator-name = "VDD_MPU";
 277                 regulator-min-microvolt = <950000>;
 278                 regulator-max-microvolt = <1330000>;
 279                 regulator-boot-on;
 280                 regulator-always-on;
 281                 ti,vsel0-state-high;
 282                 ti,vsel1-state-high;
 283                 vin-supply = <&v3_3d>;
 284         };
 285 };
 286
 287 &epwmss0 {
 288         status = "okay";
 289 };
 290
 291 &ecap0 {
 292         status = "okay";
 293         pinctrl-names = "default";
 294         pinctrl-0 = <&ecap0_pins_default>;
 295 };
 296
 297 &gpio0 {
 298         status = "okay";
 299 };
 300
 301 &gpio1 {
 302         status = "okay";
 303 };
 304
 305 &gpio4 {
 306         status = "okay";
 307 };
 308
 309 &gpio5 {
 310         status = "okay";
 311 };
 312
 313 &mmc1 {
 314         status = "okay";
 315         pinctrl-names = "default", "sleep";
 316         pinctrl-0 = <&mmc1_pins_default>;
 317         pinctrl-1 = <&mmc1_pins_sleep>;
 318         vmmc-supply = <&v3_3d>;
 319         bus-width = <4>;
 320         cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
 321 };
 322
 323 &qspi {
 324         status = "okay";
 325         pinctrl-names = "default", "sleep";
 326         pinctrl-0 = <&qspi_pins_default>;
 327         pinctrl-1 = <&qspi_pins_sleep>;
 328
 329         spi-max-frequency = <48000000>;
 330         m25p80@0 {
 331                 compatible = "mx66l51235l";
 332                 spi-max-frequency = <48000000>;
 333                 reg = <0>;
 334                 spi-cpol;
 335                 spi-cpha;
 336                 spi-tx-bus-width = <1>;
 337                 spi-rx-bus-width = <4>;
 338                 #address-cells = <1>;
 339                 #size-cells = <1>;
 340
 341                 /*
 342                  * MTD partition table.  The ROM checks the first 512KiB for a
 343                  * valid file to boot(XIP).
 344                  */
 345                 partition@0 {
 346                         label = "QSPI.U_BOOT";
 347                         reg = <0x00000000 0x000080000>;
 348                 };
 349                 partition@1 {
 350                         label = "QSPI.U_BOOT.backup";
 351                         reg = <0x00080000 0x00080000>;
 352                 };
 353                 partition@2 {
 354                         label = "QSPI.U-BOOT-SPL_OS";
 355                         reg = <0x00100000 0x00010000>;
 356                 };
 357                 partition@3 {
 358                         label = "QSPI.U_BOOT_ENV";
 359                         reg = <0x00110000 0x00010000>;
 360                 };
 361                 partition@4 {
 362                         label = "QSPI.U-BOOT-ENV.backup";
 363                         reg = <0x00120000 0x00010000>;
 364                 };
 365                 partition@5 {
 366                         label = "QSPI.KERNEL";
 367                         reg = <0x00130000 0x0800000>;
 368                 };
 369                 partition@6 {
 370                         label = "QSPI.FILESYSTEM";
 371                         reg = <0x00930000 0x36D0000>;
 372                 };
 373         };
 374 };
 375
 376 &mac {
 377         pinctrl-names = "default", "sleep";
 378         pinctrl-0 = <&cpsw_default>;
 379         pinctrl-1 = <&cpsw_sleep>;
 380         status = "okay";
 381 };
 382
 383 &davinci_mdio {
 384         pinctrl-names = "default", "sleep";
 385         pinctrl-0 = <&davinci_mdio_default>;
 386         pinctrl-1 = <&davinci_mdio_sleep>;
 387         status = "okay";
 388 };
 389
 390 &cpsw_emac0 {
 391         phy_id = <&davinci_mdio>, <0>;
 392         phy-mode = "rgmii";
 393 };
 394
 395 &rtc {
 396         status = "okay";
 397 };
 398
 399 &wdt {
 400         status = "okay";
 401 };
 402
 403 &cpu {
 404         cpu0-supply = <&tps>;
 405 };