sys/gnu/dts/arm/sama5d4.dtsi

   1 /*
   2  * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
   3  *
   4  *  Copyright (C) 2014 Atmel,
   5  *                2014 Nicolas Ferre <nicolas.ferre@atmel.com>
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License as
  14  *     published by the Free Software Foundation; either version 2 of the
  15  *     License, or (at your option) any later version.
  16  *
  17  *     This file is distributed in the hope that it will be useful,
  18  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *     GNU General Public License for more details.
  21  *
  22  * Or, alternatively,
  23  *
  24  *  b) Permission is hereby granted, free of charge, to any person
  25  *     obtaining a copy of this software and associated documentation
  26  *     files (the "Software"), to deal in the Software without
  27  *     restriction, including without limitation the rights to use,
  28  *     copy, modify, merge, publish, distribute, sublicense, and/or
  29  *     sell copies of the Software, and to permit persons to whom the
  30  *     Software is furnished to do so, subject to the following
  31  *     conditions:
  32  *
  33  *     The above copyright notice and this permission notice shall be
  34  *     included in all copies or substantial portions of the Software.
  35  *
  36  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  37  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  38  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  39  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  40  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  41  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  42  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  43  *     OTHER DEALINGS IN THE SOFTWARE.
  44  */
  45
  46 #include "skeleton.dtsi"
  47 #include <dt-bindings/clock/at91.h>
  48 #include <dt-bindings/dma/at91.h>
  49 #include <dt-bindings/pinctrl/at91.h>
  50 #include <dt-bindings/interrupt-controller/irq.h>
  51 #include <dt-bindings/gpio/gpio.h>
  52
  53 / {
  54         model = "Atmel SAMA5D4 family SoC";
  55         compatible = "atmel,sama5d4";
  56         interrupt-parent = <&aic>;
  57
  58         aliases {
  59                 serial0 = &usart3;
  60                 serial1 = &usart4;
  61                 serial2 = &usart2;
  62                 gpio0 = &pioA;
  63                 gpio1 = &pioB;
  64                 gpio2 = &pioC;
  65                 gpio3 = &pioD;
  66                 gpio4 = &pioE;
  67                 tcb0 = &tcb0;
  68                 tcb1 = &tcb1;
  69                 i2c2 = &i2c2;
  70         };
  71         cpus {
  72                 #address-cells = <1>;
  73                 #size-cells = <0>;
  74
  75                 cpu@0 {
  76                         device_type = "cpu";
  77                         compatible = "arm,cortex-a5";
  78                         reg = <0>;
  79                         next-level-cache = <&L2>;
  80                 };
  81         };
  82
  83         memory {
  84                 reg = <0x20000000 0x20000000>;
  85         };
  86
  87         clocks {
  88                 slow_xtal: slow_xtal {
  89                         compatible = "fixed-clock";
  90                         #clock-cells = <0>;
  91                         clock-frequency = <0>;
  92                 };
  93
  94                 main_xtal: main_xtal {
  95                         compatible = "fixed-clock";
  96                         #clock-cells = <0>;
  97                         clock-frequency = <0>;
  98                 };
  99
 100                 adc_op_clk: adc_op_clk{
 101                         compatible = "fixed-clock";
 102                         #clock-cells = <0>;
 103                         clock-frequency = <1000000>;
 104                 };
 105         };
 106
 107         ns_sram: sram@00210000 {
 108                 compatible = "mmio-sram";
 109                 reg = <0x00210000 0x10000>;
 110         };
 111
 112         ahb {
 113                 compatible = "simple-bus";
 114                 #address-cells = <1>;
 115                 #size-cells = <1>;
 116                 ranges;
 117
 118                 usb0: gadget@00400000 {
 119                         #address-cells = <1>;
 120                         #size-cells = <0>;
 121                         compatible = "atmel,at91sam9rl-udc";
 122                         reg = <0x00400000 0x100000
 123                                0xfc02c000 0x4000>;
 124                         interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
 125                         clocks = <&udphs_clk>, <&utmi>;
 126                         clock-names = "pclk", "hclk";
 127                         status = "disabled";
 128
 129                         ep0 {
 130                                 reg = <0>;
 131                                 atmel,fifo-size = <64>;
 132                                 atmel,nb-banks = <1>;
 133                         };
 134
 135                         ep1 {
 136                                 reg = <1>;
 137                                 atmel,fifo-size = <1024>;
 138                                 atmel,nb-banks = <3>;
 139                                 atmel,can-dma;
 140                                 atmel,can-isoc;
 141                         };
 142
 143                         ep2 {
 144                                 reg = <2>;
 145                                 atmel,fifo-size = <1024>;
 146                                 atmel,nb-banks = <3>;
 147                                 atmel,can-dma;
 148                                 atmel,can-isoc;
 149                         };
 150
 151                         ep3 {
 152                                 reg = <3>;
 153                                 atmel,fifo-size = <1024>;
 154                                 atmel,nb-banks = <2>;
 155                                 atmel,can-dma;
 156                                 atmel,can-isoc;
 157                         };
 158
 159                         ep4 {
 160                                 reg = <4>;
 161                                 atmel,fifo-size = <1024>;
 162                                 atmel,nb-banks = <2>;
 163                                 atmel,can-dma;
 164                                 atmel,can-isoc;
 165                         };
 166
 167                         ep5 {
 168                                 reg = <5>;
 169                                 atmel,fifo-size = <1024>;
 170                                 atmel,nb-banks = <2>;
 171                                 atmel,can-dma;
 172                                 atmel,can-isoc;
 173                         };
 174
 175                         ep6 {
 176                                 reg = <6>;
 177                                 atmel,fifo-size = <1024>;
 178                                 atmel,nb-banks = <2>;
 179                                 atmel,can-dma;
 180                                 atmel,can-isoc;
 181                         };
 182
 183                         ep7 {
 184                                 reg = <7>;
 185                                 atmel,fifo-size = <1024>;
 186                                 atmel,nb-banks = <2>;
 187                                 atmel,can-dma;
 188                                 atmel,can-isoc;
 189                         };
 190
 191                         ep8 {
 192                                 reg = <8>;
 193                                 atmel,fifo-size = <1024>;
 194                                 atmel,nb-banks = <2>;
 195                                 atmel,can-isoc;
 196                         };
 197
 198                         ep9 {
 199                                 reg = <9>;
 200                                 atmel,fifo-size = <1024>;
 201                                 atmel,nb-banks = <2>;
 202                                 atmel,can-isoc;
 203                         };
 204
 205                         ep10 {
 206                                 reg = <10>;
 207                                 atmel,fifo-size = <1024>;
 208                                 atmel,nb-banks = <2>;
 209                                 atmel,can-isoc;
 210                         };
 211
 212                         ep11 {
 213                                 reg = <11>;
 214                                 atmel,fifo-size = <1024>;
 215                                 atmel,nb-banks = <2>;
 216                                 atmel,can-isoc;
 217                         };
 218
 219                         ep12 {
 220                                 reg = <12>;
 221                                 atmel,fifo-size = <1024>;
 222                                 atmel,nb-banks = <2>;
 223                                 atmel,can-isoc;
 224                         };
 225
 226                         ep13 {
 227                                 reg = <13>;
 228                                 atmel,fifo-size = <1024>;
 229                                 atmel,nb-banks = <2>;
 230                                 atmel,can-isoc;
 231                         };
 232
 233                         ep14 {
 234                                 reg = <14>;
 235                                 atmel,fifo-size = <1024>;
 236                                 atmel,nb-banks = <2>;
 237                                 atmel,can-isoc;
 238                         };
 239
 240                         ep15 {
 241                                 reg = <15>;
 242                                 atmel,fifo-size = <1024>;
 243                                 atmel,nb-banks = <2>;
 244                                 atmel,can-isoc;
 245                         };
 246                 };
 247
 248                 usb1: ohci@00500000 {
 249                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 250                         reg = <0x00500000 0x100000>;
 251                         interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
 252                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
 253                                  <&uhpck>;
 254                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
 255                         status = "disabled";
 256                 };
 257
 258                 usb2: ehci@00600000 {
 259                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 260                         reg = <0x00600000 0x100000>;
 261                         interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
 262                         clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
 263                         clock-names = "usb_clk", "ehci_clk", "uhpck";
 264                         status = "disabled";
 265                 };
 266
 267                 L2: cache-controller@00a00000 {
 268                         compatible = "arm,pl310-cache";
 269                         reg = <0x00a00000 0x1000>;
 270                         interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
 271                         cache-unified;
 272                         cache-level = <2>;
 273                 };
 274
 275                 nand0: nand@80000000 {
 276                         compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand";
 277                         #address-cells = <1>;
 278                         #size-cells = <1>;
 279                         ranges;
 280                         reg = < 0x80000000 0x08000000   /* EBI CS3 */
 281                                 0xfc05c070 0x00000490   /* SMC PMECC regs */
 282                                 0xfc05c500 0x00000100   /* SMC PMECC Error Location regs */
 283                                 >;
 284                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
 285                         atmel,nand-addr-offset = <21>;
 286                         atmel,nand-cmd-offset = <22>;
 287                         atmel,nand-has-dma;
 288                         pinctrl-names = "default";
 289                         pinctrl-0 = <&pinctrl_nand>;
 290                         status = "disabled";
 291
 292                         nfc@90000000 {
 293                                 compatible = "atmel,sama5d3-nfc";
 294                                 #address-cells = <1>;
 295                                 #size-cells = <1>;
 296                                 reg = <
 297                                         0x90000000 0x10000000   /* NFC Command Registers */
 298                                         0xfc05c000 0x00000070   /* NFC HSMC regs */
 299                                         0x00100000 0x00100000   /* NFC SRAM banks */
 300                                          >;
 301                                 clocks = <&hsmc_clk>;
 302                                 atmel,write-by-sram;
 303                         };
 304                 };
 305
 306                 apb {
 307                         compatible = "simple-bus";
 308                         #address-cells = <1>;
 309                         #size-cells = <1>;
 310                         ranges;
 311
 312                         dma1: dma-controller@f0004000 {
 313                                 compatible = "atmel,sama5d4-dma";
 314                                 reg = <0xf0004000 0x200>;
 315                                 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
 316                                 #dma-cells = <1>;
 317                                 clocks = <&dma1_clk>;
 318                                 clock-names = "dma_clk";
 319                         };
 320
 321                         ramc0: ramc@f0010000 {
 322                                 compatible = "atmel,sama5d3-ddramc";
 323                                 reg = <0xf0010000 0x200>;
 324                                 clocks = <&ddrck>, <&mpddr_clk>;
 325                                 clock-names = "ddrck", "mpddr";
 326                         };
 327
 328                         dma0: dma-controller@f0014000 {
 329                                 compatible = "atmel,sama5d4-dma";
 330                                 reg = <0xf0014000 0x200>;
 331                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
 332                                 #dma-cells = <1>;
 333                                 clocks = <&dma0_clk>;
 334                                 clock-names = "dma_clk";
 335                         };
 336
 337                         pmc: pmc@f0018000 {
 338                                 compatible = "atmel,sama5d3-pmc";
 339                                 reg = <0xf0018000 0x120>;
 340                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 341                                 interrupt-controller;
 342                                 #address-cells = <1>;
 343                                 #size-cells = <0>;
 344                                 #interrupt-cells = <1>;
 345
 346                                 main_rc_osc: main_rc_osc {
 347                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 348                                         #clock-cells = <0>;
 349                                         interrupt-parent = <&pmc>;
 350                                         interrupts = <AT91_PMC_MOSCRCS>;
 351                                         clock-frequency = <12000000>;
 352                                         clock-accuracy = <100000000>;
 353                                 };
 354
 355                                 main_osc: main_osc {
 356                                         compatible = "atmel,at91rm9200-clk-main-osc";
 357                                         #clock-cells = <0>;
 358                                         interrupt-parent = <&pmc>;
 359                                         interrupts = <AT91_PMC_MOSCS>;
 360                                         clocks = <&main_xtal>;
 361                                 };
 362
 363                                 main: mainck {
 364                                         compatible = "atmel,at91sam9x5-clk-main";
 365                                         #clock-cells = <0>;
 366                                         interrupt-parent = <&pmc>;
 367                                         interrupts = <AT91_PMC_MOSCSELS>;
 368                                         clocks = <&main_rc_osc &main_osc>;
 369                                 };
 370
 371                                 plla: pllack {
 372                                         compatible = "atmel,sama5d3-clk-pll";
 373                                         #clock-cells = <0>;
 374                                         interrupt-parent = <&pmc>;
 375                                         interrupts = <AT91_PMC_LOCKA>;
 376                                         clocks = <&main>;
 377                                         reg = <0>;
 378                                         atmel,clk-input-range = <12000000 12000000>;
 379                                         #atmel,pll-clk-output-range-cells = <4>;
 380                                         atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
 381                                 };
 382
 383                                 plladiv: plladivck {
 384                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 385                                         #clock-cells = <0>;
 386                                         clocks = <&plla>;
 387                                 };
 388
 389                                 utmi: utmick {
 390                                         compatible = "atmel,at91sam9x5-clk-utmi";
 391                                         #clock-cells = <0>;
 392                                         interrupt-parent = <&pmc>;
 393                                         interrupts = <AT91_PMC_LOCKU>;
 394                                         clocks = <&main>;
 395                                 };
 396
 397                                 mck: masterck {
 398                                         compatible = "atmel,at91sam9x5-clk-master";
 399                                         #clock-cells = <0>;
 400                                         interrupt-parent = <&pmc>;
 401                                         interrupts = <AT91_PMC_MCKRDY>;
 402                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 403                                         atmel,clk-output-range = <125000000 177000000>;
 404                                         atmel,clk-divisors = <1 2 4 3>;
 405                                 };
 406
 407                                 h32ck: h32mxck {
 408                                         #clock-cells = <0>;
 409                                         compatible = "atmel,sama5d4-clk-h32mx";
 410                                         clocks = <&mck>;
 411                                 };
 412
 413                                 usb: usbck {
 414                                         compatible = "atmel,at91sam9x5-clk-usb";
 415                                         #clock-cells = <0>;
 416                                         clocks = <&plladiv>, <&utmi>;
 417                                 };
 418
 419                                 prog: progck {
 420                                         compatible = "atmel,at91sam9x5-clk-programmable";
 421                                         #address-cells = <1>;
 422                                         #size-cells = <0>;
 423                                         interrupt-parent = <&pmc>;
 424                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 425
 426                                         prog0: prog0 {
 427                                                 #clock-cells = <0>;
 428                                                 reg = <0>;
 429                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 430                                         };
 431
 432                                         prog1: prog1 {
 433                                                 #clock-cells = <0>;
 434                                                 reg = <1>;
 435                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 436                                         };
 437
 438                                         prog2: prog2 {
 439                                                 #clock-cells = <0>;
 440                                                 reg = <2>;
 441                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
 442                                         };
 443                                 };
 444
 445                                 smd: smdclk {
 446                                         compatible = "atmel,at91sam9x5-clk-smd";
 447                                         #clock-cells = <0>;
 448                                         clocks = <&plladiv>, <&utmi>;
 449                                 };
 450
 451                                 systemck {
 452                                         compatible = "atmel,at91rm9200-clk-system";
 453                                         #address-cells = <1>;
 454                                         #size-cells = <0>;
 455
 456                                         ddrck: ddrck {
 457                                                 #clock-cells = <0>;
 458                                                 reg = <2>;
 459                                                 clocks = <&mck>;
 460                                         };
 461
 462                                         lcdck: lcdck {
 463                                                 #clock-cells = <0>;
 464                                                 reg = <4>;
 465                                                 clocks = <&smd>;
 466                                         };
 467
 468                                         smdck: smdck {
 469                                                 #clock-cells = <0>;
 470                                                 reg = <4>;
 471                                                 clocks = <&smd>;
 472                                         };
 473
 474                                         uhpck: uhpck {
 475                                                 #clock-cells = <0>;
 476                                                 reg = <6>;
 477                                                 clocks = <&usb>;
 478                                         };
 479
 480                                         udpck: udpck {
 481                                                 #clock-cells = <0>;
 482                                                 reg = <7>;
 483                                                 clocks = <&usb>;
 484                                         };
 485
 486                                         pck0: pck0 {
 487                                                 #clock-cells = <0>;
 488                                                 reg = <8>;
 489                                                 clocks = <&prog0>;
 490                                         };
 491
 492                                         pck1: pck1 {
 493                                                 #clock-cells = <0>;
 494                                                 reg = <9>;
 495                                                 clocks = <&prog1>;
 496                                         };
 497
 498                                         pck2: pck2 {
 499                                                 #clock-cells = <0>;
 500                                                 reg = <10>;
 501                                                 clocks = <&prog2>;
 502                                         };
 503                                 };
 504
 505                                 periph32ck {
 506                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 507                                         #address-cells = <1>;
 508                                         #size-cells = <0>;
 509                                         clocks = <&h32ck>;
 510
 511                                         pioD_clk: pioD_clk {
 512                                                 #clock-cells = <0>;
 513                                                 reg = <5>;
 514                                         };
 515
 516                                         usart0_clk: usart0_clk {
 517                                                 #clock-cells = <0>;
 518                                                 reg = <6>;
 519                                         };
 520
 521                                         usart1_clk: usart1_clk {
 522                                                 #clock-cells = <0>;
 523                                                 reg = <7>;
 524                                         };
 525
 526                                         icm_clk: icm_clk {
 527                                                 #clock-cells = <0>;
 528                                                 reg = <9>;
 529                                         };
 530
 531                                         aes_clk: aes_clk {
 532                                                 #clock-cells = <0>;
 533                                                 reg = <12>;
 534                                         };
 535
 536                                         tdes_clk: tdes_clk {
 537                                                 #clock-cells = <0>;
 538                                                 reg = <14>;
 539                                         };
 540
 541                                         sha_clk: sha_clk {
 542                                                 #clock-cells = <0>;
 543                                                 reg = <15>;
 544                                         };
 545
 546                                         matrix1_clk: matrix1_clk {
 547                                                 #clock-cells = <0>;
 548                                                 reg = <17>;
 549                                         };
 550
 551                                         hsmc_clk: hsmc_clk {
 552                                                 #clock-cells = <0>;
 553                                                 reg = <22>;
 554                                         };
 555
 556                                         pioA_clk: pioA_clk {
 557                                                 #clock-cells = <0>;
 558                                                 reg = <23>;
 559                                         };
 560
 561                                         pioB_clk: pioB_clk {
 562                                                 #clock-cells = <0>;
 563                                                 reg = <24>;
 564                                         };
 565
 566                                         pioC_clk: pioC_clk {
 567                                                 #clock-cells = <0>;
 568                                                 reg = <25>;
 569                                         };
 570
 571                                         pioE_clk: pioE_clk {
 572                                                 #clock-cells = <0>;
 573                                                 reg = <26>;
 574                                         };
 575
 576                                         uart0_clk: uart0_clk {
 577                                                 #clock-cells = <0>;
 578                                                 reg = <27>;
 579                                         };
 580
 581                                         uart1_clk: uart1_clk {
 582                                                 #clock-cells = <0>;
 583                                                 reg = <28>;
 584                                         };
 585
 586                                         usart2_clk: usart2_clk {
 587                                                 #clock-cells = <0>;
 588                                                 reg = <29>;
 589                                         };
 590
 591                                         usart3_clk: usart3_clk {
 592                                                 #clock-cells = <0>;
 593                                                 reg = <30>;
 594                                         };
 595
 596                                         usart4_clk: usart4_clk {
 597                                                 #clock-cells = <0>;
 598                                                 reg = <31>;
 599                                         };
 600
 601                                         twi0_clk: twi0_clk {
 602                                                 reg = <32>;
 603                                                 #clock-cells = <0>;
 604                                         };
 605
 606                                         twi1_clk: twi1_clk {
 607                                                 #clock-cells = <0>;
 608                                                 reg = <33>;
 609                                         };
 610
 611                                         twi2_clk: twi2_clk {
 612                                                 #clock-cells = <0>;
 613                                                 reg = <34>;
 614                                         };
 615
 616                                         mci0_clk: mci0_clk {
 617                                                 #clock-cells = <0>;
 618                                                 reg = <35>;
 619                                         };
 620
 621                                         mci1_clk: mci1_clk {
 622                                                 #clock-cells = <0>;
 623                                                 reg = <36>;
 624                                         };
 625
 626                                         spi0_clk: spi0_clk {
 627                                                 #clock-cells = <0>;
 628                                                 reg = <37>;
 629                                         };
 630
 631                                         spi1_clk: spi1_clk {
 632                                                 #clock-cells = <0>;
 633                                                 reg = <38>;
 634                                         };
 635
 636                                         spi2_clk: spi2_clk {
 637                                                 #clock-cells = <0>;
 638                                                 reg = <39>;
 639                                         };
 640
 641                                         tcb0_clk: tcb0_clk {
 642                                                 #clock-cells = <0>;
 643                                                 reg = <40>;
 644                                         };
 645
 646                                         tcb1_clk: tcb1_clk {
 647                                                 #clock-cells = <0>;
 648                                                 reg = <41>;
 649                                         };
 650
 651                                         tcb2_clk: tcb2_clk {
 652                                                 #clock-cells = <0>;
 653                                                 reg = <42>;
 654                                         };
 655
 656                                         pwm_clk: pwm_clk {
 657                                                 #clock-cells = <0>;
 658                                                 reg = <43>;
 659                                         };
 660
 661                                         adc_clk: adc_clk {
 662                                                 #clock-cells = <0>;
 663                                                 reg = <44>;
 664                                         };
 665
 666                                         dbgu_clk: dbgu_clk {
 667                                                 #clock-cells = <0>;
 668                                                 reg = <45>;
 669                                         };
 670
 671                                         uhphs_clk: uhphs_clk {
 672                                                 #clock-cells = <0>;
 673                                                 reg = <46>;
 674                                         };
 675
 676                                         udphs_clk: udphs_clk {
 677                                                 #clock-cells = <0>;
 678                                                 reg = <47>;
 679                                         };
 680
 681                                         ssc0_clk: ssc0_clk {
 682                                                 #clock-cells = <0>;
 683                                                 reg = <48>;
 684                                         };
 685
 686                                         ssc1_clk: ssc1_clk {
 687                                                 #clock-cells = <0>;
 688                                                 reg = <49>;
 689                                         };
 690
 691                                         trng_clk: trng_clk {
 692                                                 #clock-cells = <0>;
 693                                                 reg = <53>;
 694                                         };
 695
 696                                         macb0_clk: macb0_clk {
 697                                                 #clock-cells = <0>;
 698                                                 reg = <54>;
 699                                         };
 700
 701                                         macb1_clk: macb1_clk {
 702                                                 #clock-cells = <0>;
 703                                                 reg = <55>;
 704                                         };
 705
 706                                         fuse_clk: fuse_clk {
 707                                                 #clock-cells = <0>;
 708                                                 reg = <57>;
 709                                         };
 710
 711                                         securam_clk: securam_clk {
 712                                                 #clock-cells = <0>;
 713                                                 reg = <59>;
 714                                         };
 715
 716                                         smd_clk: smd_clk {
 717                                                 #clock-cells = <0>;
 718                                                 reg = <61>;
 719                                         };
 720
 721                                         twi3_clk: twi3_clk {
 722                                                 #clock-cells = <0>;
 723                                                 reg = <62>;
 724                                         };
 725
 726                                         catb_clk: catb_clk {
 727                                                 #clock-cells = <0>;
 728                                                 reg = <63>;
 729                                         };
 730                                 };
 731
 732                                 periph64ck {
 733                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 734                                         #address-cells = <1>;
 735                                         #size-cells = <0>;
 736                                         clocks = <&mck>;
 737
 738                                         dma0_clk: dma0_clk {
 739                                                 #clock-cells = <0>;
 740                                                 reg = <8>;
 741                                         };
 742
 743                                         cpkcc_clk: cpkcc_clk {
 744                                                 #clock-cells = <0>;
 745                                                 reg = <10>;
 746                                         };
 747
 748                                         aesb_clk: aesb_clk {
 749                                                 #clock-cells = <0>;
 750                                                 reg = <13>;
 751                                         };
 752
 753                                         mpddr_clk: mpddr_clk {
 754                                                 #clock-cells = <0>;
 755                                                 reg = <16>;
 756                                         };
 757
 758                                         matrix0_clk: matrix0_clk {
 759                                                 #clock-cells = <0>;
 760                                                 reg = <18>;
 761                                         };
 762
 763                                         vdec_clk: vdec_clk {
 764                                                 #clock-cells = <0>;
 765                                                 reg = <19>;
 766                                         };
 767
 768                                         dma1_clk: dma1_clk {
 769                                                 #clock-cells = <0>;
 770                                                 reg = <50>;
 771                                         };
 772
 773                                         lcd_clk: lcd_clk {
 774                                                 #clock-cells = <0>;
 775                                                 reg = <51>;
 776                                         };
 777
 778                                         isi_clk: isi_clk {
 779                                                 #clock-cells = <0>;
 780                                                 reg = <52>;
 781                                         };
 782                                 };
 783                         };
 784
 785                         mmc0: mmc@f8000000 {
 786                                 compatible = "atmel,hsmci";
 787                                 reg = <0xf8000000 0x600>;
 788                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
 789                                 dmas = <&dma1
 790                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 791                                         | AT91_XDMAC_DT_PERID(0))>;
 792                                 dma-names = "rxtx";
 793                                 pinctrl-names = "default";
 794                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
 795                                 status = "disabled";
 796                                 #address-cells = <1>;
 797                                 #size-cells = <0>;
 798                                 clocks = <&mci0_clk>;
 799                                 clock-names = "mci_clk";
 800                         };
 801
 802                         spi0: spi@f8010000 {
 803                                 #address-cells = <1>;
 804                                 #size-cells = <0>;
 805                                 compatible = "atmel,at91rm9200-spi";
 806                                 reg = <0xf8010000 0x100>;
 807                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
 808                                 dmas = <&dma1
 809                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 810                                         | AT91_XDMAC_DT_PERID(10))>,
 811                                        <&dma1
 812                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 813                                         | AT91_XDMAC_DT_PERID(11))>;
 814                                 dma-names = "tx", "rx";
 815                                 pinctrl-names = "default";
 816                                 pinctrl-0 = <&pinctrl_spi0>;
 817                                 clocks = <&spi0_clk>;
 818                                 clock-names = "spi_clk";
 819                                 status = "disabled";
 820                         };
 821
 822                         i2c0: i2c@f8014000 {
 823                                 compatible = "atmel,at91sam9x5-i2c";
 824                                 reg = <0xf8014000 0x4000>;
 825                                 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
 826                                 dmas = <&dma1
 827                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 828                                         | AT91_XDMAC_DT_PERID(2))>,
 829                                        <&dma1
 830                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 831                                         | AT91_XDMAC_DT_PERID(3))>;
 832                                 dma-names = "tx", "rx";
 833                                 pinctrl-names = "default";
 834                                 pinctrl-0 = <&pinctrl_i2c0>;
 835                                 #address-cells = <1>;
 836                                 #size-cells = <0>;
 837                                 clocks = <&twi0_clk>;
 838                                 status = "disabled";
 839                         };
 840
 841                         tcb0: timer@f801c000 {
 842                                 compatible = "atmel,at91sam9x5-tcb";
 843                                 reg = <0xf801c000 0x100>;
 844                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
 845                                 clocks = <&tcb0_clk>;
 846                                 clock-names = "t0_clk";
 847                         };
 848
 849                         macb0: ethernet@f8020000 {
 850                                 compatible = "atmel,sama5d4-gem";
 851                                 reg = <0xf8020000 0x100>;
 852                                 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
 853                                 pinctrl-names = "default";
 854                                 pinctrl-0 = <&pinctrl_macb0_rmii>;
 855                                 clocks = <&macb0_clk>, <&macb0_clk>;
 856                                 clock-names = "hclk", "pclk";
 857                                 status = "disabled";
 858                         };
 859
 860                         i2c2: i2c@f8024000 {
 861                                 compatible = "atmel,at91sam9x5-i2c";
 862                                 reg = <0xf8024000 0x4000>;
 863                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
 864                                 dmas = <&dma1
 865                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 866                                         | AT91_XDMAC_DT_PERID(6))>,
 867                                        <&dma1
 868                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 869                                         | AT91_XDMAC_DT_PERID(7))>;
 870                                 dma-names = "tx", "rx";
 871                                 pinctrl-names = "default";
 872                                 pinctrl-0 = <&pinctrl_i2c2>;
 873                                 #address-cells = <1>;
 874                                 #size-cells = <0>;
 875                                 clocks = <&twi2_clk>;
 876                                 status = "disabled";
 877                         };
 878
 879                         sfr: sfr@f8028000 {
 880                                 compatible = "atmel,sama5d4-sfr", "syscon";
 881                                 reg = <0xf8028000 0x60>;
 882                         };
 883
 884                         mmc1: mmc@fc000000 {
 885                                 compatible = "atmel,hsmci";
 886                                 reg = <0xfc000000 0x600>;
 887                                 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
 888                                 dmas = <&dma1
 889                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 890                                         | AT91_XDMAC_DT_PERID(1))>;
 891                                 dma-names = "rxtx";
 892                                 pinctrl-names = "default";
 893                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
 894                                 status = "disabled";
 895                                 #address-cells = <1>;
 896                                 #size-cells = <0>;
 897                                 clocks = <&mci1_clk>;
 898                                 clock-names = "mci_clk";
 899                         };
 900
 901                         usart2: serial@fc008000 {
 902                                 compatible = "atmel,at91sam9260-usart";
 903                                 reg = <0xfc008000 0x100>;
 904                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 905                                 dmas = <&dma1
 906                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 907                                         | AT91_XDMAC_DT_PERID(16))>,
 908                                        <&dma1
 909                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 910                                         | AT91_XDMAC_DT_PERID(17))>;
 911                                 dma-names = "tx", "rx";
 912                                 pinctrl-names = "default";
 913                                 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
 914                                 clocks = <&usart2_clk>;
 915                                 clock-names = "usart";
 916                                 status = "disabled";
 917                         };
 918
 919                         usart3: serial@fc00c000 {
 920                                 compatible = "atmel,at91sam9260-usart";
 921                                 reg = <0xfc00c000 0x100>;
 922                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
 923                                 dmas = <&dma1
 924                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 925                                         | AT91_XDMAC_DT_PERID(18))>,
 926                                        <&dma1
 927                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 928                                         | AT91_XDMAC_DT_PERID(19))>;
 929                                 dma-names = "tx", "rx";
 930                                 pinctrl-names = "default";
 931                                 pinctrl-0 = <&pinctrl_usart3>;
 932                                 clocks = <&usart3_clk>;
 933                                 clock-names = "usart";
 934                                 status = "disabled";
 935                         };
 936
 937                         usart4: serial@fc010000 {
 938                                 compatible = "atmel,at91sam9260-usart";
 939                                 reg = <0xfc010000 0x100>;
 940                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
 941                                 dmas = <&dma1
 942                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 943                                         | AT91_XDMAC_DT_PERID(20))>,
 944                                        <&dma1
 945                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 946                                         | AT91_XDMAC_DT_PERID(21))>;
 947                                 dma-names = "tx", "rx";
 948                                 pinctrl-names = "default";
 949                                 pinctrl-0 = <&pinctrl_usart4>;
 950                                 clocks = <&usart4_clk>;
 951                                 clock-names = "usart";
 952                                 status = "disabled";
 953                         };
 954
 955                         tcb1: timer@fc020000 {
 956                                 compatible = "atmel,at91sam9x5-tcb";
 957                                 reg = <0xfc020000 0x100>;
 958                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
 959                                 clocks = <&tcb1_clk>;
 960                                 clock-names = "t0_clk";
 961                         };
 962
 963                         adc0: adc@fc034000 {
 964                                 compatible = "atmel,at91sam9x5-adc";
 965                                 reg = <0xfc034000 0x100>;
 966                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
 967                                 pinctrl-names = "default";
 968                                 pinctrl-0 = <
 969                                         /* external trigger is conflict with USBA_VBUS */
 970                                         &pinctrl_adc0_ad0
 971                                         &pinctrl_adc0_ad1
 972                                         &pinctrl_adc0_ad2
 973                                         &pinctrl_adc0_ad3
 974                                         &pinctrl_adc0_ad4
 975                                         >;
 976                                 clocks = <&adc_clk>,
 977                                          <&adc_op_clk>;
 978                                 clock-names = "adc_clk", "adc_op_clk";
 979                                 atmel,adc-channels-used = <0x01f>;
 980                                 atmel,adc-startup-time = <40>;
 981                                 atmel,adc-use-external;
 982                                 atmel,adc-vref = <3000>;
 983                                 atmel,adc-res = <8 10>;
 984                                 atmel,adc-sample-hold-time = <11>;
 985                                 atmel,adc-res-names = "lowres", "highres";
 986                                 atmel,adc-ts-pressure-threshold = <10000>;
 987                                 status = "disabled";
 988
 989                                 trigger@0 {
 990                                         trigger-name = "external-rising";
 991                                         trigger-value = <0x1>;
 992                                         trigger-external;
 993                                 };
 994                                 trigger@1 {
 995                                         trigger-name = "external-falling";
 996                                         trigger-value = <0x2>;
 997                                         trigger-external;
 998                                 };
 999                                 trigger@2 {
1000                                         trigger-name = "external-any";
1001                                         trigger-value = <0x3>;
1002                                         trigger-external;
1003                                 };
1004                                 trigger@3 {
1005                                         trigger-name = "continuous";
1006                                         trigger-value = <0x6>;
1007                                 };
1008                         };
1009
1010                         rstc@fc068600 {
1011                                 compatible = "atmel,at91sam9g45-rstc";
1012                                 reg = <0xfc068600 0x10>;
1013                         };
1014
1015                         shdwc@fc068610 {
1016                                 compatible = "atmel,at91sam9x5-shdwc";
1017                                 reg = <0xfc068610 0x10>;
1018                         };
1019
1020                         pit: timer@fc068630 {
1021                                 compatible = "atmel,at91sam9260-pit";
1022                                 reg = <0xfc068630 0x10>;
1023                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1024                                 clocks = <&h32ck>;
1025                         };
1026
1027                         watchdog@fc068640 {
1028                                 compatible = "atmel,at91sam9260-wdt";
1029                                 reg = <0xfc068640 0x10>;
1030                                 status = "disabled";
1031                         };
1032
1033                         sckc@fc068650 {
1034                                 compatible = "atmel,at91sam9x5-sckc";
1035                                 reg = <0xfc068650 0x4>;
1036
1037                                 slow_rc_osc: slow_rc_osc {
1038                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1039                                         #clock-cells = <0>;
1040                                         clock-frequency = <32768>;
1041                                         clock-accuracy = <250000000>;
1042                                         atmel,startup-time-usec = <75>;
1043                                 };
1044
1045                                 slow_osc: slow_osc {
1046                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
1047                                         #clock-cells = <0>;
1048                                         clocks = <&slow_xtal>;
1049                                         atmel,startup-time-usec = <1200000>;
1050                                 };
1051
1052                                 clk32k: slowck {
1053                                         compatible = "atmel,at91sam9x5-clk-slow";
1054                                         #clock-cells = <0>;
1055                                         clocks = <&slow_rc_osc &slow_osc>;
1056                                 };
1057                         };
1058
1059                         rtc@fc0686b0 {
1060                                 compatible = "atmel,at91rm9200-rtc";
1061                                 reg = <0xfc0686b0 0x30>;
1062                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1063                         };
1064
1065                         dbgu: serial@fc069000 {
1066                                 compatible = "atmel,at91sam9260-usart";
1067                                 reg = <0xfc069000 0x200>;
1068                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
1069                                 pinctrl-names = "default";
1070                                 pinctrl-0 = <&pinctrl_dbgu>;
1071                                 clocks = <&dbgu_clk>;
1072                                 clock-names = "usart";
1073                                 status = "disabled";
1074                         };
1075
1076
1077                         pinctrl@fc06a000 {
1078                                 #address-cells = <1>;
1079                                 #size-cells = <1>;
1080                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
1081                                 ranges = <0xfc06a000 0xfc06a000 0x4000>;
1082                                 /* WARNING: revisit as pin spec has changed */
1083                                 atmel,mux-mask = <
1084                                         /*   A          B          C  */
1085                                         0xffffffff 0x3ffcfe7c 0x1c010101        /* pioA */
1086                                         0x7fffffff 0xfffccc3a 0x3f00cc3a        /* pioB */
1087                                         0xffffffff 0x3ff83fff 0xff00ffff        /* pioC */
1088                                         0x00000000 0x00000000 0x00000000        /* pioD */
1089                                         0xffffffff 0x7fffffff 0x76fff1bf        /* pioE */
1090                                         >;
1091
1092                                 pioA: gpio@fc06a000 {
1093                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1094                                         reg = <0xfc06a000 0x100>;
1095                                         interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
1096                                         #gpio-cells = <2>;
1097                                         gpio-controller;
1098                                         interrupt-controller;
1099                                         #interrupt-cells = <2>;
1100                                         clocks = <&pioA_clk>;
1101                                 };
1102
1103                                 pioB: gpio@fc06b000 {
1104                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1105                                         reg = <0xfc06b000 0x100>;
1106                                         interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
1107                                         #gpio-cells = <2>;
1108                                         gpio-controller;
1109                                         interrupt-controller;
1110                                         #interrupt-cells = <2>;
1111                                         clocks = <&pioB_clk>;
1112                                 };
1113
1114                                 pioC: gpio@fc06c000 {
1115                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1116                                         reg = <0xfc06c000 0x100>;
1117                                         interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
1118                                         #gpio-cells = <2>;
1119                                         gpio-controller;
1120                                         interrupt-controller;
1121                                         #interrupt-cells = <2>;
1122                                         clocks = <&pioC_clk>;
1123                                 };
1124
1125                                 pioD: gpio@fc068000 {
1126                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1127                                         reg = <0xfc068000 0x100>;
1128                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
1129                                         #gpio-cells = <2>;
1130                                         gpio-controller;
1131                                         interrupt-controller;
1132                                         #interrupt-cells = <2>;
1133                                         clocks = <&pioD_clk>;
1134                                         status = "disabled";
1135                                 };
1136
1137                                 pioE: gpio@fc06d000 {
1138                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1139                                         reg = <0xfc06d000 0x100>;
1140                                         interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
1141                                         #gpio-cells = <2>;
1142                                         gpio-controller;
1143                                         interrupt-controller;
1144                                         #interrupt-cells = <2>;
1145                                         clocks = <&pioE_clk>;
1146                                 };
1147
1148                                 /* pinctrl pin settings */
1149                                 adc0 {
1150                                         pinctrl_adc0_adtrg: adc0_adtrg {
1151                                                 atmel,pins =
1152                                                         <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
1153                                         };
1154                                         pinctrl_adc0_ad0: adc0_ad0 {
1155                                                 atmel,pins =
1156                                                         <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1157                                         };
1158                                         pinctrl_adc0_ad1: adc0_ad1 {
1159                                                 atmel,pins =
1160                                                         <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1161                                         };
1162                                         pinctrl_adc0_ad2: adc0_ad2 {
1163                                                 atmel,pins =
1164                                                         <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1165                                         };
1166                                         pinctrl_adc0_ad3: adc0_ad3 {
1167                                                 atmel,pins =
1168                                                         <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1169                                         };
1170                                         pinctrl_adc0_ad4: adc0_ad4 {
1171                                                 atmel,pins =
1172                                                         <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1173                                         };
1174                                 };
1175
1176                                 dbgu {
1177                                         pinctrl_dbgu: dbgu-0 {
1178                                                 atmel,pins =
1179                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,     /* conflicts with D14 and TDI */
1180                                                         <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;  /* conflicts with D15 and TDO */
1181                                         };
1182                                 };
1183
1184                                 i2c0 {
1185                                         pinctrl_i2c0: i2c0-0 {
1186                                                 atmel,pins =
1187                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1188                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1189                                         };
1190                                 };
1191
1192                                 i2c2 {
1193                                         pinctrl_i2c2: i2c2-0 {
1194                                                 atmel,pins =
1195                                                         <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* TWD2, conflicts with RD0 and PWML1 */
1196                                                          AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1197                                         };
1198                                 };
1199
1200                                 macb0 {
1201                                         pinctrl_macb0_rmii: macb0_rmii-0 {
1202                                                 atmel,pins =
1203                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TX0 */
1204                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TX1 */
1205                                                          AT91_PIOB  8 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RX0 */
1206                                                          AT91_PIOB  9 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RX1 */
1207                                                          AT91_PIOB  6 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RXDV */
1208                                                          AT91_PIOB  7 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RXER */
1209                                                          AT91_PIOB  2 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TXEN */
1210                                                          AT91_PIOB  0 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TXCK */
1211                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_MDC */
1212                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_MDIO */
1213                                                         >;
1214                                         };
1215                                 };
1216
1217                                 mmc0 {
1218                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1219                                                 atmel,pins =
1220                                                         <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1221                                                          AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDB, conflict with NAND_D0 */
1222                                                          AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB0, conflict with NAND_D1 */
1223                                                         >;
1224                                         };
1225                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1226                                                 atmel,pins =
1227                                                         <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB1, conflict with NAND_D2 */
1228                                                          AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB2, conflict with NAND_D3 */
1229                                                          AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DB3, conflict with NAND_D4 */
1230                                                         >;
1231                                         };
1232                                 };
1233
1234                                 mmc1 {
1235                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1236                                                 atmel,pins =
1237                                                         <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE           /* MCI1_CK */
1238                                                          AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_CDA */
1239                                                          AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA0 */
1240                                                         >;
1241                                         };
1242                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1243                                                 atmel,pins =
1244                                                         <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA1 */
1245                                                          AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA2 */
1246                                                          AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA3 */
1247                                                         >;
1248                                         };
1249                                 };
1250
1251                                 nand0 {
1252                                         pinctrl_nand: nand-0 {
1253                                                 atmel,pins =
1254                                                         <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC13 periph A Read Enable */
1255                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC14 periph A Write Enable */
1256
1257                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC17 ALE */
1258                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC18 CLE */
1259
1260                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC15 NCS3/Chip Enable */
1261                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC16 NANDRDY */
1262                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC5 Data bit 0 */
1263                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 Data bit 1 */
1264                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 Data bit 2 */
1265                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 Data bit 3 */
1266                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC9 Data bit 4 */
1267                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC10 Data bit 5 */
1268                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC11 periph A Data bit 6 */
1269                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1270                                         };
1271                                 };
1272
1273                                 spi0 {
1274                                         pinctrl_spi0: spi0-0 {
1275                                                 atmel,pins =
1276                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_MISO */
1277                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_MOSI */
1278                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_SPCK */
1279                                                         >;
1280                                         };
1281                                 };
1282
1283                                 usart2 {
1284                                         pinctrl_usart2: usart2-0 {
1285                                                 atmel,pins =
1286                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE            /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1287                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP         /* TXD - conflicts with G0_COL, PCK2 */
1288                                                         >;
1289                                         };
1290                                         pinctrl_usart2_rts: usart2_rts-0 {
1291                                                 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;    /* conflicts with G0_RX3, PWMH1 */
1292                                         };
1293                                         pinctrl_usart2_cts: usart2_cts-0 {
1294                                                 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;     /* conflicts with G0_TXER, ISI_VSYNC */
1295                                         };
1296                                 };
1297
1298                                 usart3 {
1299                                         pinctrl_usart3: usart3-0 {
1300                                                 atmel,pins =
1301                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE           /* RXD */
1302                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* TXD */
1303                                                         >;
1304                                         };
1305                                 };
1306
1307                                 usart4 {
1308                                         pinctrl_usart4: usart4-0 {
1309                                                 atmel,pins =
1310                                                         <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE           /* RXD */
1311                                                          AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* TXD */
1312                                                         >;
1313                                         };
1314                                         pinctrl_usart4_rts: usart4_rts-0 {
1315                                                 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;    /* conflicts with NWAIT, A19 */
1316                                         };
1317                                         pinctrl_usart4_cts: usart4_cts-0 {
1318                                                 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>;     /* conflicts with A0/NBS0, MCI0_CDB */
1319                                         };
1320                                 };
1321                         };
1322
1323                         aic: interrupt-controller@fc06e000 {
1324                                 #interrupt-cells = <3>;
1325                                 compatible = "atmel,sama5d4-aic";
1326                                 interrupt-controller;
1327                                 reg = <0xfc06e000 0x200>;
1328                                 atmel,external-irqs = <56>;
1329                         };
1330                 };
1331         };
1332 };