2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/module.h>
36 #include <linux/errno.h>
37 #include <linux/pci.h>
38 #include <linux/interrupt.h>
40 #include "mthca_dev.h"
41 #include "mthca_config_reg.h"
42 #include "mthca_cmd.h"
43 #include "mthca_profile.h"
44 #include "mthca_memfree.h"
45 #include "mthca_wqe.h"
47 MODULE_AUTHOR("Roland Dreier");
48 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
49 MODULE_LICENSE("Dual BSD/GPL");
50 MODULE_VERSION(DRV_VERSION);
52 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
54 int mthca_debug_level = 0;
55 module_param_named(debug_level, mthca_debug_level, int, 0644);
56 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
58 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
63 module_param(msi_x, int, 0444);
64 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
66 #else /* CONFIG_PCI_MSI */
70 #endif /* CONFIG_PCI_MSI */
72 static int tune_pci = 0;
73 module_param(tune_pci, int, 0444);
74 MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero");
76 DEFINE_MUTEX(mthca_device_mutex);
78 #define MTHCA_DEFAULT_NUM_QP (1 << 16)
79 #define MTHCA_DEFAULT_RDB_PER_QP (1 << 2)
80 #define MTHCA_DEFAULT_NUM_CQ (1 << 16)
81 #define MTHCA_DEFAULT_NUM_MCG (1 << 13)
82 #define MTHCA_DEFAULT_NUM_MPT (1 << 17)
83 #define MTHCA_DEFAULT_NUM_MTT (1 << 20)
84 #define MTHCA_DEFAULT_NUM_UDAV (1 << 15)
85 #define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18)
86 #define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18)
88 static struct mthca_profile hca_profile = {
89 .num_qp = MTHCA_DEFAULT_NUM_QP,
90 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP,
91 .num_cq = MTHCA_DEFAULT_NUM_CQ,
92 .num_mcg = MTHCA_DEFAULT_NUM_MCG,
93 .num_mpt = MTHCA_DEFAULT_NUM_MPT,
94 .num_mtt = MTHCA_DEFAULT_NUM_MTT,
95 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */
96 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */
97 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */
100 module_param_named(num_qp, hca_profile.num_qp, int, 0444);
101 MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA");
103 module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444);
104 MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP");
106 module_param_named(num_cq, hca_profile.num_cq, int, 0444);
107 MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA");
109 module_param_named(num_mcg, hca_profile.num_mcg, int, 0444);
110 MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA");
112 module_param_named(num_mpt, hca_profile.num_mpt, int, 0444);
113 MODULE_PARM_DESC(num_mpt,
114 "maximum number of memory protection table entries per HCA");
116 module_param_named(num_mtt, hca_profile.num_mtt, int, 0444);
117 MODULE_PARM_DESC(num_mtt,
118 "maximum number of memory translation table segments per HCA");
120 module_param_named(num_udav, hca_profile.num_udav, int, 0444);
121 MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA");
123 module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
124 MODULE_PARM_DESC(fmr_reserved_mtts,
125 "number of memory translation table segments reserved for FMR");
127 static int log_mtts_per_seg;
128 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
129 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-5)");
131 static char mthca_version[] __devinitdata =
132 DRV_NAME ": Mellanox InfiniBand HCA driver v"
133 DRV_VERSION " (" DRV_RELDATE ")\n";
135 static int mthca_tune_pci(struct mthca_dev *mdev)
140 /* First try to max out Read Byte Count */
141 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) {
142 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) {
143 mthca_err(mdev, "Couldn't set PCI-X max read count, "
147 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
148 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
150 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) {
151 if (pcie_set_readrq(mdev->pdev, 4096)) {
152 mthca_err(mdev, "Couldn't write PCI Express read request, "
156 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
157 mthca_info(mdev, "No PCI Express capability, "
158 "not setting Max Read Request Size.\n");
163 static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
168 mdev->limits.mtt_seg_size = (1 << log_mtts_per_seg) * 8;
169 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
171 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
175 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
176 "aborting.\n", status);
179 if (dev_lim->min_page_sz > PAGE_SIZE) {
180 mthca_err(mdev, "HCA minimum page size of %d bigger than "
181 "kernel PAGE_SIZE of %d, aborting.\n",
182 dev_lim->min_page_sz, PAGE_SIZE);
185 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
186 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
188 dev_lim->num_ports, MTHCA_MAX_PORTS);
192 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) {
193 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than "
194 "PCI resource 2 size of 0x%llx, aborting.\n",
196 (unsigned long long)pci_resource_len(mdev->pdev, 2));
200 mdev->limits.num_ports = dev_lim->num_ports;
201 mdev->limits.vl_cap = dev_lim->max_vl;
202 mdev->limits.mtu_cap = dev_lim->max_mtu;
203 mdev->limits.gid_table_len = dev_lim->max_gids;
204 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
205 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
207 * Need to allow for worst case send WQE overhead and check
208 * whether max_desc_sz imposes a lower limit than max_sg; UD
209 * send has the biggest overhead.
211 mdev->limits.max_sg = min_t(int, dev_lim->max_sg,
212 (dev_lim->max_desc_sz -
213 sizeof (struct mthca_next_seg) -
214 (mthca_is_memfree(mdev) ?
215 sizeof (struct mthca_arbel_ud_seg) :
216 sizeof (struct mthca_tavor_ud_seg))) /
217 sizeof (struct mthca_data_seg));
218 mdev->limits.max_wqes = dev_lim->max_qp_sz;
219 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
220 mdev->limits.reserved_qps = dev_lim->reserved_qps;
221 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
222 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
223 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
224 mdev->limits.max_desc_sz = dev_lim->max_desc_sz;
225 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev);
227 * Subtract 1 from the limit because we need to allocate a
228 * spare CQE so the HCA HW can tell the difference between an
229 * empty CQ and a full CQ.
231 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
232 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
233 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
234 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
235 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
236 mdev->limits.reserved_uars = dev_lim->reserved_uars;
237 mdev->limits.reserved_pds = dev_lim->reserved_pds;
238 mdev->limits.port_width_cap = dev_lim->max_port_width;
239 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1);
240 mdev->limits.flags = dev_lim->flags;
242 * For old FW that doesn't return static rate support, use a
243 * value of 0x3 (only static rate values of 0 or 1 are handled),
244 * except on Sinai, where even old FW can handle static rate
247 if (dev_lim->stat_rate_support)
248 mdev->limits.stat_rate_support = dev_lim->stat_rate_support;
249 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
250 mdev->limits.stat_rate_support = 0xf;
252 mdev->limits.stat_rate_support = 0x3;
254 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
255 May be doable since hardware supports it for SRQ.
257 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
259 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
260 supported by driver. */
261 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
262 IB_DEVICE_PORT_ACTIVE_EVENT |
263 IB_DEVICE_SYS_IMAGE_GUID |
264 IB_DEVICE_RC_RNR_NAK_GEN;
266 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
267 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
269 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
270 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
272 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
273 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
275 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
276 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
278 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
279 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
281 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
282 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
284 if (mthca_is_memfree(mdev))
285 if (dev_lim->flags & DEV_LIM_FLAG_IPOIB_CSUM)
286 mdev->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
291 static int mthca_init_tavor(struct mthca_dev *mdev)
296 struct mthca_dev_lim dev_lim;
297 struct mthca_profile profile;
298 struct mthca_init_hca_param init_hca;
300 err = mthca_SYS_EN(mdev, &status);
302 mthca_err(mdev, "SYS_EN command failed, aborting.\n");
306 mthca_err(mdev, "SYS_EN returned status 0x%02x, "
307 "aborting.\n", status);
311 err = mthca_QUERY_FW(mdev, &status);
313 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
317 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
318 "aborting.\n", status);
322 err = mthca_QUERY_DDR(mdev, &status);
324 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
328 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
329 "aborting.\n", status);
334 err = mthca_dev_lim(mdev, &dev_lim);
336 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
340 profile = hca_profile;
341 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
342 profile.uarc_size = 0;
343 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
344 profile.num_srq = dev_lim.max_srqs;
346 size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
352 err = mthca_INIT_HCA(mdev, &init_hca, &status);
354 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
358 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
359 "aborting.\n", status);
367 mthca_SYS_DIS(mdev, &status);
372 static int mthca_load_fw(struct mthca_dev *mdev)
377 /* FIXME: use HCA-attached memory for FW if present */
379 mdev->fw.arbel.fw_icm =
380 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
381 GFP_HIGHUSER | __GFP_NOWARN, 0);
382 if (!mdev->fw.arbel.fw_icm) {
383 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
387 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
389 mthca_err(mdev, "MAP_FA command failed, aborting.\n");
393 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
397 err = mthca_RUN_FW(mdev, &status);
399 mthca_err(mdev, "RUN_FW command failed, aborting.\n");
403 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
411 mthca_UNMAP_FA(mdev, &status);
414 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
418 static int mthca_init_icm(struct mthca_dev *mdev,
419 struct mthca_dev_lim *dev_lim,
420 struct mthca_init_hca_param *init_hca,
427 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
429 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
433 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
434 "aborting.\n", status);
438 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
439 (unsigned long long) icm_size >> 10,
440 (unsigned long long) aux_pages << 2);
442 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
443 GFP_HIGHUSER | __GFP_NOWARN, 0);
444 if (!mdev->fw.arbel.aux_icm) {
445 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
449 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
451 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
455 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
460 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
462 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
466 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */
467 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * mdev->limits.mtt_seg_size,
468 dma_get_cache_alignment()) / mdev->limits.mtt_seg_size;
470 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
471 mdev->limits.mtt_seg_size,
472 mdev->limits.num_mtt_segs,
473 mdev->limits.reserved_mtts,
475 if (!mdev->mr_table.mtt_table) {
476 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
481 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
482 dev_lim->mpt_entry_sz,
483 mdev->limits.num_mpts,
484 mdev->limits.reserved_mrws,
486 if (!mdev->mr_table.mpt_table) {
487 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
492 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
493 dev_lim->qpc_entry_sz,
494 mdev->limits.num_qps,
495 mdev->limits.reserved_qps,
497 if (!mdev->qp_table.qp_table) {
498 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
503 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
504 dev_lim->eqpc_entry_sz,
505 mdev->limits.num_qps,
506 mdev->limits.reserved_qps,
508 if (!mdev->qp_table.eqp_table) {
509 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
514 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
515 MTHCA_RDB_ENTRY_SIZE,
516 mdev->limits.num_qps <<
517 mdev->qp_table.rdb_shift, 0,
519 if (!mdev->qp_table.rdb_table) {
520 mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
525 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
526 dev_lim->cqc_entry_sz,
527 mdev->limits.num_cqs,
528 mdev->limits.reserved_cqs,
530 if (!mdev->cq_table.table) {
531 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
536 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) {
537 mdev->srq_table.table =
538 mthca_alloc_icm_table(mdev, init_hca->srqc_base,
539 dev_lim->srq_entry_sz,
540 mdev->limits.num_srqs,
541 mdev->limits.reserved_srqs,
543 if (!mdev->srq_table.table) {
544 mthca_err(mdev, "Failed to map SRQ context memory, "
552 * It's not strictly required, but for simplicity just map the
553 * whole multicast group table now. The table isn't very big
554 * and it's a lot easier than trying to track ref counts.
556 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
557 MTHCA_MGM_ENTRY_SIZE,
558 mdev->limits.num_mgms +
559 mdev->limits.num_amgms,
560 mdev->limits.num_mgms +
561 mdev->limits.num_amgms,
563 if (!mdev->mcg_table.table) {
564 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
572 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
573 mthca_free_icm_table(mdev, mdev->srq_table.table);
576 mthca_free_icm_table(mdev, mdev->cq_table.table);
579 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
582 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
585 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
588 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
591 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
594 mthca_unmap_eq_icm(mdev);
597 mthca_UNMAP_ICM_AUX(mdev, &status);
600 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
605 static void mthca_free_icms(struct mthca_dev *mdev)
609 mthca_free_icm_table(mdev, mdev->mcg_table.table);
610 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
611 mthca_free_icm_table(mdev, mdev->srq_table.table);
612 mthca_free_icm_table(mdev, mdev->cq_table.table);
613 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
614 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
615 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
616 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
617 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
618 mthca_unmap_eq_icm(mdev);
620 mthca_UNMAP_ICM_AUX(mdev, &status);
621 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
624 static int mthca_init_arbel(struct mthca_dev *mdev)
626 struct mthca_dev_lim dev_lim;
627 struct mthca_profile profile;
628 struct mthca_init_hca_param init_hca;
633 err = mthca_QUERY_FW(mdev, &status);
635 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
639 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
640 "aborting.\n", status);
644 err = mthca_ENABLE_LAM(mdev, &status);
646 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
649 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
650 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
651 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
653 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
654 "aborting.\n", status);
658 err = mthca_load_fw(mdev);
660 mthca_err(mdev, "Failed to start FW, aborting.\n");
664 err = mthca_dev_lim(mdev, &dev_lim);
666 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
670 profile = hca_profile;
671 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
672 profile.num_udav = 0;
673 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
674 profile.num_srq = dev_lim.max_srqs;
676 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
682 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
686 err = mthca_INIT_HCA(mdev, &init_hca, &status);
688 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
692 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
693 "aborting.\n", status);
701 mthca_free_icms(mdev);
704 mthca_UNMAP_FA(mdev, &status);
705 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
708 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
709 mthca_DISABLE_LAM(mdev, &status);
714 static void mthca_close_hca(struct mthca_dev *mdev)
718 mthca_CLOSE_HCA(mdev, 0, &status);
720 if (mthca_is_memfree(mdev)) {
721 mthca_free_icms(mdev);
723 mthca_UNMAP_FA(mdev, &status);
724 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
726 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
727 mthca_DISABLE_LAM(mdev, &status);
729 mthca_SYS_DIS(mdev, &status);
732 static int mthca_init_hca(struct mthca_dev *mdev)
736 struct mthca_adapter adapter;
738 if (mthca_is_memfree(mdev))
739 err = mthca_init_arbel(mdev);
741 err = mthca_init_tavor(mdev);
746 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
748 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
752 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
753 "aborting.\n", status);
758 mdev->eq_table.inta_pin = adapter.inta_pin;
759 if (!mthca_is_memfree(mdev))
760 mdev->rev_id = adapter.revision_id;
761 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
766 mthca_close_hca(mdev);
770 static int mthca_setup_hca(struct mthca_dev *dev)
775 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
777 err = mthca_init_uar_table(dev);
779 mthca_err(dev, "Failed to initialize "
780 "user access region table, aborting.\n");
784 err = mthca_uar_alloc(dev, &dev->driver_uar);
786 mthca_err(dev, "Failed to allocate driver access region, "
788 goto err_uar_table_free;
791 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
793 mthca_err(dev, "Couldn't map kernel access region, "
799 err = mthca_init_pd_table(dev);
801 mthca_err(dev, "Failed to initialize "
802 "protection domain table, aborting.\n");
806 err = mthca_init_mr_table(dev);
808 mthca_err(dev, "Failed to initialize "
809 "memory region table, aborting.\n");
810 goto err_pd_table_free;
813 err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
815 mthca_err(dev, "Failed to create driver PD, "
817 goto err_mr_table_free;
820 err = mthca_init_eq_table(dev);
822 mthca_err(dev, "Failed to initialize "
823 "event queue table, aborting.\n");
827 err = mthca_cmd_use_events(dev);
829 mthca_err(dev, "Failed to switch to event-driven "
830 "firmware commands, aborting.\n");
831 goto err_eq_table_free;
834 err = mthca_NOP(dev, &status);
836 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) {
837 mthca_warn(dev, "NOP command failed to generate interrupt "
839 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector);
840 mthca_warn(dev, "Trying again with MSI-X disabled.\n");
842 mthca_err(dev, "NOP command failed to generate interrupt "
843 "(IRQ %d), aborting.\n",
845 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
851 mthca_dbg(dev, "NOP command IRQ test passed\n");
853 err = mthca_init_cq_table(dev);
855 mthca_err(dev, "Failed to initialize "
856 "completion queue table, aborting.\n");
860 err = mthca_init_srq_table(dev);
862 mthca_err(dev, "Failed to initialize "
863 "shared receive queue table, aborting.\n");
864 goto err_cq_table_free;
867 err = mthca_init_qp_table(dev);
869 mthca_err(dev, "Failed to initialize "
870 "queue pair table, aborting.\n");
871 goto err_srq_table_free;
874 err = mthca_init_av_table(dev);
876 mthca_err(dev, "Failed to initialize "
877 "address vector table, aborting.\n");
878 goto err_qp_table_free;
881 err = mthca_init_mcg_table(dev);
883 mthca_err(dev, "Failed to initialize "
884 "multicast group table, aborting.\n");
885 goto err_av_table_free;
891 mthca_cleanup_av_table(dev);
894 mthca_cleanup_qp_table(dev);
897 mthca_cleanup_srq_table(dev);
900 mthca_cleanup_cq_table(dev);
903 mthca_cmd_use_polling(dev);
906 mthca_cleanup_eq_table(dev);
909 mthca_pd_free(dev, &dev->driver_pd);
912 mthca_cleanup_mr_table(dev);
915 mthca_cleanup_pd_table(dev);
921 mthca_uar_free(dev, &dev->driver_uar);
924 mthca_cleanup_uar_table(dev);
928 static int mthca_enable_msi_x(struct mthca_dev *mdev)
930 struct msix_entry entries[3];
933 entries[0].entry = 0;
934 entries[1].entry = 1;
935 entries[2].entry = 2;
937 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
940 mthca_info(mdev, "Only %d MSI-X vectors available, "
941 "not using MSI-X\n", err);
945 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
946 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
947 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
952 /* Types of supported HCA */
955 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
956 ARBEL_NATIVE, /* MT25208 with extended features */
960 #define MTHCA_FW_VER(major, minor, subminor) \
961 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
966 } mthca_hca_table[] = {
967 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0),
969 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200),
970 .flags = MTHCA_FLAG_PCIE },
971 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 3, 0),
972 .flags = MTHCA_FLAG_MEMFREE |
974 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0),
975 .flags = MTHCA_FLAG_MEMFREE |
977 MTHCA_FLAG_SINAI_OPT }
980 static int __mthca_init_one(struct pci_dev *pdev, int hca_type)
984 struct mthca_dev *mdev;
986 printk(KERN_INFO PFX "Initializing %s\n",
989 err = pci_enable_device(pdev);
991 dev_err(&pdev->dev, "Cannot enable PCI device, "
997 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
1000 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
1001 pci_resource_len(pdev, 0) != 1 << 20) {
1002 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
1004 goto err_disable_pdev;
1006 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1007 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1009 goto err_disable_pdev;
1011 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
1014 err = pci_request_regions(pdev, DRV_NAME);
1016 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
1018 goto err_disable_pdev;
1021 pci_set_master(pdev);
1023 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1025 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1026 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1028 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1032 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1034 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1035 "consistent PCI DMA mask.\n");
1036 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1038 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1044 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
1046 dev_err(&pdev->dev, "Device struct alloc failed, "
1054 mdev->mthca_flags = mthca_hca_table[hca_type].flags;
1056 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
1059 * Now reset the HCA before we touch the PCI capabilities or
1060 * attempt a firmware command, since a boot ROM may have left
1061 * the HCA in an undefined state.
1063 err = mthca_reset(mdev);
1065 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
1069 if (mthca_cmd_init(mdev)) {
1070 mthca_err(mdev, "Failed to init command interface, aborting.\n");
1074 err = mthca_tune_pci(mdev);
1078 err = mthca_init_hca(mdev);
1082 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) {
1083 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n",
1084 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
1085 (int) (mdev->fw_ver & 0xffff),
1086 (int) (mthca_hca_table[hca_type].latest_fw >> 32),
1087 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff,
1088 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff));
1089 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
1092 if (msi_x && !mthca_enable_msi_x(mdev))
1093 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
1095 err = mthca_setup_hca(mdev);
1096 if (err == -EBUSY && (mdev->mthca_flags & MTHCA_FLAG_MSI_X)) {
1097 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1098 pci_disable_msix(pdev);
1099 mdev->mthca_flags &= ~MTHCA_FLAG_MSI_X;
1101 err = mthca_setup_hca(mdev);
1107 err = mthca_register_device(mdev);
1111 err = mthca_create_agents(mdev);
1113 goto err_unregister;
1115 pci_set_drvdata(pdev, mdev);
1116 mdev->hca_type = hca_type;
1123 mthca_unregister_device(mdev);
1126 mthca_cleanup_mcg_table(mdev);
1127 mthca_cleanup_av_table(mdev);
1128 mthca_cleanup_qp_table(mdev);
1129 mthca_cleanup_srq_table(mdev);
1130 mthca_cleanup_cq_table(mdev);
1131 mthca_cmd_use_polling(mdev);
1132 mthca_cleanup_eq_table(mdev);
1134 mthca_pd_free(mdev, &mdev->driver_pd);
1136 mthca_cleanup_mr_table(mdev);
1137 mthca_cleanup_pd_table(mdev);
1138 mthca_cleanup_uar_table(mdev);
1141 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1142 pci_disable_msix(pdev);
1144 mthca_close_hca(mdev);
1147 mthca_cmd_cleanup(mdev);
1150 ib_dealloc_device(&mdev->ib_dev);
1153 pci_release_regions(pdev);
1156 pci_disable_device(pdev);
1157 pci_set_drvdata(pdev, NULL);
1161 static void __mthca_remove_one(struct pci_dev *pdev)
1163 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1168 mthca_free_agents(mdev);
1169 mthca_unregister_device(mdev);
1171 for (p = 1; p <= mdev->limits.num_ports; ++p)
1172 mthca_CLOSE_IB(mdev, p, &status);
1174 mthca_cleanup_mcg_table(mdev);
1175 mthca_cleanup_av_table(mdev);
1176 mthca_cleanup_qp_table(mdev);
1177 mthca_cleanup_srq_table(mdev);
1178 mthca_cleanup_cq_table(mdev);
1179 mthca_cmd_use_polling(mdev);
1180 mthca_cleanup_eq_table(mdev);
1182 mthca_pd_free(mdev, &mdev->driver_pd);
1184 mthca_cleanup_mr_table(mdev);
1185 mthca_cleanup_pd_table(mdev);
1188 mthca_uar_free(mdev, &mdev->driver_uar);
1189 mthca_cleanup_uar_table(mdev);
1190 mthca_close_hca(mdev);
1191 mthca_cmd_cleanup(mdev);
1193 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1194 pci_disable_msix(pdev);
1196 ib_dealloc_device(&mdev->ib_dev);
1197 pci_release_regions(pdev);
1198 pci_disable_device(pdev);
1199 pci_set_drvdata(pdev, NULL);
1203 int __mthca_restart_one(struct pci_dev *pdev)
1205 struct mthca_dev *mdev;
1208 mdev = pci_get_drvdata(pdev);
1211 hca_type = mdev->hca_type;
1212 __mthca_remove_one(pdev);
1213 return __mthca_init_one(pdev, hca_type);
1216 static int __devinit mthca_init_one(struct pci_dev *pdev,
1217 const struct pci_device_id *id)
1219 static int mthca_version_printed = 0;
1222 mutex_lock(&mthca_device_mutex);
1224 if (!mthca_version_printed) {
1225 printk(KERN_INFO "%s", mthca_version);
1226 ++mthca_version_printed;
1229 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
1230 printk(KERN_ERR PFX "%s has invalid driver data %jx\n",
1231 pci_name(pdev), (uintmax_t)id->driver_data);
1232 mutex_unlock(&mthca_device_mutex);
1236 ret = __mthca_init_one(pdev, id->driver_data);
1238 mutex_unlock(&mthca_device_mutex);
1243 static void __devexit mthca_remove_one(struct pci_dev *pdev)
1245 mutex_lock(&mthca_device_mutex);
1246 __mthca_remove_one(pdev);
1247 mutex_unlock(&mthca_device_mutex);
1250 static struct pci_device_id mthca_pci_table[] = {
1251 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1252 .driver_data = TAVOR },
1253 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1254 .driver_data = TAVOR },
1255 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1256 .driver_data = ARBEL_COMPAT },
1257 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1258 .driver_data = ARBEL_COMPAT },
1259 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1260 .driver_data = ARBEL_NATIVE },
1261 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1262 .driver_data = ARBEL_NATIVE },
1263 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
1264 .driver_data = SINAI },
1265 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
1266 .driver_data = SINAI },
1267 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1268 .driver_data = SINAI },
1269 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1270 .driver_data = SINAI },
1274 MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1276 static struct pci_driver mthca_driver = {
1278 .id_table = mthca_pci_table,
1279 .probe = mthca_init_one,
1280 .remove = __devexit_p(mthca_remove_one)
1283 static void __init __mthca_check_profile_val(const char *name, int *pval,
1286 /* value must be positive and power of 2 */
1287 int old_pval = *pval;
1290 *pval = pval_default;
1292 *pval = roundup_pow_of_two(old_pval);
1294 if (old_pval != *pval) {
1295 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n",
1297 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval);
1301 #define mthca_check_profile_val(name, default) \
1302 __mthca_check_profile_val(#name, &hca_profile.name, default)
1304 static void __init mthca_validate_profile(void)
1306 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP);
1307 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP);
1308 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ);
1309 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG);
1310 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT);
1311 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT);
1312 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV);
1313 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS);
1315 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) {
1316 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n",
1317 hca_profile.fmr_reserved_mtts);
1318 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n",
1319 hca_profile.num_mtt);
1320 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2;
1321 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n",
1322 hca_profile.fmr_reserved_mtts);
1324 if (log_mtts_per_seg == 0)
1325 log_mtts_per_seg = ilog2(MTHCA_MTT_SEG_SIZE / 8);
1326 if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 5)) {
1327 printk(KERN_WARNING PFX "bad log_mtts_per_seg (%d). Using default - %d\n",
1328 log_mtts_per_seg, ilog2(MTHCA_MTT_SEG_SIZE / 8));
1329 log_mtts_per_seg = ilog2(MTHCA_MTT_SEG_SIZE / 8);
1333 static int __init mthca_init(void)
1337 mthca_validate_profile();
1339 ret = mthca_catas_init();
1343 ret = pci_register_driver(&mthca_driver);
1345 mthca_catas_cleanup();
1352 static void __exit mthca_cleanup(void)
1354 pci_unregister_driver(&mthca_driver);
1355 mthca_catas_cleanup();
1358 module_init_order(mthca_init, SI_ORDER_MIDDLE);
1359 module_exit(mthca_cleanup);