2 * Copyright (c) 2007, 2014 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
37 #include <linux/bitops.h>
38 #include <linux/compiler.h>
39 #include <linux/list.h>
40 #include <linux/mutex.h>
41 #include <linux/kobject.h>
42 #include <linux/netdevice.h>
43 #include <linux/if_vlan.h>
44 #include <linux/if_ether.h>
45 #ifdef CONFIG_MLX4_EN_DCB
46 #include <linux/dcbnl.h>
49 #include <linux/mlx4/device.h>
50 #include <linux/mlx4/qp.h>
51 #include <linux/mlx4/cq.h>
52 #include <linux/mlx4/srq.h>
53 #include <linux/mlx4/doorbell.h>
54 #include <linux/mlx4/cmd.h>
56 #include <netinet/tcp_lro.h>
59 #include "mlx4_stats.h"
61 #define DRV_NAME "mlx4_en"
62 #define DRV_VERSION "2.1"
63 #define DRV_RELDATE __DATE__
65 #define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN)
72 #define MLX4_EN_PAGE_SHIFT 12
73 #define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT)
74 #define DEF_RX_RINGS 16
75 #define MAX_RX_RINGS 128
76 #define MIN_RX_RINGS 4
78 #define HEADROOM (2048 / TXBB_SIZE + 1)
79 #define STAMP_STRIDE 64
80 #define STAMP_DWORDS (STAMP_STRIDE / 4)
81 #define STAMP_SHIFT 31
82 #define STAMP_VAL 0x7fffffff
83 #define STATS_DELAY (HZ / 4)
84 #define SERVICE_TASK_DELAY (HZ / 4)
85 #define MAX_NUM_OF_FS_RULES 256
87 #define MLX4_EN_FILTER_HASH_SHIFT 4
88 #define MLX4_EN_FILTER_EXPIRY_QUOTA 60
90 #ifdef CONFIG_NET_RX_BUSY_POLL
91 #define LL_EXTENDED_STATS
94 /* vlan valid range */
95 #define VLAN_MIN_VALUE 1
96 #define VLAN_MAX_VALUE 4094
98 /* Typical TSO descriptor with 16 gather entries is 352 bytes... */
99 #define MAX_DESC_SIZE 512
100 #define MAX_DESC_TXBBS (MAX_DESC_SIZE / TXBB_SIZE)
103 * OS related constants and tunables
106 #define MLX4_EN_WATCHDOG_TIMEOUT (15 * HZ)
108 #define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(PAGE_SIZE)
109 #define MLX4_EN_ALLOC_ORDER get_order(MLX4_EN_ALLOC_SIZE)
111 enum mlx4_en_alloc_type {
112 MLX4_EN_ALLOC_NEW = 0,
113 MLX4_EN_ALLOC_REPLACEMENT = 1,
116 /* Receive fragment sizes; we use at most 3 fragments (for 9600 byte MTU
117 * and 4K allocations) */
118 #if MJUMPAGESIZE == 4096
121 FRAG_SZ1 = MJUMPAGESIZE,
122 FRAG_SZ2 = MJUMPAGESIZE,
124 #define MLX4_EN_MAX_RX_FRAGS 3
125 #elif MJUMPAGESIZE == 8192
128 FRAG_SZ1 = MJUMPAGESIZE,
130 #define MLX4_EN_MAX_RX_FRAGS 2
131 #elif MJUMPAGESIZE == 8192
133 #error "Unknown PAGE_SIZE"
136 /* Maximum ring sizes */
137 #define MLX4_EN_DEF_TX_QUEUE_SIZE 4096
139 /* Minimum packet number till arming the CQ */
140 #define MLX4_EN_MIN_RX_ARM 2048
141 #define MLX4_EN_MIN_TX_ARM 2048
143 /* Maximum ring sizes */
144 #define MLX4_EN_MAX_TX_SIZE 8192
145 #define MLX4_EN_MAX_RX_SIZE 8192
147 /* Minimum ring sizes */
148 #define MLX4_EN_MIN_RX_SIZE (4096 / TXBB_SIZE)
149 #define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE)
151 #define MLX4_EN_SMALL_PKT_SIZE 64
153 #define MLX4_EN_MAX_TX_RING_P_UP 32
154 #define MLX4_EN_NUM_UP 1
156 #define MAX_TX_RINGS (MLX4_EN_MAX_TX_RING_P_UP * \
159 #define MLX4_EN_DEF_TX_RING_SIZE 1024
160 #define MLX4_EN_DEF_RX_RING_SIZE 1024
162 /* Target number of bytes to coalesce with interrupt moderation */
163 #define MLX4_EN_RX_COAL_TARGET 0x20000
164 #define MLX4_EN_RX_COAL_TIME 0x10
166 #define MLX4_EN_TX_COAL_PKTS 64
167 #define MLX4_EN_TX_COAL_TIME 64
169 #define MLX4_EN_RX_RATE_LOW 400000
170 #define MLX4_EN_RX_COAL_TIME_LOW 0
171 #define MLX4_EN_RX_RATE_HIGH 450000
172 #define MLX4_EN_RX_COAL_TIME_HIGH 128
173 #define MLX4_EN_RX_SIZE_THRESH 1024
174 #define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH)
175 #define MLX4_EN_SAMPLE_INTERVAL 0
176 #define MLX4_EN_AVG_PKT_SMALL 256
178 #define MLX4_EN_AUTO_CONF 0xffff
180 #define MLX4_EN_DEF_RX_PAUSE 1
181 #define MLX4_EN_DEF_TX_PAUSE 1
183 /* Interval between successive polls in the Tx routine when polling is used
184 instead of interrupts (in per-core Tx rings) - should be power of 2 */
185 #define MLX4_EN_TX_POLL_MODER 16
186 #define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4)
188 #define MLX4_EN_64_ALIGN (64 - NET_SKB_PAD)
189 #define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN)
190 #define HEADER_COPY_SIZE (128)
191 #define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETHER_HDR_LEN)
193 #define MLX4_EN_MIN_MTU 46
194 #define ETH_BCAST 0xffffffffffffULL
196 #define MLX4_EN_LOOPBACK_RETRIES 5
197 #define MLX4_EN_LOOPBACK_TIMEOUT 100
199 #ifdef MLX4_EN_PERF_STAT
200 /* Number of samples to 'average' */
202 #define AVG_FACTOR 1024
204 #define INC_PERF_COUNTER(cnt) (++(cnt))
205 #define ADD_PERF_COUNTER(cnt, add) ((cnt) += (add))
206 #define AVG_PERF_COUNTER(cnt, sample) \
207 ((cnt) = ((cnt) * (AVG_SIZE - 1) + (sample) * AVG_FACTOR) / AVG_SIZE)
208 #define GET_PERF_COUNTER(cnt) (cnt)
209 #define GET_AVG_PERF_COUNTER(cnt) ((cnt) / AVG_FACTOR)
213 #define INC_PERF_COUNTER(cnt) do {} while (0)
214 #define ADD_PERF_COUNTER(cnt, add) do {} while (0)
215 #define AVG_PERF_COUNTER(cnt, sample) do {} while (0)
216 #define GET_PERF_COUNTER(cnt) (0)
217 #define GET_AVG_PERF_COUNTER(cnt) (0)
218 #endif /* MLX4_EN_PERF_STAT */
233 #define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x))
234 #define XNOR(x, y) (!(x) == !(y))
235 #define ILLEGAL_MAC(addr) (addr == 0xffffffffffffULL || addr == 0x0)
237 struct mlx4_en_tx_info {
251 #define MLX4_EN_BIT_DESC_OWN 0x80000000
252 #define CTRL_SIZE sizeof(struct mlx4_wqe_ctrl_seg)
253 #define MLX4_EN_MEMTYPE_PAD 0x100
254 #define DS_SIZE sizeof(struct mlx4_wqe_data_seg)
257 struct mlx4_en_tx_desc {
258 struct mlx4_wqe_ctrl_seg ctrl;
260 struct mlx4_wqe_data_seg data; /* at least one data segment */
261 struct mlx4_wqe_lso_seg lso;
262 struct mlx4_wqe_inline_seg inl;
266 #define MLX4_EN_USE_SRQ 0x01000000
268 #define MLX4_EN_TX_BUDGET 64*4 //Compensate for no NAPI in freeBSD - might need some fine tunning in the future.
269 #define MLX4_EN_RX_BUDGET 64
271 #define MLX4_EN_CX3_LOW_ID 0x1000
272 #define MLX4_EN_CX3_HIGH_ID 0x1005
274 struct mlx4_en_tx_ring {
276 struct mlx4_hwq_resources wqres;
277 u32 size ; /* number of TXBBs */
280 u16 cqn; /* index of port CQ associated with this ring */
288 struct mlx4_en_tx_info *tx_info;
291 cpuset_t affinity_mask;
295 struct mlx4_qp_context context;
297 enum mlx4_qp_state qp_state;
298 struct mlx4_srq dummy;
300 unsigned long packets;
301 unsigned long tx_csum;
302 unsigned long queue_stopped;
303 unsigned long wake_queue;
306 struct netdev_queue *tx_queue;
307 int hwtstamp_tx_type;
308 spinlock_t comp_lock;
314 struct mlx4_en_rx_desc {
315 /* actual number of entries depends on rx ring stride */
316 struct mlx4_wqe_data_seg data[0];
319 struct mlx4_en_rx_buf {
322 unsigned int page_offset;
325 struct mlx4_en_rx_ring {
326 struct mlx4_hwq_resources wqres;
327 u32 size ; /* number of Rx descs*/
332 u16 cqn; /* index of port CQ associated with this ring */
344 unsigned long errors;
346 unsigned long packets;
347 #ifdef LL_EXTENDED_STATS
348 unsigned long yields;
349 unsigned long misses;
350 unsigned long cleaned;
352 unsigned long csum_ok;
353 unsigned long csum_none;
354 int hwtstamp_rx_filter;
359 static inline int mlx4_en_can_lro(__be16 status)
361 const __be16 status_all = cpu_to_be16(
362 MLX4_CQE_STATUS_IPV4 |
363 MLX4_CQE_STATUS_IPV4F |
364 MLX4_CQE_STATUS_IPV6 |
365 MLX4_CQE_STATUS_IPV4OPT |
366 MLX4_CQE_STATUS_TCP |
367 MLX4_CQE_STATUS_UDP |
368 MLX4_CQE_STATUS_IPOK);
369 const __be16 status_ipv4_ipok_tcp = cpu_to_be16(
370 MLX4_CQE_STATUS_IPV4 |
371 MLX4_CQE_STATUS_IPOK |
372 MLX4_CQE_STATUS_TCP);
373 const __be16 status_ipv6_ipok_tcp = cpu_to_be16(
374 MLX4_CQE_STATUS_IPV6 |
375 MLX4_CQE_STATUS_IPOK |
376 MLX4_CQE_STATUS_TCP);
378 status &= status_all;
379 return (status == status_ipv4_ipok_tcp ||
380 status == status_ipv6_ipok_tcp);
385 struct mlx4_hwq_resources wqres;
388 struct net_device *dev;
389 /* Per-core Tx cq processing support */
390 struct timer_list timer;
397 struct mlx4_cqe *buf;
399 struct taskqueue *tq;
400 #define MLX4_EN_OPCODE_ERROR 0x1e
404 #ifdef CONFIG_NET_RX_BUSY_POLL
406 #define MLX4_EN_CQ_STATEIDLE 0
407 #define MLX4_EN_CQ_STATENAPI 1 /* NAPI owns this CQ */
408 #define MLX4_EN_CQ_STATEPOLL 2 /* poll owns this CQ */
409 #define MLX4_CQ_LOCKED (MLX4_EN_CQ_STATENAPI | MLX4_EN_CQ_STATEPOLL)
410 #define MLX4_EN_CQ_STATENAPI_YIELD 4 /* NAPI yielded this CQ */
411 #define MLX4_EN_CQ_STATEPOLL_YIELD 8 /* poll yielded this CQ */
412 #define CQ_YIELD (MLX4_EN_CQ_STATENAPI_YIELD | MLX4_EN_CQ_STATEPOLL_YIELD)
413 #define CQ_USER_PEND (MLX4_EN_CQ_STATEPOLL | MLX4_EN_CQ_STATEPOLL_YIELD)
414 spinlock_t poll_lock; /* protects from LLS/napi conflicts */
415 #endif /* CONFIG_NET_RX_BUSY_POLL */
418 struct mlx4_en_port_profile {
431 struct mlx4_en_profile {
438 u8 num_tx_rings_p_up;
439 struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1];
443 struct mlx4_dev *dev;
444 struct pci_dev *pdev;
445 struct mutex state_lock;
446 struct net_device *pndev[MLX4_MAX_PORTS + 1];
449 struct mlx4_en_profile profile;
451 struct workqueue_struct *workqueue;
452 struct device *dma_device;
453 void __iomem *uar_map;
454 struct mlx4_uar priv_uar;
458 u8 mac_removed[MLX4_MAX_PORTS + 1];
459 unsigned long last_overflow_check;
460 unsigned long overflow_period;
464 struct mlx4_en_rss_map {
466 struct mlx4_qp qps[MAX_RX_RINGS];
467 enum mlx4_qp_state state[MAX_RX_RINGS];
468 struct mlx4_qp indir_qp;
469 enum mlx4_qp_state indir_state;
472 struct mlx4_en_port_state {
479 enum mlx4_en_mclist_act {
485 struct mlx4_en_mc_list {
486 struct list_head list;
487 enum mlx4_en_mclist_act action;
492 #ifdef CONFIG_MLX4_EN_DCB
493 /* Minimal TC BW - setting to 0 will block traffic */
494 #define MLX4_EN_BW_MIN 1
495 #define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */
497 #define MLX4_EN_TC_ETS 7
503 MLX4_EN_FLAG_PROMISC = (1 << 0),
504 MLX4_EN_FLAG_MC_PROMISC = (1 << 1),
505 /* whether we need to enable hardware loopback by putting dmac
508 MLX4_EN_FLAG_ENABLE_HW_LOOPBACK = (1 << 2),
509 /* whether we need to drop packets that hardware loopback-ed */
510 MLX4_EN_FLAG_RX_FILTER_NEEDED = (1 << 3),
511 MLX4_EN_FLAG_FORCE_PROMISC = (1 << 4),
512 #ifdef CONFIG_MLX4_EN_DCB
513 MLX4_EN_FLAG_DCB_ENABLED = (1 << 5)
517 #define MLX4_EN_MAC_HASH_SIZE (1 << BITS_PER_BYTE)
518 #define MLX4_EN_MAC_HASH_IDX 5
522 struct mlx4_dev *dev;
527 struct mlx4_en_frag_info {
529 u16 frag_prefix_size;
533 struct mlx4_en_priv {
534 struct mlx4_en_dev *mdev;
535 struct mlx4_en_port_profile *prof;
536 struct net_device *dev;
537 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
538 struct mlx4_en_port_state port_state;
539 spinlock_t stats_lock;
540 /* To allow rules removal while port is going down */
541 struct list_head ethtool_list;
543 unsigned long last_moder_packets[MAX_RX_RINGS];
544 unsigned long last_moder_tx_packets;
545 unsigned long last_moder_bytes[MAX_RX_RINGS];
546 unsigned long last_moder_jiffies;
547 int last_moder_time[MAX_RX_RINGS];
557 u32 adaptive_rx_coal;
560 u32 validate_loopback;
562 struct mlx4_hwq_resources res;
570 unsigned char current_mac[ETH_ALEN + 2];
577 struct mlx4_en_rss_map rss_map;
580 u8 num_tx_rings_p_up;
584 struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS];
591 struct mlx4_en_tx_ring **tx_ring;
592 struct mlx4_en_rx_ring *rx_ring[MAX_RX_RINGS];
593 struct mlx4_en_cq **tx_cq;
594 struct mlx4_en_cq *rx_cq[MAX_RX_RINGS];
595 struct mlx4_qp drop_qp;
596 struct work_struct rx_mode_task;
597 struct work_struct watchdog_task;
598 struct work_struct linkstate_task;
599 struct delayed_work stats_task;
600 struct delayed_work service_task;
601 struct mlx4_en_perf_stats pstats;
602 struct mlx4_en_pkt_stats pkstats;
603 struct mlx4_en_flow_stats flowstats[MLX4_NUM_PRIORITIES];
604 struct mlx4_en_port_stats port_stats;
605 struct mlx4_en_vport_stats vport_stats;
606 struct mlx4_en_vf_stats vf_stats;
607 DECLARE_BITMAP(stats_bitmap, NUM_ALL_STATS);
608 struct list_head mc_list;
609 struct list_head curr_list;
611 struct mlx4_en_stat_out_mbox hw_stats;
615 struct dentry *dev_root;
617 eventhandler_tag vlan_attach;
618 eventhandler_tag vlan_detach;
619 struct callout watchdog_timer;
620 struct ifmedia media;
621 volatile int blocked;
622 struct sysctl_oid *sysctl;
623 struct sysctl_ctx_list conf_ctx;
624 struct sysctl_ctx_list stat_ctx;
625 #define MLX4_EN_MAC_HASH_IDX 5
626 struct hlist_head mac_hash[MLX4_EN_MAC_HASH_SIZE];
628 #ifdef CONFIG_MLX4_EN_DCB
630 u16 maxrate[IEEE_8021QAZ_MAX_TCS];
633 #ifdef CONFIG_RFS_ACCEL
634 spinlock_t filters_lock;
636 struct list_head filters;
637 struct hlist_head filter_hash[1 << MLX4_EN_FILTER_HASH_SHIFT];
639 struct en_port *vf_ports[MLX4_MAX_NUM_VF];
640 unsigned long last_ifq_jiffies;
641 u64 if_counters_rx_errors;
642 u64 if_counters_rx_no_buffer;
647 MLX4_EN_WOL_MAGIC = (1ULL << 61),
648 MLX4_EN_WOL_ENABLED = (1ULL << 62),
651 struct mlx4_mac_entry {
652 struct hlist_node hlist;
653 unsigned char mac[ETH_ALEN + 2];
657 #ifdef CONFIG_NET_RX_BUSY_POLL
658 static inline void mlx4_en_cq_init_lock(struct mlx4_en_cq *cq)
660 spin_lock_init(&cq->poll_lock);
661 cq->state = MLX4_EN_CQ_STATEIDLE;
664 /* called from the device poll rutine to get ownership of a cq */
665 static inline bool mlx4_en_cq_lock_napi(struct mlx4_en_cq *cq)
668 spin_lock(&cq->poll_lock);
669 if (cq->state & MLX4_CQ_LOCKED) {
670 WARN_ON(cq->state & MLX4_EN_CQ_STATENAPI);
671 cq->state |= MLX4_EN_CQ_STATENAPI_YIELD;
674 /* we don't care if someone yielded */
675 cq->state = MLX4_EN_CQ_STATENAPI;
676 spin_unlock(&cq->poll_lock);
680 /* returns true is someone tried to get the cq while napi had it */
681 static inline bool mlx4_en_cq_unlock_napi(struct mlx4_en_cq *cq)
684 spin_lock(&cq->poll_lock);
685 WARN_ON(cq->state & (MLX4_EN_CQ_STATEPOLL |
686 MLX4_EN_CQ_STATENAPI_YIELD));
688 if (cq->state & MLX4_EN_CQ_STATEPOLL_YIELD)
690 cq->state = MLX4_EN_CQ_STATEIDLE;
691 spin_unlock(&cq->poll_lock);
695 /* called from mlx4_en_low_latency_poll() */
696 static inline bool mlx4_en_cq_lock_poll(struct mlx4_en_cq *cq)
699 spin_lock_bh(&cq->poll_lock);
700 if ((cq->state & MLX4_CQ_LOCKED)) {
701 struct net_device *dev = cq->dev;
702 struct mlx4_en_priv *priv = netdev_priv(dev);
703 struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring];
705 cq->state |= MLX4_EN_CQ_STATEPOLL_YIELD;
707 #ifdef LL_EXTENDED_STATS
711 /* preserve yield marks */
712 cq->state |= MLX4_EN_CQ_STATEPOLL;
713 spin_unlock_bh(&cq->poll_lock);
717 /* returns true if someone tried to get the cq while it was locked */
718 static inline bool mlx4_en_cq_unlock_poll(struct mlx4_en_cq *cq)
721 spin_lock_bh(&cq->poll_lock);
722 WARN_ON(cq->state & (MLX4_EN_CQ_STATENAPI));
724 if (cq->state & MLX4_EN_CQ_STATEPOLL_YIELD)
726 cq->state = MLX4_EN_CQ_STATEIDLE;
727 spin_unlock_bh(&cq->poll_lock);
731 /* true if a socket is polling, even if it did not get the lock */
732 static inline bool mlx4_en_cq_ll_polling(struct mlx4_en_cq *cq)
734 WARN_ON(!(cq->state & MLX4_CQ_LOCKED));
735 return cq->state & CQ_USER_PEND;
738 static inline void mlx4_en_cq_init_lock(struct mlx4_en_cq *cq)
742 static inline bool mlx4_en_cq_lock_napi(struct mlx4_en_cq *cq)
747 static inline bool mlx4_en_cq_unlock_napi(struct mlx4_en_cq *cq)
752 static inline bool mlx4_en_cq_lock_poll(struct mlx4_en_cq *cq)
757 static inline bool mlx4_en_cq_unlock_poll(struct mlx4_en_cq *cq)
762 static inline bool mlx4_en_cq_ll_polling(struct mlx4_en_cq *cq)
766 #endif /* CONFIG_NET_RX_BUSY_POLL */
768 #define MLX4_EN_WOL_DO_MODIFY (1ULL << 63)
770 void mlx4_en_destroy_netdev(struct net_device *dev);
771 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
772 struct mlx4_en_port_profile *prof);
774 int mlx4_en_start_port(struct net_device *dev);
775 void mlx4_en_stop_port(struct net_device *dev);
777 void mlx4_en_free_resources(struct mlx4_en_priv *priv);
778 int mlx4_en_alloc_resources(struct mlx4_en_priv *priv);
780 int mlx4_en_pre_config(struct mlx4_en_priv *priv);
781 int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq,
782 int entries, int ring, enum cq_type mode, int node);
783 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq);
784 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
786 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
787 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
788 int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
790 void mlx4_en_tx_irq(struct mlx4_cq *mcq);
791 u16 mlx4_en_select_queue(struct net_device *dev, struct mbuf *mb);
793 int mlx4_en_transmit(struct ifnet *dev, struct mbuf *m);
794 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
795 struct mlx4_en_tx_ring **pring,
796 u32 size, u16 stride, int node, int queue_idx);
797 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
798 struct mlx4_en_tx_ring **pring);
799 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
800 struct mlx4_en_tx_ring *ring,
801 int cq, int user_prio);
802 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
803 struct mlx4_en_tx_ring *ring);
804 void mlx4_en_qflush(struct ifnet *dev);
806 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
807 struct mlx4_en_rx_ring **pring,
809 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
810 struct mlx4_en_rx_ring **pring,
811 u32 size, u16 stride);
812 void mlx4_en_tx_que(void *context, int pending);
813 void mlx4_en_rx_que(void *context, int pending);
814 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv);
815 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
816 struct mlx4_en_rx_ring *ring);
817 int mlx4_en_process_rx_cq(struct net_device *dev,
818 struct mlx4_en_cq *cq,
820 void mlx4_en_poll_tx_cq(unsigned long data);
821 void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
822 int is_tx, int rss, int qpn, int cqn, int user_prio,
823 struct mlx4_qp_context *context);
824 void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event);
825 int mlx4_en_map_buffer(struct mlx4_buf *buf);
826 void mlx4_en_unmap_buffer(struct mlx4_buf *buf);
827 void mlx4_en_calc_rx_buf(struct net_device *dev);
829 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv);
830 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv);
831 int mlx4_en_create_drop_qp(struct mlx4_en_priv *priv);
832 void mlx4_en_destroy_drop_qp(struct mlx4_en_priv *priv);
833 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring);
834 void mlx4_en_rx_irq(struct mlx4_cq *mcq);
836 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode);
837 int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv);
839 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset);
840 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);
841 int mlx4_en_get_vport_stats(struct mlx4_en_dev *mdev, u8 port);
842 void mlx4_en_create_debug_files(struct mlx4_en_priv *priv);
843 void mlx4_en_delete_debug_files(struct mlx4_en_priv *priv);
844 int mlx4_en_register_debugfs(void);
845 void mlx4_en_unregister_debugfs(void);
847 #ifdef CONFIG_MLX4_EN_DCB
848 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops;
849 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_pfc_ops;
852 int mlx4_en_setup_tc(struct net_device *dev, u8 up);
854 #ifdef CONFIG_RFS_ACCEL
855 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
856 struct mlx4_en_rx_ring *rx_ring);
859 #define MLX4_EN_NUM_SELF_TEST 5
860 void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);
861 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev);
864 * Functions for time stamping
866 #define SKBTX_HW_TSTAMP (1 << 0)
867 #define SKBTX_IN_PROGRESS (1 << 2)
869 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe);
871 /* Functions for caching and restoring statistics */
872 int mlx4_en_get_sset_count(struct net_device *dev, int sset);
873 void mlx4_en_restore_ethtool_stats(struct mlx4_en_priv *priv,
879 extern const struct ethtool_ops mlx4_en_ethtool_ops;
882 * Defines for link speed - needed by selftest
884 #define MLX4_EN_LINK_SPEED_1G 1000
885 #define MLX4_EN_LINK_SPEED_10G 10000
886 #define MLX4_EN_LINK_SPEED_40G 40000
889 NETIF_MSG_DRV = 0x0001,
890 NETIF_MSG_PROBE = 0x0002,
891 NETIF_MSG_LINK = 0x0004,
892 NETIF_MSG_TIMER = 0x0008,
893 NETIF_MSG_IFDOWN = 0x0010,
894 NETIF_MSG_IFUP = 0x0020,
895 NETIF_MSG_RX_ERR = 0x0040,
896 NETIF_MSG_TX_ERR = 0x0080,
897 NETIF_MSG_TX_QUEUED = 0x0100,
898 NETIF_MSG_INTR = 0x0200,
899 NETIF_MSG_TX_DONE = 0x0400,
900 NETIF_MSG_RX_STATUS = 0x0800,
901 NETIF_MSG_PKTDATA = 0x1000,
902 NETIF_MSG_HW = 0x2000,
903 NETIF_MSG_WOL = 0x4000,
908 * printk / logging functions
911 #define en_print(level, priv, format, arg...) \
913 if ((priv)->registered) \
914 printk(level "%s: %s: " format, DRV_NAME, \
915 (priv->dev)->if_xname, ## arg); \
917 printk(level "%s: %s: Port %d: " format, \
918 DRV_NAME, dev_name(&priv->mdev->pdev->dev), \
919 (priv)->port, ## arg); \
923 #define en_dbg(mlevel, priv, format, arg...) \
925 if (NETIF_MSG_##mlevel & priv->msg_enable) \
926 en_print(KERN_DEBUG, priv, format, ##arg); \
928 #define en_warn(priv, format, arg...) \
929 en_print(KERN_WARNING, priv, format, ##arg)
930 #define en_err(priv, format, arg...) \
931 en_print(KERN_ERR, priv, format, ##arg)
932 #define en_info(priv, format, arg...) \
933 en_print(KERN_INFO, priv, format, ## arg)
935 #define mlx4_err(mdev, format, arg...) \
936 pr_err("%s %s: " format, DRV_NAME, \
937 dev_name(&mdev->pdev->dev), ##arg)
938 #define mlx4_info(mdev, format, arg...) \
939 pr_info("%s %s: " format, DRV_NAME, \
940 dev_name(&mdev->pdev->dev), ##arg)
941 #define mlx4_warn(mdev, format, arg...) \
942 pr_warning("%s %s: " format, DRV_NAME, \
943 dev_name(&mdev->pdev->dev), ##arg)