2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000, BSDi
5 * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/libkern.h>
37 #include <sys/module.h>
38 #include <sys/pciio.h>
40 #include <dev/ofw/ofw_bus.h>
41 #include <dev/ofw/ofw_bus_subr.h>
42 #include <dev/ofw/ofw_pci.h>
43 #include <dev/ofw/openfirm.h>
45 #include <machine/bus.h>
46 #include <machine/intr_machdep.h>
47 #include <machine/resource.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pci_private.h>
53 #include "ofw_pcibus.h"
57 typedef uint32_t ofw_pci_intr_t;
60 static device_probe_t ofw_pcibus_probe;
61 static device_attach_t ofw_pcibus_attach;
62 static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
63 static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo;
64 static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child,
65 char *buf, size_t buflen);
67 static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno);
68 static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno);
70 static device_method_t ofw_pcibus_methods[] = {
71 /* Device interface */
72 DEVMETHOD(device_probe, ofw_pcibus_probe),
73 DEVMETHOD(device_attach, ofw_pcibus_attach),
76 DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method),
79 DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt),
81 /* ofw_bus interface */
82 DEVMETHOD(ofw_bus_get_devinfo, ofw_pcibus_get_devinfo),
83 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
84 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
85 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
86 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
87 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
92 static devclass_t pci_devclass;
94 DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods,
95 sizeof(struct pci_softc), pci_driver);
96 DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0);
97 MODULE_VERSION(ofw_pcibus, 1);
98 MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1);
100 static int ofw_devices_only = 0;
101 TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only);
104 ofw_pcibus_probe(device_t dev)
107 if (ofw_bus_get_node(dev) == -1)
109 device_set_desc(dev, "OFW PCI bus");
111 return (BUS_PROBE_DEFAULT);
115 ofw_pcibus_attach(device_t dev)
120 error = pci_attach_common(dev);
123 domain = pcib_get_domain(dev);
124 busno = pcib_get_bus(dev);
127 * Attach those children represented in the device tree.
130 ofw_pcibus_enum_devtree(dev, domain, busno);
133 * We now attach any laggard devices. FDT, for instance, allows
134 * the device tree to enumerate only some PCI devices. Apple's
135 * OF device tree on some Grackle-based hardware can also miss
136 * functions on multi-function cards.
139 if (!ofw_devices_only)
140 ofw_pcibus_enum_bus(dev, domain, busno);
142 return (bus_generic_attach(dev));
146 ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
149 struct ofw_pci_register pcir;
150 struct ofw_pcibus_devinfo *dinfo;
151 phandle_t node, child;
155 pcib = device_get_parent(dev);
156 node = ofw_bus_get_node(dev);
158 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
159 if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1)
161 slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
162 func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
164 /* Some OFW device trees contain dupes. */
165 if (pci_find_dbsf(domain, busno, slot, func) != NULL)
169 * The preset in the intline register is usually bogus. Reset
170 * it such that the PCI code will reroute the interrupt if
174 intline = PCI_INVALID_IRQ;
175 if (OF_getproplen(child, "interrupts") > 0)
177 PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
181 * Now set up the PCI and OFW bus layer devinfo and add it
185 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib,
186 domain, busno, slot, func, sizeof(*dinfo));
189 if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
191 pci_freecfg((struct pci_devinfo *)dinfo);
194 dinfo->opd_dma_tag = NULL;
195 pci_add_child(dev, (struct pci_devinfo *)dinfo);
198 * Some devices don't have an intpin set, but do have
199 * interrupts. These are fully specified, and set in the
200 * interrupts property, so add that value to the device's
203 if (dinfo->opd_dinfo.cfg.intpin == 0)
204 ofw_bus_intr_to_rl(dev, child, &dinfo->opd_dinfo.resources);
209 * The following is an almost exact clone of pci_add_children(), with the
210 * addition that it (a) will not add children that have already been added,
211 * and (b) will set up the OFW devinfo to point to invalid values. This is
212 * to handle non-enumerated PCI children as exist in FDT and on the second
213 * function of the Rage 128 in my Blue & White G3.
217 ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
220 struct ofw_pcibus_devinfo *dinfo;
222 int s, f, pcifunchigh;
225 pcib = device_get_parent(dev);
227 maxslots = PCIB_MAXSLOTS(pcib);
228 for (s = 0; s <= maxslots; s++) {
232 hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
233 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
235 if (hdrtype & PCIM_MFDEV)
236 pcifunchigh = PCI_FUNCMAX;
237 for (f = 0; f <= pcifunchigh; f++) {
238 /* Filter devices we have already added */
239 if (pci_find_dbsf(domain, busno, s, f) != NULL)
242 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(
243 pcib, domain, busno, s, f, sizeof(*dinfo));
247 dinfo->opd_dma_tag = NULL;
248 dinfo->opd_obdinfo.obd_node = -1;
250 dinfo->opd_obdinfo.obd_name = NULL;
251 dinfo->opd_obdinfo.obd_compat = NULL;
252 dinfo->opd_obdinfo.obd_type = NULL;
253 dinfo->opd_obdinfo.obd_model = NULL;
256 * For non OFW-devices, don't believe 0
259 if (dinfo->opd_dinfo.cfg.intline == 0) {
260 dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ;
261 PCIB_WRITE_CONFIG(pcib, busno, s, f,
262 PCIR_INTLINE, PCI_INVALID_IRQ, 1);
265 pci_add_child(dev, (struct pci_devinfo *)dinfo);
271 ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
274 pci_child_pnpinfo_str_method(cbdev, child, buf, buflen);
276 if (ofw_bus_get_node(child) != -1) {
277 strlcat(buf, " ", buflen); /* Separate info */
278 ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen);
285 ofw_pcibus_assign_interrupt(device_t dev, device_t child)
287 ofw_pci_intr_t intr[2];
288 phandle_t node, iparent;
291 node = ofw_bus_get_node(child);
294 /* Non-firmware enumerated child, use standard routing */
296 intr[0] = pci_get_intpin(child);
297 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
302 * Try to determine the node's interrupt parent so we know which
307 if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) < 0)
311 OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells",
312 &icells, sizeof(icells));
315 * Any AAPL,interrupts property gets priority and is
316 * fully specified (i.e. does not need routing)
319 isz = OF_getprop(node, "AAPL,interrupts", intr, sizeof(intr));
320 if (isz == sizeof(intr[0])*icells)
321 return ((iparent == -1) ? intr[0] : ofw_bus_map_intr(dev,
322 iparent, icells, intr));
324 isz = OF_getprop(node, "interrupts", intr, sizeof(intr));
325 if (isz == sizeof(intr[0])*icells) {
327 intr[0] = ofw_bus_map_intr(dev, iparent, icells, intr);
329 /* No property: our best guess is the intpin. */
330 intr[0] = pci_get_intpin(child);
334 * If we got intr from a property, it may or may not be an intpin.
335 * For on-board devices, it frequently is not, and is completely out
336 * of the valid intpin range. For PCI slots, it hopefully is,
337 * otherwise we will have trouble interfacing with non-OFW buses
339 * Since we cannot tell which it is without violating layering, we
340 * will always use the route_interrupt method, and treat exceptions
341 * on the level they become apparent.
343 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr[0]));
346 static const struct ofw_bus_devinfo *
347 ofw_pcibus_get_devinfo(device_t bus, device_t dev)
349 struct ofw_pcibus_devinfo *dinfo;
351 dinfo = device_get_ivars(dev);
352 return (&dinfo->opd_obdinfo);