2 * Copyright (c) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com>
3 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
8 * NASA Ames Research Center.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
45 #include <sys/param.h>
46 #include <sys/systm.h>
52 #include <machine/bus.h>
53 #include <machine/pio.h>
54 #include <machine/md_var.h>
56 #define TODO panic("%s: not implemented", __func__)
58 #define MAX_EARLYBOOT_MAPPINGS 6
65 } earlyboot_mappings[MAX_EARLYBOOT_MAPPINGS];
66 static int earlyboot_map_idx = 0;
68 void bs_remap_earlyboot(void);
70 static __inline void *
71 __ppc_ba(bus_space_handle_t bsh, bus_size_t ofs)
73 return ((void *)(bsh + ofs));
77 bs_gen_map(bus_addr_t addr, bus_size_t size, int flags,
78 bus_space_handle_t *bshp)
83 * Record what we did if we haven't enabled the MMU yet. We
84 * will need to remap it as soon as the MMU comes up.
86 if (!pmap_bootstrapped) {
87 KASSERT(earlyboot_map_idx < MAX_EARLYBOOT_MAPPINGS,
88 ("%s: too many early boot mapping requests", __func__));
89 earlyboot_mappings[earlyboot_map_idx].addr = addr;
90 earlyboot_mappings[earlyboot_map_idx].virt =
91 pmap_early_io_map(addr, size);
92 earlyboot_mappings[earlyboot_map_idx].size = size;
93 earlyboot_mappings[earlyboot_map_idx].flags = flags;
94 *bshp = earlyboot_mappings[earlyboot_map_idx].virt;
97 ma = VM_MEMATTR_DEFAULT;
99 case BUS_SPACE_MAP_CACHEABLE:
100 ma = VM_MEMATTR_CACHEABLE;
102 case BUS_SPACE_MAP_PREFETCHABLE:
103 ma = VM_MEMATTR_PREFETCHABLE;
106 *bshp = (bus_space_handle_t)pmap_mapdev_attr(addr, size, ma);
113 bs_remap_earlyboot(void)
116 vm_offset_t pa, spa, va;
119 for (i = 0; i < earlyboot_map_idx; i++) {
120 spa = earlyboot_mappings[i].addr;
121 if (spa == earlyboot_mappings[i].virt &&
122 pmap_dev_direct_mapped(spa, earlyboot_mappings[i].size) == 0)
125 ma = VM_MEMATTR_DEFAULT;
126 switch (earlyboot_mappings[i].flags) {
127 case BUS_SPACE_MAP_CACHEABLE:
128 ma = VM_MEMATTR_CACHEABLE;
130 case BUS_SPACE_MAP_PREFETCHABLE:
131 ma = VM_MEMATTR_PREFETCHABLE;
135 pa = trunc_page(spa);
136 va = trunc_page(earlyboot_mappings[i].virt);
137 while (pa < spa + earlyboot_mappings[i].size) {
138 pmap_kenter_attr(va, pa, ma);
146 bs_gen_unmap(bus_size_t size __unused)
151 bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs,
152 bus_size_t size __unused, bus_space_handle_t *nbshp)
159 bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused,
160 bus_size_t size __unused, bus_size_t alignment __unused,
161 bus_size_t boundary __unused, int flags __unused,
162 bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused)
168 bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused)
174 bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused,
175 bus_size_t size __unused, int flags __unused)
182 * Big-endian access functions
185 bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
187 volatile uint8_t *addr;
190 addr = __ppc_ba(bsh, ofs);
193 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
198 bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
200 volatile uint16_t *addr;
203 addr = __ppc_ba(bsh, ofs);
206 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
211 bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
213 volatile uint32_t *addr;
216 addr = __ppc_ba(bsh, ofs);
219 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
224 bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
226 volatile uint64_t *addr;
229 addr = __ppc_ba(bsh, ofs);
236 bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
238 ins8(__ppc_ba(bsh, ofs), addr, cnt);
242 bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
244 ins16(__ppc_ba(bsh, ofs), addr, cnt);
248 bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
250 ins32(__ppc_ba(bsh, ofs), addr, cnt);
254 bs_be_rm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
256 ins64(__ppc_ba(bsh, ofs), addr, cnt);
260 bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
262 volatile uint8_t *s = __ppc_ba(bsh, ofs);
270 bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
272 volatile uint16_t *s = __ppc_ba(bsh, ofs);
280 bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
282 volatile uint32_t *s = __ppc_ba(bsh, ofs);
290 bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
292 volatile uint64_t *s = __ppc_ba(bsh, ofs);
300 bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
302 volatile uint8_t *addr;
304 addr = __ppc_ba(bsh, ofs);
307 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
311 bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
313 volatile uint16_t *addr;
315 addr = __ppc_ba(bsh, ofs);
318 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
322 bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
324 volatile uint32_t *addr;
326 addr = __ppc_ba(bsh, ofs);
329 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
333 bs_be_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
335 volatile uint64_t *addr;
337 addr = __ppc_ba(bsh, ofs);
343 bs_be_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
346 outsb(__ppc_ba(bsh, ofs), addr, cnt);
350 bs_be_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
353 outsw(__ppc_ba(bsh, ofs), addr, cnt);
357 bs_be_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
360 outsl(__ppc_ba(bsh, ofs), addr, cnt);
364 bs_be_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
367 outsll(__ppc_ba(bsh, ofs), addr, cnt);
371 bs_be_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
374 volatile uint8_t *d = __ppc_ba(bsh, ofs);
382 bs_be_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
385 volatile uint16_t *d = __ppc_ba(bsh, ofs);
393 bs_be_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
396 volatile uint32_t *d = __ppc_ba(bsh, ofs);
404 bs_be_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
407 volatile uint64_t *d = __ppc_ba(bsh, ofs);
415 bs_be_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
417 volatile uint8_t *d = __ppc_ba(bsh, ofs);
425 bs_be_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
427 volatile uint16_t *d = __ppc_ba(bsh, ofs);
435 bs_be_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
437 volatile uint32_t *d = __ppc_ba(bsh, ofs);
445 bs_be_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
447 volatile uint64_t *d = __ppc_ba(bsh, ofs);
455 bs_be_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
457 volatile uint8_t *d = __ppc_ba(bsh, ofs);
465 bs_be_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
467 volatile uint16_t *d = __ppc_ba(bsh, ofs);
475 bs_be_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
477 volatile uint32_t *d = __ppc_ba(bsh, ofs);
485 bs_be_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
487 volatile uint64_t *d = __ppc_ba(bsh, ofs);
495 * Little-endian access functions
498 bs_le_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
500 volatile uint8_t *addr;
503 addr = __ppc_ba(bsh, ofs);
506 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
511 bs_le_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
513 volatile uint16_t *addr;
516 addr = __ppc_ba(bsh, ofs);
517 __asm __volatile("lhbrx %0, 0, %1" : "=r"(res) : "r"(addr));
519 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
524 bs_le_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
526 volatile uint32_t *addr;
529 addr = __ppc_ba(bsh, ofs);
530 __asm __volatile("lwbrx %0, 0, %1" : "=r"(res) : "r"(addr));
532 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
537 bs_le_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
543 bs_le_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
545 ins8(__ppc_ba(bsh, ofs), addr, cnt);
549 bs_le_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
551 ins16rb(__ppc_ba(bsh, ofs), addr, cnt);
555 bs_le_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
557 ins32rb(__ppc_ba(bsh, ofs), addr, cnt);
561 bs_le_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt)
567 bs_le_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
569 volatile uint8_t *s = __ppc_ba(bsh, ofs);
577 bs_le_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
579 volatile uint16_t *s = __ppc_ba(bsh, ofs);
582 *addr++ = in16rb(s++);
587 bs_le_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
589 volatile uint32_t *s = __ppc_ba(bsh, ofs);
592 *addr++ = in32rb(s++);
597 bs_le_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
603 bs_le_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
605 volatile uint8_t *addr;
607 addr = __ppc_ba(bsh, ofs);
610 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
614 bs_le_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
616 volatile uint16_t *addr;
618 addr = __ppc_ba(bsh, ofs);
619 __asm __volatile("sthbrx %0, 0, %1" :: "r"(val), "r"(addr));
621 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
625 bs_le_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
627 volatile uint32_t *addr;
629 addr = __ppc_ba(bsh, ofs);
630 __asm __volatile("stwbrx %0, 0, %1" :: "r"(val), "r"(addr));
632 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
636 bs_le_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
642 bs_le_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
645 outs8(__ppc_ba(bsh, ofs), addr, cnt);
649 bs_le_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
652 outs16rb(__ppc_ba(bsh, ofs), addr, cnt);
656 bs_le_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
659 outs32rb(__ppc_ba(bsh, ofs), addr, cnt);
663 bs_le_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
670 bs_le_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
673 volatile uint8_t *d = __ppc_ba(bsh, ofs);
681 bs_le_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
684 volatile uint16_t *d = __ppc_ba(bsh, ofs);
687 out16rb(d++, *addr++);
692 bs_le_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
695 volatile uint32_t *d = __ppc_ba(bsh, ofs);
698 out32rb(d++, *addr++);
703 bs_le_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
710 bs_le_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
712 volatile uint8_t *d = __ppc_ba(bsh, ofs);
720 bs_le_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
722 volatile uint16_t *d = __ppc_ba(bsh, ofs);
730 bs_le_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
732 volatile uint32_t *d = __ppc_ba(bsh, ofs);
740 bs_le_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
746 bs_le_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
748 volatile uint8_t *d = __ppc_ba(bsh, ofs);
756 bs_le_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
758 volatile uint16_t *d = __ppc_ba(bsh, ofs);
766 bs_le_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
768 volatile uint32_t *d = __ppc_ba(bsh, ofs);
776 bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
781 struct bus_space bs_be_tag = {
782 /* mapping/unmapping */
787 /* allocation/deallocation */
875 struct bus_space bs_le_tag = {
876 /* mapping/unmapping */
881 /* allocation/deallocation */