]> CyberLeo.Net >> Repos - FreeBSD/releng/10.2.git/blob - sys/x86/iommu/intel_quirks.c
- Copy stable/10@285827 to releng/10.2 in preparation for 10.2-RC1
[FreeBSD/releng/10.2.git] / sys / x86 / iommu / intel_quirks.c
1 /*-
2  * Copyright (c) 2013 The FreeBSD Foundation
3  * All rights reserved.
4  *
5  * This software was developed by Konstantin Belousov <kib@FreeBSD.org>
6  * under sponsorship from the FreeBSD Foundation.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/lock.h>
37 #include <sys/malloc.h>
38 #include <sys/memdesc.h>
39 #include <sys/module.h>
40 #include <sys/rman.h>
41 #include <sys/rwlock.h>
42 #include <sys/smp.h>
43 #include <sys/taskqueue.h>
44 #include <sys/tree.h>
45 #include <machine/bus.h>
46 #include <contrib/dev/acpica/include/acpi.h>
47 #include <contrib/dev/acpica/include/accommon.h>
48 #include <dev/acpica/acpivar.h>
49 #include <vm/vm.h>
50 #include <vm/vm_extern.h>
51 #include <vm/vm_kern.h>
52 #include <vm/vm_object.h>
53 #include <vm/vm_page.h>
54 #include <vm/vm_pager.h>
55 #include <vm/vm_map.h>
56 #include <x86/include/busdma_impl.h>
57 #include <x86/iommu/intel_reg.h>
58 #include <x86/iommu/busdma_dmar.h>
59 #include <x86/iommu/intel_dmar.h>
60 #include <dev/pci/pcivar.h>
61
62 typedef void (*dmar_quirk_fun)(struct dmar_unit *);
63
64 struct intel_dmar_quirk_cpu {
65         u_int ext_family;
66         u_int ext_model;
67         u_int family_code;
68         u_int model;
69         u_int stepping;
70         dmar_quirk_fun quirk;
71         const char *descr;
72 };
73
74 struct intel_dmar_quirk_nb {
75         u_int dev_id;
76         u_int rev_no;
77         dmar_quirk_fun quirk;
78         const char *descr;
79 };
80
81 static void
82 dmar_match_quirks(struct dmar_unit *dmar,
83     const struct intel_dmar_quirk_nb *nb_quirks, int nb_quirks_len,
84     const struct intel_dmar_quirk_cpu *cpu_quirks, int cpu_quirks_len)
85 {
86         device_t nb;
87         const struct intel_dmar_quirk_nb *nb_quirk;
88         const struct intel_dmar_quirk_cpu *cpu_quirk;
89         u_int p[4];
90         u_int dev_id, rev_no;
91         u_int ext_family, ext_model, family_code, model, stepping;
92         int i;
93
94         if (nb_quirks != NULL) {
95                 nb = pci_find_bsf(0, 0, 0);
96                 if (nb != NULL) {
97                         dev_id = pci_get_device(nb);
98                         rev_no = pci_get_revid(nb);
99                         for (i = 0; i < nb_quirks_len; i++) {
100                                 nb_quirk = &nb_quirks[i];
101                                 if (nb_quirk->dev_id == dev_id &&
102                                     nb_quirk->rev_no == rev_no) {
103                                         if (bootverbose) {
104                                                 device_printf(dmar->dev,
105                                                     "NB IOMMU quirk %s\n",
106                                                     nb_quirk->descr);
107                                         }
108                                         nb_quirk->quirk(dmar);
109                                 }
110                         }
111                 } else {
112                         device_printf(dmar->dev, "cannot find northbridge\n");
113                 }
114         }
115         if (cpu_quirks != NULL) {
116                 do_cpuid(1, p);
117                 ext_family = (p[0] & CPUID_EXT_FAMILY) >> 20;
118                 ext_model = (p[0] & CPUID_EXT_MODEL) >> 16;
119                 family_code = (p[0] & CPUID_FAMILY) >> 8;
120                 model = (p[0] & CPUID_MODEL) >> 4;
121                 stepping = p[0] & CPUID_STEPPING;
122                 for (i = 0; i < cpu_quirks_len; i++) {
123                         cpu_quirk = &cpu_quirks[i];
124                         if (cpu_quirk->ext_family == ext_family &&
125                             cpu_quirk->ext_model == ext_model &&
126                             cpu_quirk->family_code == family_code &&
127                             cpu_quirk->model == model &&
128                             (cpu_quirk->stepping == -1 ||
129                             cpu_quirk->stepping == stepping)) {
130                                 if (bootverbose) {
131                                         device_printf(dmar->dev,
132                                             "CPU IOMMU quirk %s\n",
133                                             cpu_quirk->descr);
134                                 }
135                                 cpu_quirk->quirk(dmar);
136                         }
137                 }
138         }
139 }
140
141 static void
142 nb_5400_no_low_high_prot_mem(struct dmar_unit *unit)
143 {
144
145         unit->hw_cap &= ~(DMAR_CAP_PHMR | DMAR_CAP_PLMR);
146 }
147
148 static const struct intel_dmar_quirk_nb pre_use_nb[] = {
149         {
150             .dev_id = 0x4001, .rev_no = 0x20,
151             .quirk = nb_5400_no_low_high_prot_mem,
152             .descr = "5400 E23" /* no low/high protected memory */
153         },
154         {
155             .dev_id = 0x4003, .rev_no = 0x20,
156             .quirk = nb_5400_no_low_high_prot_mem,
157             .descr = "5400 E23" /* no low/high protected memory */
158         },
159 };
160
161 static void
162 cpu_e5_am9(struct dmar_unit *unit)
163 {
164
165         unit->hw_cap &= ~(0x3fULL << 48);
166         unit->hw_cap |= (9ULL << 48);
167 }
168
169 static const struct intel_dmar_quirk_cpu post_ident_cpu[] = {
170         {
171             .ext_family = 0, .ext_model = 2, .family_code = 6, .model = 13,
172             .stepping = 6, .quirk = cpu_e5_am9,
173             .descr = "E5 BT176" /* AM should be at most 9 */
174         },
175 };
176
177 void
178 dmar_quirks_pre_use(struct dmar_unit *dmar)
179 {
180
181         if (!dmar_barrier_enter(dmar, DMAR_BARRIER_USEQ))
182                 return;
183         DMAR_LOCK(dmar);
184         dmar_match_quirks(dmar, pre_use_nb, nitems(pre_use_nb),
185             NULL, 0);
186         dmar_barrier_exit(dmar, DMAR_BARRIER_USEQ);
187 }
188
189 void
190 dmar_quirks_post_ident(struct dmar_unit *dmar)
191 {
192
193         dmar_match_quirks(dmar, NULL, 0, post_ident_cpu,
194             nitems(post_ident_cpu));
195 }