1 //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // These classes wrap the information about a call or function
11 // definition used to handle ABI compliancy.
13 //===----------------------------------------------------------------------===//
15 #include "TargetInfo.h"
18 #include "CodeGenFunction.h"
19 #include "clang/AST/RecordLayout.h"
20 #include "clang/CodeGen/CGFunctionInfo.h"
21 #include "clang/Frontend/CodeGenOptions.h"
22 #include "llvm/ADT/Triple.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/IR/Type.h"
25 #include "llvm/Support/raw_ostream.h"
26 using namespace clang;
27 using namespace CodeGen;
29 static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder,
34 // Alternatively, we could emit this as a loop in the source.
35 for (unsigned I = FirstIndex; I <= LastIndex; ++I) {
36 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I);
37 Builder.CreateStore(Value, Cell);
41 static bool isAggregateTypeForABI(QualType T) {
42 return !CodeGenFunction::hasScalarEvaluationKind(T) ||
43 T->isMemberFunctionPointerType();
46 ABIInfo::~ABIInfo() {}
48 static bool isRecordReturnIndirect(const RecordType *RT,
50 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
53 return CXXABI.isReturnTypeIndirect(RD);
57 static bool isRecordReturnIndirect(QualType T, CGCXXABI &CXXABI) {
58 const RecordType *RT = T->getAs<RecordType>();
61 return isRecordReturnIndirect(RT, CXXABI);
64 static CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT,
66 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
68 return CGCXXABI::RAA_Default;
69 return CXXABI.getRecordArgABI(RD);
72 static CGCXXABI::RecordArgABI getRecordArgABI(QualType T,
74 const RecordType *RT = T->getAs<RecordType>();
76 return CGCXXABI::RAA_Default;
77 return getRecordArgABI(RT, CXXABI);
80 CGCXXABI &ABIInfo::getCXXABI() const {
81 return CGT.getCXXABI();
84 ASTContext &ABIInfo::getContext() const {
85 return CGT.getContext();
88 llvm::LLVMContext &ABIInfo::getVMContext() const {
89 return CGT.getLLVMContext();
92 const llvm::DataLayout &ABIInfo::getDataLayout() const {
93 return CGT.getDataLayout();
96 const TargetInfo &ABIInfo::getTarget() const {
97 return CGT.getTarget();
100 void ABIArgInfo::dump() const {
101 raw_ostream &OS = llvm::errs();
102 OS << "(ABIArgInfo Kind=";
105 OS << "Direct Type=";
106 if (llvm::Type *Ty = getCoerceToType())
118 OS << "Indirect Align=" << getIndirectAlign()
119 << " ByVal=" << getIndirectByVal()
120 << " Realign=" << getIndirectRealign();
129 TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
131 // If someone can figure out a general rule for this, that would be great.
132 // It's probably just doomed to be platform-dependent, though.
133 unsigned TargetCodeGenInfo::getSizeOfUnwindException() const {
135 // x86-64 FreeBSD, Linux, Darwin
136 // x86-32 FreeBSD, Linux, Darwin
137 // PowerPC Linux, Darwin
138 // ARM Darwin (*not* EABI)
143 bool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args,
144 const FunctionNoProtoType *fnType) const {
145 // The following conventions are known to require this to be false:
148 // For everything else, we just prefer false unless we opt out.
153 TargetCodeGenInfo::getDependentLibraryOption(llvm::StringRef Lib,
154 llvm::SmallString<24> &Opt) const {
155 // This assumes the user is passing a library name like "rt" instead of a
156 // filename like "librt.a/so", and that they don't care whether it's static or
162 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
164 /// isEmptyField - Return true iff a the field is "empty", that is it
165 /// is an unnamed bit-field or an (array of) empty record(s).
166 static bool isEmptyField(ASTContext &Context, const FieldDecl *FD,
168 if (FD->isUnnamedBitfield())
171 QualType FT = FD->getType();
173 // Constant arrays of empty records count as empty, strip them off.
174 // Constant arrays of zero length always count as empty.
176 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
177 if (AT->getSize() == 0)
179 FT = AT->getElementType();
182 const RecordType *RT = FT->getAs<RecordType>();
186 // C++ record fields are never empty, at least in the Itanium ABI.
188 // FIXME: We should use a predicate for whether this behavior is true in the
190 if (isa<CXXRecordDecl>(RT->getDecl()))
193 return isEmptyRecord(Context, FT, AllowArrays);
196 /// isEmptyRecord - Return true iff a structure contains only empty
197 /// fields. Note that a structure with a flexible array member is not
198 /// considered empty.
199 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
200 const RecordType *RT = T->getAs<RecordType>();
203 const RecordDecl *RD = RT->getDecl();
204 if (RD->hasFlexibleArrayMember())
207 // If this is a C++ record, check the bases first.
208 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
209 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
210 e = CXXRD->bases_end(); i != e; ++i)
211 if (!isEmptyRecord(Context, i->getType(), true))
214 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
216 if (!isEmptyField(Context, *i, AllowArrays))
221 /// isSingleElementStruct - Determine if a structure is a "single
222 /// element struct", i.e. it has exactly one non-empty field or
223 /// exactly one field which is itself a single element
224 /// struct. Structures with flexible array members are never
225 /// considered single element structs.
227 /// \return The field declaration for the single non-empty field, if
229 static const Type *isSingleElementStruct(QualType T, ASTContext &Context) {
230 const RecordType *RT = T->getAsStructureType();
234 const RecordDecl *RD = RT->getDecl();
235 if (RD->hasFlexibleArrayMember())
238 const Type *Found = 0;
240 // If this is a C++ record, check the bases first.
241 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
242 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
243 e = CXXRD->bases_end(); i != e; ++i) {
244 // Ignore empty records.
245 if (isEmptyRecord(Context, i->getType(), true))
248 // If we already found an element then this isn't a single-element struct.
252 // If this is non-empty and not a single element struct, the composite
253 // cannot be a single element struct.
254 Found = isSingleElementStruct(i->getType(), Context);
260 // Check for single element.
261 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
263 const FieldDecl *FD = *i;
264 QualType FT = FD->getType();
266 // Ignore empty fields.
267 if (isEmptyField(Context, FD, true))
270 // If we already found an element then this isn't a single-element
275 // Treat single element arrays as the element.
276 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
277 if (AT->getSize().getZExtValue() != 1)
279 FT = AT->getElementType();
282 if (!isAggregateTypeForABI(FT)) {
283 Found = FT.getTypePtr();
285 Found = isSingleElementStruct(FT, Context);
291 // We don't consider a struct a single-element struct if it has
292 // padding beyond the element type.
293 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T))
299 static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) {
300 // Treat complex types as the element type.
301 if (const ComplexType *CTy = Ty->getAs<ComplexType>())
302 Ty = CTy->getElementType();
304 // Check for a type which we know has a simple scalar argument-passing
305 // convention without any padding. (We're specifically looking for 32
306 // and 64-bit integer and integer-equivalents, float, and double.)
307 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() &&
308 !Ty->isEnumeralType() && !Ty->isBlockPointerType())
311 uint64_t Size = Context.getTypeSize(Ty);
312 return Size == 32 || Size == 64;
315 /// canExpandIndirectArgument - Test whether an argument type which is to be
316 /// passed indirectly (on the stack) would have the equivalent layout if it was
317 /// expanded into separate arguments. If so, we prefer to do the latter to avoid
318 /// inhibiting optimizations.
320 // FIXME: This predicate is missing many cases, currently it just follows
321 // llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We
322 // should probably make this smarter, or better yet make the LLVM backend
323 // capable of handling it.
324 static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) {
325 // We can only expand structure types.
326 const RecordType *RT = Ty->getAs<RecordType>();
330 // We can only expand (C) structures.
332 // FIXME: This needs to be generalized to handle classes as well.
333 const RecordDecl *RD = RT->getDecl();
334 if (!RD->isStruct() || isa<CXXRecordDecl>(RD))
339 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
341 const FieldDecl *FD = *i;
343 if (!is32Or64BitBasicType(FD->getType(), Context))
346 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know
347 // how to expand them yet, and the predicate for telling if a bitfield still
348 // counts as "basic" is more complicated than what we were doing previously.
349 if (FD->isBitField())
352 Size += Context.getTypeSize(FD->getType());
355 // Make sure there are not any holes in the struct.
356 if (Size != Context.getTypeSize(Ty))
363 /// DefaultABIInfo - The default implementation for ABI specific
364 /// details. This implementation provides information which results in
365 /// self-consistent and sensible LLVM IR generation, but does not
366 /// conform to any particular ABI.
367 class DefaultABIInfo : public ABIInfo {
369 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
371 ABIArgInfo classifyReturnType(QualType RetTy) const;
372 ABIArgInfo classifyArgumentType(QualType RetTy) const;
374 virtual void computeInfo(CGFunctionInfo &FI) const {
375 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
376 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
378 it->info = classifyArgumentType(it->type);
381 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
382 CodeGenFunction &CGF) const;
385 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
387 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
388 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
391 llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
392 CodeGenFunction &CGF) const {
396 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
397 if (isAggregateTypeForABI(Ty)) {
398 // Records with non trivial destructors/constructors should not be passed
400 if (isRecordReturnIndirect(Ty, getCXXABI()))
401 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
403 return ABIArgInfo::getIndirect(0);
406 // Treat an enum type as its underlying type.
407 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
408 Ty = EnumTy->getDecl()->getIntegerType();
410 return (Ty->isPromotableIntegerType() ?
411 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
414 ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
415 if (RetTy->isVoidType())
416 return ABIArgInfo::getIgnore();
418 if (isAggregateTypeForABI(RetTy))
419 return ABIArgInfo::getIndirect(0);
421 // Treat an enum type as its underlying type.
422 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
423 RetTy = EnumTy->getDecl()->getIntegerType();
425 return (RetTy->isPromotableIntegerType() ?
426 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
429 //===----------------------------------------------------------------------===//
430 // le32/PNaCl bitcode ABI Implementation
432 // This is a simplified version of the x86_32 ABI. Arguments and return values
433 // are always passed on the stack.
434 //===----------------------------------------------------------------------===//
436 class PNaClABIInfo : public ABIInfo {
438 PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
440 ABIArgInfo classifyReturnType(QualType RetTy) const;
441 ABIArgInfo classifyArgumentType(QualType RetTy) const;
443 virtual void computeInfo(CGFunctionInfo &FI) const;
444 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
445 CodeGenFunction &CGF) const;
448 class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
450 PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
451 : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {}
454 void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const {
455 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
457 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
459 it->info = classifyArgumentType(it->type);
462 llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
463 CodeGenFunction &CGF) const {
467 /// \brief Classify argument of given type \p Ty.
468 ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const {
469 if (isAggregateTypeForABI(Ty)) {
470 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
471 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
472 return ABIArgInfo::getIndirect(0);
473 } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
474 // Treat an enum type as its underlying type.
475 Ty = EnumTy->getDecl()->getIntegerType();
476 } else if (Ty->isFloatingType()) {
477 // Floating-point types don't go inreg.
478 return ABIArgInfo::getDirect();
481 return (Ty->isPromotableIntegerType() ?
482 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
485 ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const {
486 if (RetTy->isVoidType())
487 return ABIArgInfo::getIgnore();
489 // In the PNaCl ABI we always return records/structures on the stack.
490 if (isAggregateTypeForABI(RetTy))
491 return ABIArgInfo::getIndirect(0);
493 // Treat an enum type as its underlying type.
494 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
495 RetTy = EnumTy->getDecl()->getIntegerType();
497 return (RetTy->isPromotableIntegerType() ?
498 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
501 /// IsX86_MMXType - Return true if this is an MMX type.
502 bool IsX86_MMXType(llvm::Type *IRType) {
503 // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>.
504 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 &&
505 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() &&
506 IRType->getScalarSizeInBits() != 64;
509 static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
510 StringRef Constraint,
512 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) {
513 if (cast<llvm::VectorType>(Ty)->getBitWidth() != 64) {
514 // Invalid MMX constraint
518 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext());
521 // No operation needed
525 //===----------------------------------------------------------------------===//
526 // X86-32 ABI Implementation
527 //===----------------------------------------------------------------------===//
529 /// X86_32ABIInfo - The X86-32 ABI information.
530 class X86_32ABIInfo : public ABIInfo {
536 static const unsigned MinABIStackAlignInBytes = 4;
538 bool IsDarwinVectorABI;
539 bool IsSmallStructInRegABI;
540 bool IsWin32StructABI;
541 unsigned DefaultNumRegisterParameters;
543 static bool isRegisterSize(unsigned Size) {
544 return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
547 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context,
548 unsigned callingConvention);
550 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
551 /// such that the argument will be passed in memory.
552 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal,
553 unsigned &FreeRegs) const;
555 /// \brief Return the alignment to use for the given type on the stack.
556 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const;
558 Class classify(QualType Ty) const;
559 ABIArgInfo classifyReturnType(QualType RetTy,
560 unsigned callingConvention) const;
561 ABIArgInfo classifyArgumentType(QualType RetTy, unsigned &FreeRegs,
562 bool IsFastCall) const;
563 bool shouldUseInReg(QualType Ty, unsigned &FreeRegs,
564 bool IsFastCall, bool &NeedsPadding) const;
568 virtual void computeInfo(CGFunctionInfo &FI) const;
569 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
570 CodeGenFunction &CGF) const;
572 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool w,
574 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p),
575 IsWin32StructABI(w), DefaultNumRegisterParameters(r) {}
578 class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
580 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
581 bool d, bool p, bool w, unsigned r)
582 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, w, r)) {}
584 static bool isStructReturnInRegABI(
585 const llvm::Triple &Triple, const CodeGenOptions &Opts);
587 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
588 CodeGen::CodeGenModule &CGM) const;
590 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
591 // Darwin uses different dwarf register numbers for EH.
592 if (CGM.getTarget().getTriple().isOSDarwin()) return 5;
596 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
597 llvm::Value *Address) const;
599 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
600 StringRef Constraint,
601 llvm::Type* Ty) const {
602 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
605 llvm::Constant *getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const {
606 unsigned Sig = (0xeb << 0) | // jmp rel8
607 (0x06 << 8) | // .+0x08
610 return llvm::ConstantInt::get(CGM.Int32Ty, Sig);
617 /// shouldReturnTypeInRegister - Determine if the given type should be
618 /// passed in a register (for the Darwin ABI).
619 bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty,
621 unsigned callingConvention) {
622 uint64_t Size = Context.getTypeSize(Ty);
624 // Type must be register sized.
625 if (!isRegisterSize(Size))
628 if (Ty->isVectorType()) {
629 // 64- and 128- bit vectors inside structures are not returned in
631 if (Size == 64 || Size == 128)
637 // If this is a builtin, pointer, enum, complex type, member pointer, or
638 // member function pointer it is ok.
639 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() ||
640 Ty->isAnyComplexType() || Ty->isEnumeralType() ||
641 Ty->isBlockPointerType() || Ty->isMemberPointerType())
644 // Arrays are treated like records.
645 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty))
646 return shouldReturnTypeInRegister(AT->getElementType(), Context,
649 // Otherwise, it must be a record type.
650 const RecordType *RT = Ty->getAs<RecordType>();
651 if (!RT) return false;
653 // FIXME: Traverse bases here too.
655 // For thiscall conventions, structures will never be returned in
656 // a register. This is for compatibility with the MSVC ABI
657 if (callingConvention == llvm::CallingConv::X86_ThisCall &&
658 RT->isStructureType()) {
662 // Structure types are passed in register if all fields would be
663 // passed in a register.
664 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(),
665 e = RT->getDecl()->field_end(); i != e; ++i) {
666 const FieldDecl *FD = *i;
668 // Empty fields are ignored.
669 if (isEmptyField(Context, FD, true))
672 // Check fields recursively.
673 if (!shouldReturnTypeInRegister(FD->getType(), Context,
680 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy,
681 unsigned callingConvention) const {
682 if (RetTy->isVoidType())
683 return ABIArgInfo::getIgnore();
685 if (const VectorType *VT = RetTy->getAs<VectorType>()) {
686 // On Darwin, some vectors are returned in registers.
687 if (IsDarwinVectorABI) {
688 uint64_t Size = getContext().getTypeSize(RetTy);
690 // 128-bit vectors are a special case; they are returned in
691 // registers and we need to make sure to pick a type the LLVM
692 // backend will like.
694 return ABIArgInfo::getDirect(llvm::VectorType::get(
695 llvm::Type::getInt64Ty(getVMContext()), 2));
697 // Always return in register if it fits in a general purpose
698 // register, or if it is 64 bits and has a single element.
699 if ((Size == 8 || Size == 16 || Size == 32) ||
700 (Size == 64 && VT->getNumElements() == 1))
701 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
704 return ABIArgInfo::getIndirect(0);
707 return ABIArgInfo::getDirect();
710 if (isAggregateTypeForABI(RetTy)) {
711 if (const RecordType *RT = RetTy->getAs<RecordType>()) {
712 if (isRecordReturnIndirect(RT, getCXXABI()))
713 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
715 // Structures with flexible arrays are always indirect.
716 if (RT->getDecl()->hasFlexibleArrayMember())
717 return ABIArgInfo::getIndirect(0);
720 // If specified, structs and unions are always indirect.
721 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType())
722 return ABIArgInfo::getIndirect(0);
724 // Small structures which are register sized are generally returned
726 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext(),
727 callingConvention)) {
728 uint64_t Size = getContext().getTypeSize(RetTy);
730 // As a special-case, if the struct is a "single-element" struct, and
731 // the field is of type "float" or "double", return it in a
732 // floating-point register. (MSVC does not apply this special case.)
733 // We apply a similar transformation for pointer types to improve the
734 // quality of the generated IR.
735 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext()))
736 if ((!IsWin32StructABI && SeltTy->isRealFloatingType())
737 || SeltTy->hasPointerRepresentation())
738 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
740 // FIXME: We should be able to narrow this integer in cases with dead
742 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size));
745 return ABIArgInfo::getIndirect(0);
748 // Treat an enum type as its underlying type.
749 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
750 RetTy = EnumTy->getDecl()->getIntegerType();
752 return (RetTy->isPromotableIntegerType() ?
753 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
756 static bool isSSEVectorType(ASTContext &Context, QualType Ty) {
757 return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128;
760 static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) {
761 const RecordType *RT = Ty->getAs<RecordType>();
764 const RecordDecl *RD = RT->getDecl();
766 // If this is a C++ record, check the bases first.
767 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
768 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
769 e = CXXRD->bases_end(); i != e; ++i)
770 if (!isRecordWithSSEVectorType(Context, i->getType()))
773 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
775 QualType FT = i->getType();
777 if (isSSEVectorType(Context, FT))
780 if (isRecordWithSSEVectorType(Context, FT))
787 unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty,
788 unsigned Align) const {
789 // Otherwise, if the alignment is less than or equal to the minimum ABI
790 // alignment, just use the default; the backend will handle this.
791 if (Align <= MinABIStackAlignInBytes)
792 return 0; // Use default alignment.
794 // On non-Darwin, the stack type alignment is always 4.
795 if (!IsDarwinVectorABI) {
796 // Set explicit alignment, since we may need to realign the top.
797 return MinABIStackAlignInBytes;
800 // Otherwise, if the type contains an SSE vector type, the alignment is 16.
801 if (Align >= 16 && (isSSEVectorType(getContext(), Ty) ||
802 isRecordWithSSEVectorType(getContext(), Ty)))
805 return MinABIStackAlignInBytes;
808 ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal,
809 unsigned &FreeRegs) const {
812 --FreeRegs; // Non byval indirects just use one pointer.
813 return ABIArgInfo::getIndirectInReg(0, false);
815 return ABIArgInfo::getIndirect(0, false);
818 // Compute the byval alignment.
819 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
820 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign);
822 return ABIArgInfo::getIndirect(4);
824 // If the stack alignment is less than the type alignment, realign the
826 if (StackAlign < TypeAlign)
827 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true,
830 return ABIArgInfo::getIndirect(StackAlign);
833 X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const {
834 const Type *T = isSingleElementStruct(Ty, getContext());
838 if (const BuiltinType *BT = T->getAs<BuiltinType>()) {
839 BuiltinType::Kind K = BT->getKind();
840 if (K == BuiltinType::Float || K == BuiltinType::Double)
846 bool X86_32ABIInfo::shouldUseInReg(QualType Ty, unsigned &FreeRegs,
847 bool IsFastCall, bool &NeedsPadding) const {
848 NeedsPadding = false;
849 Class C = classify(Ty);
853 unsigned Size = getContext().getTypeSize(Ty);
854 unsigned SizeInRegs = (Size + 31) / 32;
859 if (SizeInRegs > FreeRegs) {
864 FreeRegs -= SizeInRegs;
870 if (Ty->isIntegralOrEnumerationType())
873 if (Ty->isPointerType())
876 if (Ty->isReferenceType())
888 ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty,
890 bool IsFastCall) const {
891 // FIXME: Set alignment on indirect arguments.
892 if (isAggregateTypeForABI(Ty)) {
893 if (const RecordType *RT = Ty->getAs<RecordType>()) {
894 if (IsWin32StructABI)
895 return getIndirectResult(Ty, true, FreeRegs);
897 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI()))
898 return getIndirectResult(Ty, RAA == CGCXXABI::RAA_DirectInMemory, FreeRegs);
900 // Structures with flexible arrays are always indirect.
901 if (RT->getDecl()->hasFlexibleArrayMember())
902 return getIndirectResult(Ty, true, FreeRegs);
905 // Ignore empty structs/unions.
906 if (isEmptyRecord(getContext(), Ty, true))
907 return ABIArgInfo::getIgnore();
909 llvm::LLVMContext &LLVMContext = getVMContext();
910 llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext);
912 if (shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding)) {
913 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32;
914 SmallVector<llvm::Type*, 3> Elements(SizeInRegs, Int32);
915 llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements);
916 return ABIArgInfo::getDirectInReg(Result);
918 llvm::IntegerType *PaddingType = NeedsPadding ? Int32 : 0;
920 // Expand small (<= 128-bit) record types when we know that the stack layout
921 // of those arguments will match the struct. This is important because the
922 // LLVM backend isn't smart enough to remove byval, which inhibits many
924 if (getContext().getTypeSize(Ty) <= 4*32 &&
925 canExpandIndirectArgument(Ty, getContext()))
926 return ABIArgInfo::getExpandWithPadding(IsFastCall, PaddingType);
928 return getIndirectResult(Ty, true, FreeRegs);
931 if (const VectorType *VT = Ty->getAs<VectorType>()) {
932 // On Darwin, some vectors are passed in memory, we handle this by passing
933 // it as an i8/i16/i32/i64.
934 if (IsDarwinVectorABI) {
935 uint64_t Size = getContext().getTypeSize(Ty);
936 if ((Size == 8 || Size == 16 || Size == 32) ||
937 (Size == 64 && VT->getNumElements() == 1))
938 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
942 if (IsX86_MMXType(CGT.ConvertType(Ty)))
943 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 64));
945 return ABIArgInfo::getDirect();
949 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
950 Ty = EnumTy->getDecl()->getIntegerType();
953 bool InReg = shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding);
955 if (Ty->isPromotableIntegerType()) {
957 return ABIArgInfo::getExtendInReg();
958 return ABIArgInfo::getExtend();
961 return ABIArgInfo::getDirectInReg();
962 return ABIArgInfo::getDirect();
965 void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const {
966 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(),
967 FI.getCallingConvention());
969 unsigned CC = FI.getCallingConvention();
970 bool IsFastCall = CC == llvm::CallingConv::X86_FastCall;
974 else if (FI.getHasRegParm())
975 FreeRegs = FI.getRegParm();
977 FreeRegs = DefaultNumRegisterParameters;
979 // If the return value is indirect, then the hidden argument is consuming one
981 if (FI.getReturnInfo().isIndirect() && FreeRegs) {
983 ABIArgInfo &Old = FI.getReturnInfo();
984 Old = ABIArgInfo::getIndirectInReg(Old.getIndirectAlign(),
985 Old.getIndirectByVal(),
986 Old.getIndirectRealign());
989 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
991 it->info = classifyArgumentType(it->type, FreeRegs, IsFastCall);
994 llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
995 CodeGenFunction &CGF) const {
996 llvm::Type *BPP = CGF.Int8PtrPtrTy;
998 CGBuilderTy &Builder = CGF.Builder;
999 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
1001 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
1003 // Compute if the address needs to be aligned
1004 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity();
1005 Align = getTypeStackAlignInBytes(Ty, Align);
1006 Align = std::max(Align, 4U);
1008 // addr = (addr + align - 1) & -align;
1009 llvm::Value *Offset =
1010 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1);
1011 Addr = CGF.Builder.CreateGEP(Addr, Offset);
1012 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr,
1014 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align);
1015 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
1021 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
1022 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
1025 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align);
1026 llvm::Value *NextAddr =
1027 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
1029 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
1034 void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
1035 llvm::GlobalValue *GV,
1036 CodeGen::CodeGenModule &CGM) const {
1037 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
1038 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
1039 // Get the LLVM function.
1040 llvm::Function *Fn = cast<llvm::Function>(GV);
1042 // Now add the 'alignstack' attribute with a value of 16.
1043 llvm::AttrBuilder B;
1044 B.addStackAlignmentAttr(16);
1045 Fn->addAttributes(llvm::AttributeSet::FunctionIndex,
1046 llvm::AttributeSet::get(CGM.getLLVMContext(),
1047 llvm::AttributeSet::FunctionIndex,
1053 bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable(
1054 CodeGen::CodeGenFunction &CGF,
1055 llvm::Value *Address) const {
1056 CodeGen::CGBuilderTy &Builder = CGF.Builder;
1058 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
1060 // 0-7 are the eight integer registers; the order is different
1061 // on Darwin (for EH), but the range is the same.
1063 AssignToArrayRange(Builder, Address, Four8, 0, 8);
1065 if (CGF.CGM.getTarget().getTriple().isOSDarwin()) {
1066 // 12-16 are st(0..4). Not sure why we stop at 4.
1067 // These have size 16, which is sizeof(long double) on
1068 // platforms with 8-byte alignment for that type.
1069 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16);
1070 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16);
1073 // 9 is %eflags, which doesn't get a size on Darwin for some
1075 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9));
1077 // 11-16 are st(0..5). Not sure why we stop at 5.
1078 // These have size 12, which is sizeof(long double) on
1079 // platforms with 4-byte alignment for that type.
1080 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12);
1081 AssignToArrayRange(Builder, Address, Twelve8, 11, 16);
1087 //===----------------------------------------------------------------------===//
1088 // X86-64 ABI Implementation
1089 //===----------------------------------------------------------------------===//
1093 /// X86_64ABIInfo - The X86_64 ABI information.
1094 class X86_64ABIInfo : public ABIInfo {
1106 /// merge - Implement the X86_64 ABI merging algorithm.
1108 /// Merge an accumulating classification \arg Accum with a field
1109 /// classification \arg Field.
1111 /// \param Accum - The accumulating classification. This should
1112 /// always be either NoClass or the result of a previous merge
1113 /// call. In addition, this should never be Memory (the caller
1114 /// should just return Memory for the aggregate).
1115 static Class merge(Class Accum, Class Field);
1117 /// postMerge - Implement the X86_64 ABI post merging algorithm.
1119 /// Post merger cleanup, reduces a malformed Hi and Lo pair to
1120 /// final MEMORY or SSE classes when necessary.
1122 /// \param AggregateSize - The size of the current aggregate in
1123 /// the classification process.
1125 /// \param Lo - The classification for the parts of the type
1126 /// residing in the low word of the containing object.
1128 /// \param Hi - The classification for the parts of the type
1129 /// residing in the higher words of the containing object.
1131 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
1133 /// classify - Determine the x86_64 register classes in which the
1134 /// given type T should be passed.
1136 /// \param Lo - The classification for the parts of the type
1137 /// residing in the low word of the containing object.
1139 /// \param Hi - The classification for the parts of the type
1140 /// residing in the high word of the containing object.
1142 /// \param OffsetBase - The bit offset of this type in the
1143 /// containing object. Some parameters are classified different
1144 /// depending on whether they straddle an eightbyte boundary.
1146 /// \param isNamedArg - Whether the argument in question is a "named"
1147 /// argument, as used in AMD64-ABI 3.5.7.
1149 /// If a word is unused its result will be NoClass; if a type should
1150 /// be passed in Memory then at least the classification of \arg Lo
1153 /// The \arg Lo class will be NoClass iff the argument is ignored.
1155 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
1156 /// also be ComplexX87.
1157 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi,
1158 bool isNamedArg) const;
1160 llvm::Type *GetByteVectorType(QualType Ty) const;
1161 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType,
1162 unsigned IROffset, QualType SourceTy,
1163 unsigned SourceOffset) const;
1164 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType,
1165 unsigned IROffset, QualType SourceTy,
1166 unsigned SourceOffset) const;
1168 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
1169 /// such that the argument will be returned in memory.
1170 ABIArgInfo getIndirectReturnResult(QualType Ty) const;
1172 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
1173 /// such that the argument will be passed in memory.
1175 /// \param freeIntRegs - The number of free integer registers remaining
1177 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const;
1179 ABIArgInfo classifyReturnType(QualType RetTy) const;
1181 ABIArgInfo classifyArgumentType(QualType Ty,
1182 unsigned freeIntRegs,
1183 unsigned &neededInt,
1184 unsigned &neededSSE,
1185 bool isNamedArg) const;
1187 bool IsIllegalVectorType(QualType Ty) const;
1189 /// The 0.98 ABI revision clarified a lot of ambiguities,
1190 /// unfortunately in ways that were not always consistent with
1191 /// certain previous compilers. In particular, platforms which
1192 /// required strict binary compatibility with older versions of GCC
1193 /// may need to exempt themselves.
1194 bool honorsRevision0_98() const {
1195 return !getTarget().getTriple().isOSDarwin();
1199 // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on
1201 bool Has64BitPointers;
1204 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) :
1205 ABIInfo(CGT), HasAVX(hasavx),
1206 Has64BitPointers(CGT.getDataLayout().getPointerSize(0) == 8) {
1209 bool isPassedUsingAVXType(QualType type) const {
1210 unsigned neededInt, neededSSE;
1211 // The freeIntRegs argument doesn't matter here.
1212 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE,
1213 /*isNamedArg*/true);
1214 if (info.isDirect()) {
1215 llvm::Type *ty = info.getCoerceToType();
1216 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty))
1217 return (vectorTy->getBitWidth() > 128);
1222 virtual void computeInfo(CGFunctionInfo &FI) const;
1224 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1225 CodeGenFunction &CGF) const;
1228 /// WinX86_64ABIInfo - The Windows X86_64 ABI information.
1229 class WinX86_64ABIInfo : public ABIInfo {
1231 ABIArgInfo classify(QualType Ty, bool IsReturnType) const;
1234 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
1236 virtual void computeInfo(CGFunctionInfo &FI) const;
1238 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1239 CodeGenFunction &CGF) const;
1242 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1244 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX)
1245 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {}
1247 const X86_64ABIInfo &getABIInfo() const {
1248 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo());
1251 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
1255 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
1256 llvm::Value *Address) const {
1257 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
1259 // 0-15 are the 16 integer registers.
1261 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16);
1265 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
1266 StringRef Constraint,
1267 llvm::Type* Ty) const {
1268 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
1271 bool isNoProtoCallVariadic(const CallArgList &args,
1272 const FunctionNoProtoType *fnType) const {
1273 // The default CC on x86-64 sets %al to the number of SSA
1274 // registers used, and GCC sets this when calling an unprototyped
1275 // function, so we override the default behavior. However, don't do
1276 // that when AVX types are involved: the ABI explicitly states it is
1277 // undefined, and it doesn't work in practice because of how the ABI
1278 // defines varargs anyway.
1279 if (fnType->getCallConv() == CC_C) {
1280 bool HasAVXType = false;
1281 for (CallArgList::const_iterator
1282 it = args.begin(), ie = args.end(); it != ie; ++it) {
1283 if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
1293 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType);
1296 llvm::Constant *getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const {
1297 unsigned Sig = (0xeb << 0) | // jmp rel8
1298 (0x0a << 8) | // .+0x0c
1301 return llvm::ConstantInt::get(CGM.Int32Ty, Sig);
1306 static std::string qualifyWindowsLibrary(llvm::StringRef Lib) {
1307 // If the argument does not end in .lib, automatically add the suffix. This
1308 // matches the behavior of MSVC.
1309 std::string ArgStr = Lib;
1310 if (!Lib.endswith_lower(".lib"))
1315 class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo {
1317 WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
1318 bool d, bool p, bool w, unsigned RegParms)
1319 : X86_32TargetCodeGenInfo(CGT, d, p, w, RegParms) {}
1321 void getDependentLibraryOption(llvm::StringRef Lib,
1322 llvm::SmallString<24> &Opt) const {
1323 Opt = "/DEFAULTLIB:";
1324 Opt += qualifyWindowsLibrary(Lib);
1327 void getDetectMismatchOption(llvm::StringRef Name,
1328 llvm::StringRef Value,
1329 llvm::SmallString<32> &Opt) const {
1330 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
1334 class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1336 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
1337 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {}
1339 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
1343 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
1344 llvm::Value *Address) const {
1345 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
1347 // 0-15 are the 16 integer registers.
1349 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16);
1353 void getDependentLibraryOption(llvm::StringRef Lib,
1354 llvm::SmallString<24> &Opt) const {
1355 Opt = "/DEFAULTLIB:";
1356 Opt += qualifyWindowsLibrary(Lib);
1359 void getDetectMismatchOption(llvm::StringRef Name,
1360 llvm::StringRef Value,
1361 llvm::SmallString<32> &Opt) const {
1362 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
1368 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo,
1370 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
1372 // (a) If one of the classes is Memory, the whole argument is passed in
1375 // (b) If X87UP is not preceded by X87, the whole argument is passed in
1378 // (c) If the size of the aggregate exceeds two eightbytes and the first
1379 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
1380 // argument is passed in memory. NOTE: This is necessary to keep the
1381 // ABI working for processors that don't support the __m256 type.
1383 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
1385 // Some of these are enforced by the merging logic. Others can arise
1386 // only with unions; for example:
1387 // union { _Complex double; unsigned; }
1389 // Note that clauses (b) and (c) were added in 0.98.
1393 if (Hi == X87Up && Lo != X87 && honorsRevision0_98())
1395 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp))
1397 if (Hi == SSEUp && Lo != SSE)
1401 X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) {
1402 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
1403 // classified recursively so that always two fields are
1404 // considered. The resulting class is calculated according to
1405 // the classes of the fields in the eightbyte:
1407 // (a) If both classes are equal, this is the resulting class.
1409 // (b) If one of the classes is NO_CLASS, the resulting class is
1412 // (c) If one of the classes is MEMORY, the result is the MEMORY
1415 // (d) If one of the classes is INTEGER, the result is the
1418 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class,
1419 // MEMORY is used as class.
1421 // (f) Otherwise class SSE is used.
1423 // Accum should never be memory (we should have returned) or
1424 // ComplexX87 (because this cannot be passed in a structure).
1425 assert((Accum != Memory && Accum != ComplexX87) &&
1426 "Invalid accumulated classification during merge.");
1427 if (Accum == Field || Field == NoClass)
1429 if (Field == Memory)
1431 if (Accum == NoClass)
1433 if (Accum == Integer || Field == Integer)
1435 if (Field == X87 || Field == X87Up || Field == ComplexX87 ||
1436 Accum == X87 || Accum == X87Up)
1441 void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
1442 Class &Lo, Class &Hi, bool isNamedArg) const {
1443 // FIXME: This code can be simplified by introducing a simple value class for
1444 // Class pairs with appropriate constructor methods for the various
1447 // FIXME: Some of the split computations are wrong; unaligned vectors
1448 // shouldn't be passed in registers for example, so there is no chance they
1449 // can straddle an eightbyte. Verify & simplify.
1453 Class &Current = OffsetBase < 64 ? Lo : Hi;
1456 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
1457 BuiltinType::Kind k = BT->getKind();
1459 if (k == BuiltinType::Void) {
1461 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
1464 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) {
1466 } else if ((k == BuiltinType::Float || k == BuiltinType::Double) ||
1467 (k == BuiltinType::LongDouble &&
1468 getTarget().getTriple().isOSNaCl())) {
1470 } else if (k == BuiltinType::LongDouble) {
1474 // FIXME: _Decimal32 and _Decimal64 are SSE.
1475 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp).
1479 if (const EnumType *ET = Ty->getAs<EnumType>()) {
1480 // Classify the underlying integer type.
1481 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi, isNamedArg);
1485 if (Ty->hasPointerRepresentation()) {
1490 if (Ty->isMemberPointerType()) {
1491 if (Ty->isMemberFunctionPointerType() && Has64BitPointers)
1498 if (const VectorType *VT = Ty->getAs<VectorType>()) {
1499 uint64_t Size = getContext().getTypeSize(VT);
1501 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x
1502 // float> as integer.
1505 // If this type crosses an eightbyte boundary, it should be
1507 uint64_t EB_Real = (OffsetBase) / 64;
1508 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64;
1509 if (EB_Real != EB_Imag)
1511 } else if (Size == 64) {
1512 // gcc passes <1 x double> in memory. :(
1513 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double))
1516 // gcc passes <1 x long long> as INTEGER.
1517 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) ||
1518 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) ||
1519 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) ||
1520 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong))
1525 // If this type crosses an eightbyte boundary, it should be
1527 if (OffsetBase && OffsetBase != 64)
1529 } else if (Size == 128 || (HasAVX && isNamedArg && Size == 256)) {
1530 // Arguments of 256-bits are split into four eightbyte chunks. The
1531 // least significant one belongs to class SSE and all the others to class
1532 // SSEUP. The original Lo and Hi design considers that types can't be
1533 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense.
1534 // This design isn't correct for 256-bits, but since there're no cases
1535 // where the upper parts would need to be inspected, avoid adding
1536 // complexity and just consider Hi to match the 64-256 part.
1538 // Note that per 3.5.7 of AMD64-ABI, 256-bit args are only passed in
1539 // registers if they are "named", i.e. not part of the "..." of a
1540 // variadic function.
1547 if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
1548 QualType ET = getContext().getCanonicalType(CT->getElementType());
1550 uint64_t Size = getContext().getTypeSize(Ty);
1551 if (ET->isIntegralOrEnumerationType()) {
1554 else if (Size <= 128)
1556 } else if (ET == getContext().FloatTy)
1558 else if (ET == getContext().DoubleTy ||
1559 (ET == getContext().LongDoubleTy &&
1560 getTarget().getTriple().isOSNaCl()))
1562 else if (ET == getContext().LongDoubleTy)
1563 Current = ComplexX87;
1565 // If this complex type crosses an eightbyte boundary then it
1567 uint64_t EB_Real = (OffsetBase) / 64;
1568 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64;
1569 if (Hi == NoClass && EB_Real != EB_Imag)
1575 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
1576 // Arrays are treated like structures.
1578 uint64_t Size = getContext().getTypeSize(Ty);
1580 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1581 // than four eightbytes, ..., it has class MEMORY.
1585 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
1586 // fields, it has class MEMORY.
1588 // Only need to check alignment of array base.
1589 if (OffsetBase % getContext().getTypeAlign(AT->getElementType()))
1592 // Otherwise implement simplified merge. We could be smarter about
1593 // this, but it isn't worth it and would be harder to verify.
1595 uint64_t EltSize = getContext().getTypeSize(AT->getElementType());
1596 uint64_t ArraySize = AT->getSize().getZExtValue();
1598 // The only case a 256-bit wide vector could be used is when the array
1599 // contains a single 256-bit element. Since Lo and Hi logic isn't extended
1600 // to work for sizes wider than 128, early check and fallback to memory.
1601 if (Size > 128 && EltSize != 256)
1604 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) {
1605 Class FieldLo, FieldHi;
1606 classify(AT->getElementType(), Offset, FieldLo, FieldHi, isNamedArg);
1607 Lo = merge(Lo, FieldLo);
1608 Hi = merge(Hi, FieldHi);
1609 if (Lo == Memory || Hi == Memory)
1613 postMerge(Size, Lo, Hi);
1614 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification.");
1618 if (const RecordType *RT = Ty->getAs<RecordType>()) {
1619 uint64_t Size = getContext().getTypeSize(Ty);
1621 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1622 // than four eightbytes, ..., it has class MEMORY.
1626 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
1627 // copy constructor or a non-trivial destructor, it is passed by invisible
1629 if (getRecordArgABI(RT, getCXXABI()))
1632 const RecordDecl *RD = RT->getDecl();
1634 // Assume variable sized types are passed in memory.
1635 if (RD->hasFlexibleArrayMember())
1638 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
1640 // Reset Lo class, this will be recomputed.
1643 // If this is a C++ record, classify the bases first.
1644 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
1645 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
1646 e = CXXRD->bases_end(); i != e; ++i) {
1647 assert(!i->isVirtual() && !i->getType()->isDependentType() &&
1648 "Unexpected base class!");
1649 const CXXRecordDecl *Base =
1650 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
1652 // Classify this field.
1654 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a
1655 // single eightbyte, each is classified separately. Each eightbyte gets
1656 // initialized to class NO_CLASS.
1657 Class FieldLo, FieldHi;
1659 OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base));
1660 classify(i->getType(), Offset, FieldLo, FieldHi, isNamedArg);
1661 Lo = merge(Lo, FieldLo);
1662 Hi = merge(Hi, FieldHi);
1663 if (Lo == Memory || Hi == Memory)
1668 // Classify the fields one at a time, merging the results.
1670 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1671 i != e; ++i, ++idx) {
1672 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
1673 bool BitField = i->isBitField();
1675 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than
1676 // four eightbytes, or it contains unaligned fields, it has class MEMORY.
1678 // The only case a 256-bit wide vector could be used is when the struct
1679 // contains a single 256-bit element. Since Lo and Hi logic isn't extended
1680 // to work for sizes wider than 128, early check and fallback to memory.
1682 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) {
1686 // Note, skip this test for bit-fields, see below.
1687 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) {
1692 // Classify this field.
1694 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate
1695 // exceeds a single eightbyte, each is classified
1696 // separately. Each eightbyte gets initialized to class
1698 Class FieldLo, FieldHi;
1700 // Bit-fields require special handling, they do not force the
1701 // structure to be passed in memory even if unaligned, and
1702 // therefore they can straddle an eightbyte.
1704 // Ignore padding bit-fields.
1705 if (i->isUnnamedBitfield())
1708 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
1709 uint64_t Size = i->getBitWidthValue(getContext());
1711 uint64_t EB_Lo = Offset / 64;
1712 uint64_t EB_Hi = (Offset + Size - 1) / 64;
1715 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes.");
1720 FieldHi = EB_Hi ? Integer : NoClass;
1723 classify(i->getType(), Offset, FieldLo, FieldHi, isNamedArg);
1724 Lo = merge(Lo, FieldLo);
1725 Hi = merge(Hi, FieldHi);
1726 if (Lo == Memory || Hi == Memory)
1730 postMerge(Size, Lo, Hi);
1734 ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const {
1735 // If this is a scalar LLVM value then assume LLVM will pass it in the right
1737 if (!isAggregateTypeForABI(Ty)) {
1738 // Treat an enum type as its underlying type.
1739 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1740 Ty = EnumTy->getDecl()->getIntegerType();
1742 return (Ty->isPromotableIntegerType() ?
1743 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1746 return ABIArgInfo::getIndirect(0);
1749 bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const {
1750 if (const VectorType *VecTy = Ty->getAs<VectorType>()) {
1751 uint64_t Size = getContext().getTypeSize(VecTy);
1752 unsigned LargestVector = HasAVX ? 256 : 128;
1753 if (Size <= 64 || Size > LargestVector)
1760 ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty,
1761 unsigned freeIntRegs) const {
1762 // If this is a scalar LLVM value then assume LLVM will pass it in the right
1765 // This assumption is optimistic, as there could be free registers available
1766 // when we need to pass this argument in memory, and LLVM could try to pass
1767 // the argument in the free register. This does not seem to happen currently,
1768 // but this code would be much safer if we could mark the argument with
1769 // 'onstack'. See PR12193.
1770 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) {
1771 // Treat an enum type as its underlying type.
1772 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1773 Ty = EnumTy->getDecl()->getIntegerType();
1775 return (Ty->isPromotableIntegerType() ?
1776 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1779 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
1780 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
1782 // Compute the byval alignment. We specify the alignment of the byval in all
1783 // cases so that the mid-level optimizer knows the alignment of the byval.
1784 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U);
1786 // Attempt to avoid passing indirect results using byval when possible. This
1787 // is important for good codegen.
1789 // We do this by coercing the value into a scalar type which the backend can
1790 // handle naturally (i.e., without using byval).
1792 // For simplicity, we currently only do this when we have exhausted all of the
1793 // free integer registers. Doing this when there are free integer registers
1794 // would require more care, as we would have to ensure that the coerced value
1795 // did not claim the unused register. That would require either reording the
1796 // arguments to the function (so that any subsequent inreg values came first),
1797 // or only doing this optimization when there were no following arguments that
1800 // We currently expect it to be rare (particularly in well written code) for
1801 // arguments to be passed on the stack when there are still free integer
1802 // registers available (this would typically imply large structs being passed
1803 // by value), so this seems like a fair tradeoff for now.
1805 // We can revisit this if the backend grows support for 'onstack' parameter
1806 // attributes. See PR12193.
1807 if (freeIntRegs == 0) {
1808 uint64_t Size = getContext().getTypeSize(Ty);
1810 // If this type fits in an eightbyte, coerce it into the matching integral
1811 // type, which will end up on the stack (with alignment 8).
1812 if (Align == 8 && Size <= 64)
1813 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
1817 return ABIArgInfo::getIndirect(Align);
1820 /// GetByteVectorType - The ABI specifies that a value should be passed in an
1821 /// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a
1822 /// vector register.
1823 llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const {
1824 llvm::Type *IRType = CGT.ConvertType(Ty);
1826 // Wrapper structs that just contain vectors are passed just like vectors,
1827 // strip them off if present.
1828 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType);
1829 while (STy && STy->getNumElements() == 1) {
1830 IRType = STy->getElementType(0);
1831 STy = dyn_cast<llvm::StructType>(IRType);
1834 // If the preferred type is a 16-byte vector, prefer to pass it.
1835 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){
1836 llvm::Type *EltTy = VT->getElementType();
1837 unsigned BitWidth = VT->getBitWidth();
1838 if ((BitWidth >= 128 && BitWidth <= 256) &&
1839 (EltTy->isFloatTy() || EltTy->isDoubleTy() ||
1840 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) ||
1841 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) ||
1842 EltTy->isIntegerTy(128)))
1846 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2);
1849 /// BitsContainNoUserData - Return true if the specified [start,end) bit range
1850 /// is known to either be off the end of the specified type or being in
1851 /// alignment padding. The user type specified is known to be at most 128 bits
1852 /// in size, and have passed through X86_64ABIInfo::classify with a successful
1853 /// classification that put one of the two halves in the INTEGER class.
1855 /// It is conservatively correct to return false.
1856 static bool BitsContainNoUserData(QualType Ty, unsigned StartBit,
1857 unsigned EndBit, ASTContext &Context) {
1858 // If the bytes being queried are off the end of the type, there is no user
1859 // data hiding here. This handles analysis of builtins, vectors and other
1860 // types that don't contain interesting padding.
1861 unsigned TySize = (unsigned)Context.getTypeSize(Ty);
1862 if (TySize <= StartBit)
1865 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
1866 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType());
1867 unsigned NumElts = (unsigned)AT->getSize().getZExtValue();
1869 // Check each element to see if the element overlaps with the queried range.
1870 for (unsigned i = 0; i != NumElts; ++i) {
1871 // If the element is after the span we care about, then we're done..
1872 unsigned EltOffset = i*EltSize;
1873 if (EltOffset >= EndBit) break;
1875 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0;
1876 if (!BitsContainNoUserData(AT->getElementType(), EltStart,
1877 EndBit-EltOffset, Context))
1880 // If it overlaps no elements, then it is safe to process as padding.
1884 if (const RecordType *RT = Ty->getAs<RecordType>()) {
1885 const RecordDecl *RD = RT->getDecl();
1886 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
1888 // If this is a C++ record, check the bases first.
1889 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
1890 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
1891 e = CXXRD->bases_end(); i != e; ++i) {
1892 assert(!i->isVirtual() && !i->getType()->isDependentType() &&
1893 "Unexpected base class!");
1894 const CXXRecordDecl *Base =
1895 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
1897 // If the base is after the span we care about, ignore it.
1898 unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base));
1899 if (BaseOffset >= EndBit) continue;
1901 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0;
1902 if (!BitsContainNoUserData(i->getType(), BaseStart,
1903 EndBit-BaseOffset, Context))
1908 // Verify that no field has data that overlaps the region of interest. Yes
1909 // this could be sped up a lot by being smarter about queried fields,
1910 // however we're only looking at structs up to 16 bytes, so we don't care
1913 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1914 i != e; ++i, ++idx) {
1915 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx);
1917 // If we found a field after the region we care about, then we're done.
1918 if (FieldOffset >= EndBit) break;
1920 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0;
1921 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset,
1926 // If nothing in this record overlapped the area of interest, then we're
1934 /// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a
1935 /// float member at the specified offset. For example, {int,{float}} has a
1936 /// float at offset 4. It is conservatively correct for this routine to return
1938 static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset,
1939 const llvm::DataLayout &TD) {
1940 // Base case if we find a float.
1941 if (IROffset == 0 && IRType->isFloatTy())
1944 // If this is a struct, recurse into the field at the specified offset.
1945 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
1946 const llvm::StructLayout *SL = TD.getStructLayout(STy);
1947 unsigned Elt = SL->getElementContainingOffset(IROffset);
1948 IROffset -= SL->getElementOffset(Elt);
1949 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD);
1952 // If this is an array, recurse into the field at the specified offset.
1953 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
1954 llvm::Type *EltTy = ATy->getElementType();
1955 unsigned EltSize = TD.getTypeAllocSize(EltTy);
1956 IROffset -= IROffset/EltSize*EltSize;
1957 return ContainsFloatAtOffset(EltTy, IROffset, TD);
1964 /// GetSSETypeAtOffset - Return a type that will be passed by the backend in the
1965 /// low 8 bytes of an XMM register, corresponding to the SSE class.
1966 llvm::Type *X86_64ABIInfo::
1967 GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset,
1968 QualType SourceTy, unsigned SourceOffset) const {
1969 // The only three choices we have are either double, <2 x float>, or float. We
1970 // pass as float if the last 4 bytes is just padding. This happens for
1971 // structs that contain 3 floats.
1972 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32,
1973 SourceOffset*8+64, getContext()))
1974 return llvm::Type::getFloatTy(getVMContext());
1976 // We want to pass as <2 x float> if the LLVM IR type contains a float at
1977 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the
1979 if (ContainsFloatAtOffset(IRType, IROffset, getDataLayout()) &&
1980 ContainsFloatAtOffset(IRType, IROffset+4, getDataLayout()))
1981 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2);
1983 return llvm::Type::getDoubleTy(getVMContext());
1987 /// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in
1988 /// an 8-byte GPR. This means that we either have a scalar or we are talking
1989 /// about the high or low part of an up-to-16-byte struct. This routine picks
1990 /// the best LLVM IR type to represent this, which may be i64 or may be anything
1991 /// else that the backend will pass in a GPR that works better (e.g. i8, %foo*,
1994 /// PrefType is an LLVM IR type that corresponds to (part of) the IR type for
1995 /// the source type. IROffset is an offset in bytes into the LLVM IR type that
1996 /// the 8-byte value references. PrefType may be null.
1998 /// SourceTy is the source level type for the entire argument. SourceOffset is
1999 /// an offset into this that we're processing (which is always either 0 or 8).
2001 llvm::Type *X86_64ABIInfo::
2002 GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset,
2003 QualType SourceTy, unsigned SourceOffset) const {
2004 // If we're dealing with an un-offset LLVM IR type, then it means that we're
2005 // returning an 8-byte unit starting with it. See if we can safely use it.
2006 if (IROffset == 0) {
2007 // Pointers and int64's always fill the 8-byte unit.
2008 if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) ||
2009 IRType->isIntegerTy(64))
2012 // If we have a 1/2/4-byte integer, we can use it only if the rest of the
2013 // goodness in the source type is just tail padding. This is allowed to
2014 // kick in for struct {double,int} on the int, but not on
2015 // struct{double,int,int} because we wouldn't return the second int. We
2016 // have to do this analysis on the source type because we can't depend on
2017 // unions being lowered a specific way etc.
2018 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) ||
2019 IRType->isIntegerTy(32) ||
2020 (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) {
2021 unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 :
2022 cast<llvm::IntegerType>(IRType)->getBitWidth();
2024 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth,
2025 SourceOffset*8+64, getContext()))
2030 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
2031 // If this is a struct, recurse into the field at the specified offset.
2032 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy);
2033 if (IROffset < SL->getSizeInBytes()) {
2034 unsigned FieldIdx = SL->getElementContainingOffset(IROffset);
2035 IROffset -= SL->getElementOffset(FieldIdx);
2037 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset,
2038 SourceTy, SourceOffset);
2042 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
2043 llvm::Type *EltTy = ATy->getElementType();
2044 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy);
2045 unsigned EltOffset = IROffset/EltSize*EltSize;
2046 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy,
2050 // Okay, we don't have any better idea of what to pass, so we pass this in an
2051 // integer register that isn't too big to fit the rest of the struct.
2052 unsigned TySizeInBytes =
2053 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity();
2055 assert(TySizeInBytes != SourceOffset && "Empty field?");
2057 // It is always safe to classify this as an integer type up to i64 that
2058 // isn't larger than the structure.
2059 return llvm::IntegerType::get(getVMContext(),
2060 std::min(TySizeInBytes-SourceOffset, 8U)*8);
2064 /// GetX86_64ByValArgumentPair - Given a high and low type that can ideally
2065 /// be used as elements of a two register pair to pass or return, return a
2066 /// first class aggregate to represent them. For example, if the low part of
2067 /// a by-value argument should be passed as i32* and the high part as float,
2068 /// return {i32*, float}.
2070 GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
2071 const llvm::DataLayout &TD) {
2072 // In order to correctly satisfy the ABI, we need to the high part to start
2073 // at offset 8. If the high and low parts we inferred are both 4-byte types
2074 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have
2075 // the second element at offset 8. Check for this:
2076 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo);
2077 unsigned HiAlign = TD.getABITypeAlignment(Hi);
2078 unsigned HiStart = llvm::DataLayout::RoundUpAlignment(LoSize, HiAlign);
2079 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!");
2081 // To handle this, we have to increase the size of the low part so that the
2082 // second element will start at an 8 byte offset. We can't increase the size
2083 // of the second element because it might make us access off the end of the
2086 // There are only two sorts of types the ABI generation code can produce for
2087 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32.
2088 // Promote these to a larger type.
2089 if (Lo->isFloatTy())
2090 Lo = llvm::Type::getDoubleTy(Lo->getContext());
2092 assert(Lo->isIntegerTy() && "Invalid/unknown lo type");
2093 Lo = llvm::Type::getInt64Ty(Lo->getContext());
2097 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL);
2100 // Verify that the second element is at an 8-byte offset.
2101 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 &&
2102 "Invalid x86-64 argument pair!");
2106 ABIArgInfo X86_64ABIInfo::
2107 classifyReturnType(QualType RetTy) const {
2108 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the
2109 // classification algorithm.
2110 X86_64ABIInfo::Class Lo, Hi;
2111 classify(RetTy, 0, Lo, Hi, /*isNamedArg*/ true);
2113 // Check some invariants.
2114 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
2115 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
2117 llvm::Type *ResType = 0;
2121 return ABIArgInfo::getIgnore();
2122 // If the low part is just padding, it takes no register, leave ResType
2124 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
2125 "Unknown missing lo part");
2130 llvm_unreachable("Invalid classification for lo word.");
2132 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via
2135 return getIndirectReturnResult(RetTy);
2137 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next
2138 // available register of the sequence %rax, %rdx is used.
2140 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
2142 // If we have a sign or zero extended integer, make sure to return Extend
2143 // so that the parameter gets the right LLVM IR attributes.
2144 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
2145 // Treat an enum type as its underlying type.
2146 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
2147 RetTy = EnumTy->getDecl()->getIntegerType();
2149 if (RetTy->isIntegralOrEnumerationType() &&
2150 RetTy->isPromotableIntegerType())
2151 return ABIArgInfo::getExtend();
2155 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
2156 // available SSE register of the sequence %xmm0, %xmm1 is used.
2158 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
2161 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
2162 // returned on the X87 stack in %st0 as 80-bit x87 number.
2164 ResType = llvm::Type::getX86_FP80Ty(getVMContext());
2167 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real
2168 // part of the value is returned in %st0 and the imaginary part in
2171 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification.");
2172 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()),
2173 llvm::Type::getX86_FP80Ty(getVMContext()),
2178 llvm::Type *HighPart = 0;
2180 // Memory was handled previously and X87 should
2181 // never occur as a hi class.
2184 llvm_unreachable("Invalid classification for hi word.");
2186 case ComplexX87: // Previously handled.
2191 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2192 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2193 return ABIArgInfo::getDirect(HighPart, 8);
2196 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2197 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2198 return ABIArgInfo::getDirect(HighPart, 8);
2201 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
2202 // is passed in the next available eightbyte chunk if the last used
2205 // SSEUP should always be preceded by SSE, just widen.
2207 assert(Lo == SSE && "Unexpected SSEUp classification.");
2208 ResType = GetByteVectorType(RetTy);
2211 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
2212 // returned together with the previous X87 value in %st0.
2214 // If X87Up is preceded by X87, we don't need to do
2215 // anything. However, in some cases with unions it may not be
2216 // preceded by X87. In such situations we follow gcc and pass the
2217 // extra bits in an SSE reg.
2219 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2220 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2221 return ABIArgInfo::getDirect(HighPart, 8);
2226 // If a high part was specified, merge it together with the low part. It is
2227 // known to pass in the high eightbyte of the result. We do this by forming a
2228 // first class struct aggregate with the high and low part: {low, high}
2230 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout());
2232 return ABIArgInfo::getDirect(ResType);
2235 ABIArgInfo X86_64ABIInfo::classifyArgumentType(
2236 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE,
2240 X86_64ABIInfo::Class Lo, Hi;
2241 classify(Ty, 0, Lo, Hi, isNamedArg);
2243 // Check some invariants.
2244 // FIXME: Enforce these by construction.
2245 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
2246 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
2250 llvm::Type *ResType = 0;
2254 return ABIArgInfo::getIgnore();
2255 // If the low part is just padding, it takes no register, leave ResType
2257 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
2258 "Unknown missing lo part");
2261 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument
2265 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or
2266 // COMPLEX_X87, it is passed in memory.
2269 if (getRecordArgABI(Ty, getCXXABI()) == CGCXXABI::RAA_Indirect)
2271 return getIndirectResult(Ty, freeIntRegs);
2275 llvm_unreachable("Invalid classification for lo word.");
2277 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next
2278 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8
2283 // Pick an 8-byte type based on the preferred type.
2284 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0);
2286 // If we have a sign or zero extended integer, make sure to return Extend
2287 // so that the parameter gets the right LLVM IR attributes.
2288 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
2289 // Treat an enum type as its underlying type.
2290 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2291 Ty = EnumTy->getDecl()->getIntegerType();
2293 if (Ty->isIntegralOrEnumerationType() &&
2294 Ty->isPromotableIntegerType())
2295 return ABIArgInfo::getExtend();
2300 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next
2301 // available SSE register is used, the registers are taken in the
2302 // order from %xmm0 to %xmm7.
2304 llvm::Type *IRType = CGT.ConvertType(Ty);
2305 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0);
2311 llvm::Type *HighPart = 0;
2313 // Memory was handled previously, ComplexX87 and X87 should
2314 // never occur as hi classes, and X87Up must be preceded by X87,
2315 // which is passed in memory.
2319 llvm_unreachable("Invalid classification for hi word.");
2321 case NoClass: break;
2325 // Pick an 8-byte type based on the preferred type.
2326 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
2328 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
2329 return ABIArgInfo::getDirect(HighPart, 8);
2332 // X87Up generally doesn't occur here (long double is passed in
2333 // memory), except in situations involving unions.
2336 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
2338 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
2339 return ABIArgInfo::getDirect(HighPart, 8);
2344 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
2345 // eightbyte is passed in the upper half of the last used SSE
2346 // register. This only happens when 128-bit vectors are passed.
2348 assert(Lo == SSE && "Unexpected SSEUp classification");
2349 ResType = GetByteVectorType(Ty);
2353 // If a high part was specified, merge it together with the low part. It is
2354 // known to pass in the high eightbyte of the result. We do this by forming a
2355 // first class struct aggregate with the high and low part: {low, high}
2357 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout());
2359 return ABIArgInfo::getDirect(ResType);
2362 void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
2364 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2366 // Keep track of the number of assigned registers.
2367 unsigned freeIntRegs = 6, freeSSERegs = 8;
2369 // If the return value is indirect, then the hidden argument is consuming one
2370 // integer register.
2371 if (FI.getReturnInfo().isIndirect())
2374 bool isVariadic = FI.isVariadic();
2375 unsigned numRequiredArgs = 0;
2377 numRequiredArgs = FI.getRequiredArgs().getNumRequiredArgs();
2379 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers
2380 // get assigned (in left-to-right order) for passing as follows...
2381 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2383 bool isNamedArg = true;
2385 isNamedArg = (it - FI.arg_begin()) <
2386 static_cast<signed>(numRequiredArgs);
2388 unsigned neededInt, neededSSE;
2389 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt,
2390 neededSSE, isNamedArg);
2392 // AMD64-ABI 3.2.3p3: If there are no registers available for any
2393 // eightbyte of an argument, the whole argument is passed on the
2394 // stack. If registers have already been assigned for some
2395 // eightbytes of such an argument, the assignments get reverted.
2396 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) {
2397 freeIntRegs -= neededInt;
2398 freeSSERegs -= neededSSE;
2400 it->info = getIndirectResult(it->type, freeIntRegs);
2405 static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr,
2407 CodeGenFunction &CGF) {
2408 llvm::Value *overflow_arg_area_p =
2409 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p");
2410 llvm::Value *overflow_arg_area =
2411 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area");
2413 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16
2414 // byte boundary if alignment needed by type exceeds 8 byte boundary.
2415 // It isn't stated explicitly in the standard, but in practice we use
2416 // alignment greater than 16 where necessary.
2417 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
2419 // overflow_arg_area = (overflow_arg_area + align - 1) & -align;
2420 llvm::Value *Offset =
2421 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1);
2422 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset);
2423 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area,
2425 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align);
2427 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
2428 overflow_arg_area->getType(),
2429 "overflow_arg_area.align");
2432 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area.
2433 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
2435 CGF.Builder.CreateBitCast(overflow_arg_area,
2436 llvm::PointerType::getUnqual(LTy));
2438 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to:
2439 // l->overflow_arg_area + sizeof(type).
2440 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to
2441 // an 8 byte boundary.
2443 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8;
2444 llvm::Value *Offset =
2445 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7);
2446 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset,
2447 "overflow_arg_area.next");
2448 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p);
2450 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type.
2454 llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2455 CodeGenFunction &CGF) const {
2456 // Assume that va_list type is correct; should be pointer to LLVM type:
2460 // i8* overflow_arg_area;
2461 // i8* reg_save_area;
2463 unsigned neededInt, neededSSE;
2465 Ty = CGF.getContext().getCanonicalType(Ty);
2466 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE,
2467 /*isNamedArg*/false);
2469 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed
2470 // in the registers. If not go to step 7.
2471 if (!neededInt && !neededSSE)
2472 return EmitVAArgFromMemory(VAListAddr, Ty, CGF);
2474 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
2475 // general purpose registers needed to pass type and num_fp to hold
2476 // the number of floating point registers needed.
2478 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into
2479 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or
2480 // l->fp_offset > 304 - num_fp * 16 go to step 7.
2482 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of
2483 // register save space).
2485 llvm::Value *InRegs = 0;
2486 llvm::Value *gp_offset_p = 0, *gp_offset = 0;
2487 llvm::Value *fp_offset_p = 0, *fp_offset = 0;
2489 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p");
2490 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset");
2491 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8);
2492 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp");
2496 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p");
2497 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset");
2498 llvm::Value *FitsInFP =
2499 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16);
2500 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp");
2501 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP;
2504 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
2505 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
2506 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
2507 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
2509 // Emit code to load the value if it was passed in registers.
2511 CGF.EmitBlock(InRegBlock);
2513 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with
2514 // an offset of l->gp_offset and/or l->fp_offset. This may require
2515 // copying to a temporary location in case the parameter is passed
2516 // in different register classes or requires an alignment greater
2517 // than 8 for general purpose registers and 16 for XMM registers.
2519 // FIXME: This really results in shameful code when we end up needing to
2520 // collect arguments from different places; often what should result in a
2521 // simple assembling of a structure from scattered addresses has many more
2522 // loads than necessary. Can we clean this up?
2523 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
2524 llvm::Value *RegAddr =
2525 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3),
2527 if (neededInt && neededSSE) {
2529 assert(AI.isDirect() && "Unexpected ABI info for mixed regs");
2530 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType());
2531 llvm::Value *Tmp = CGF.CreateMemTemp(Ty);
2532 Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo());
2533 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs");
2534 llvm::Type *TyLo = ST->getElementType(0);
2535 llvm::Type *TyHi = ST->getElementType(1);
2536 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) &&
2537 "Unexpected ABI info for mixed regs");
2538 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo);
2539 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
2540 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2541 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2542 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr;
2543 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr;
2545 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
2546 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
2547 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
2548 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
2550 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2551 llvm::PointerType::getUnqual(LTy));
2552 } else if (neededInt) {
2553 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2554 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2555 llvm::PointerType::getUnqual(LTy));
2557 // Copy to a temporary if necessary to ensure the appropriate alignment.
2558 std::pair<CharUnits, CharUnits> SizeAlign =
2559 CGF.getContext().getTypeInfoInChars(Ty);
2560 uint64_t TySize = SizeAlign.first.getQuantity();
2561 unsigned TyAlign = SizeAlign.second.getQuantity();
2563 llvm::Value *Tmp = CGF.CreateMemTemp(Ty);
2564 CGF.Builder.CreateMemCpy(Tmp, RegAddr, TySize, 8, false);
2567 } else if (neededSSE == 1) {
2568 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2569 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2570 llvm::PointerType::getUnqual(LTy));
2572 assert(neededSSE == 2 && "Invalid number of needed registers!");
2573 // SSE registers are spaced 16 bytes apart in the register save
2574 // area, we need to collect the two eightbytes together.
2575 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2576 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16);
2577 llvm::Type *DoubleTy = CGF.DoubleTy;
2578 llvm::Type *DblPtrTy =
2579 llvm::PointerType::getUnqual(DoubleTy);
2580 llvm::StructType *ST = llvm::StructType::get(DoubleTy, DoubleTy, NULL);
2581 llvm::Value *V, *Tmp = CGF.CreateMemTemp(Ty);
2582 Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo());
2583 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
2585 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
2586 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
2588 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
2589 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2590 llvm::PointerType::getUnqual(LTy));
2593 // AMD64-ABI 3.5.7p5: Step 5. Set:
2594 // l->gp_offset = l->gp_offset + num_gp * 8
2595 // l->fp_offset = l->fp_offset + num_fp * 16.
2597 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8);
2598 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset),
2602 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16);
2603 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset),
2606 CGF.EmitBranch(ContBlock);
2608 // Emit code to load the value if it was passed in memory.
2610 CGF.EmitBlock(InMemBlock);
2611 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF);
2613 // Return the appropriate result.
2615 CGF.EmitBlock(ContBlock);
2616 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2,
2618 ResAddr->addIncoming(RegAddr, InRegBlock);
2619 ResAddr->addIncoming(MemAddr, InMemBlock);
2623 ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty, bool IsReturnType) const {
2625 if (Ty->isVoidType())
2626 return ABIArgInfo::getIgnore();
2628 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2629 Ty = EnumTy->getDecl()->getIntegerType();
2631 uint64_t Size = getContext().getTypeSize(Ty);
2633 if (const RecordType *RT = Ty->getAs<RecordType>()) {
2635 if (isRecordReturnIndirect(RT, getCXXABI()))
2636 return ABIArgInfo::getIndirect(0, false);
2638 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI()))
2639 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
2642 if (RT->getDecl()->hasFlexibleArrayMember())
2643 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2645 // FIXME: mingw-w64-gcc emits 128-bit struct as i128
2646 if (Size == 128 && getTarget().getTriple().getOS() == llvm::Triple::MinGW32)
2647 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2650 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is
2651 // not 1, 2, 4, or 8 bytes, must be passed by reference."
2653 (Size & (Size - 1)) == 0)
2654 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2657 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2660 if (Ty->isPromotableIntegerType())
2661 return ABIArgInfo::getExtend();
2663 return ABIArgInfo::getDirect();
2666 void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
2668 QualType RetTy = FI.getReturnType();
2669 FI.getReturnInfo() = classify(RetTy, true);
2671 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2673 it->info = classify(it->type, false);
2676 llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2677 CodeGenFunction &CGF) const {
2678 llvm::Type *BPP = CGF.Int8PtrPtrTy;
2680 CGBuilderTy &Builder = CGF.Builder;
2681 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
2683 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
2685 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
2686 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
2689 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8);
2690 llvm::Value *NextAddr =
2691 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
2693 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
2700 class NaClX86_64ABIInfo : public ABIInfo {
2702 NaClX86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX)
2703 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, HasAVX) {}
2704 virtual void computeInfo(CGFunctionInfo &FI) const;
2705 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2706 CodeGenFunction &CGF) const;
2708 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv.
2709 X86_64ABIInfo NInfo; // Used for everything else.
2712 class NaClX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
2714 NaClX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX)
2715 : TargetCodeGenInfo(new NaClX86_64ABIInfo(CGT, HasAVX)) {}
2720 void NaClX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
2721 if (FI.getASTCallingConvention() == CC_PnaclCall)
2722 PInfo.computeInfo(FI);
2724 NInfo.computeInfo(FI);
2727 llvm::Value *NaClX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2728 CodeGenFunction &CGF) const {
2729 // Always use the native convention; calling pnacl-style varargs functions
2731 return NInfo.EmitVAArg(VAListAddr, Ty, CGF);
2737 /// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information.
2738 class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
2740 PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
2742 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2743 CodeGenFunction &CGF) const;
2746 class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
2748 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT)) {}
2750 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2751 // This is recovered from gcc output.
2752 return 1; // r1 is the dedicated stack pointer
2755 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2756 llvm::Value *Address) const;
2761 llvm::Value *PPC32_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr,
2763 CodeGenFunction &CGF) const {
2764 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
2765 // TODO: Implement this. For now ignore.
2770 bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
2771 bool isInt = Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType();
2772 llvm::Type *CharPtr = CGF.Int8PtrTy;
2773 llvm::Type *CharPtrPtr = CGF.Int8PtrPtrTy;
2775 CGBuilderTy &Builder = CGF.Builder;
2776 llvm::Value *GPRPtr = Builder.CreateBitCast(VAListAddr, CharPtr, "gprptr");
2777 llvm::Value *GPRPtrAsInt = Builder.CreatePtrToInt(GPRPtr, CGF.Int32Ty);
2778 llvm::Value *FPRPtrAsInt = Builder.CreateAdd(GPRPtrAsInt, Builder.getInt32(1));
2779 llvm::Value *FPRPtr = Builder.CreateIntToPtr(FPRPtrAsInt, CharPtr);
2780 llvm::Value *OverflowAreaPtrAsInt = Builder.CreateAdd(FPRPtrAsInt, Builder.getInt32(3));
2781 llvm::Value *OverflowAreaPtr = Builder.CreateIntToPtr(OverflowAreaPtrAsInt, CharPtrPtr);
2782 llvm::Value *RegsaveAreaPtrAsInt = Builder.CreateAdd(OverflowAreaPtrAsInt, Builder.getInt32(4));
2783 llvm::Value *RegsaveAreaPtr = Builder.CreateIntToPtr(RegsaveAreaPtrAsInt, CharPtrPtr);
2784 llvm::Value *GPR = Builder.CreateLoad(GPRPtr, false, "gpr");
2785 // Align GPR when TY is i64.
2787 llvm::Value *GPRAnd = Builder.CreateAnd(GPR, Builder.getInt8(1));
2788 llvm::Value *CC64 = Builder.CreateICmpEQ(GPRAnd, Builder.getInt8(1));
2789 llvm::Value *GPRPlusOne = Builder.CreateAdd(GPR, Builder.getInt8(1));
2790 GPR = Builder.CreateSelect(CC64, GPRPlusOne, GPR);
2792 llvm::Value *FPR = Builder.CreateLoad(FPRPtr, false, "fpr");
2793 llvm::Value *OverflowArea = Builder.CreateLoad(OverflowAreaPtr, false, "overflow_area");
2794 llvm::Value *OverflowAreaAsInt = Builder.CreatePtrToInt(OverflowArea, CGF.Int32Ty);
2795 llvm::Value *RegsaveArea = Builder.CreateLoad(RegsaveAreaPtr, false, "regsave_area");
2796 llvm::Value *RegsaveAreaAsInt = Builder.CreatePtrToInt(RegsaveArea, CGF.Int32Ty);
2798 llvm::Value *CC = Builder.CreateICmpULT(isInt ? GPR : FPR,
2799 Builder.getInt8(8), "cond");
2801 llvm::Value *RegConstant = Builder.CreateMul(isInt ? GPR : FPR,
2802 Builder.getInt8(isInt ? 4 : 8));
2804 llvm::Value *OurReg = Builder.CreateAdd(RegsaveAreaAsInt, Builder.CreateSExt(RegConstant, CGF.Int32Ty));
2806 if (Ty->isFloatingType())
2807 OurReg = Builder.CreateAdd(OurReg, Builder.getInt32(32));
2809 llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs");
2810 llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow");
2811 llvm::BasicBlock *Cont = CGF.createBasicBlock("cont");
2813 Builder.CreateCondBr(CC, UsingRegs, UsingOverflow);
2815 CGF.EmitBlock(UsingRegs);
2817 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
2818 llvm::Value *Result1 = Builder.CreateIntToPtr(OurReg, PTy);
2819 // Increase the GPR/FPR indexes.
2821 GPR = Builder.CreateAdd(GPR, Builder.getInt8(isI64 ? 2 : 1));
2822 Builder.CreateStore(GPR, GPRPtr);
2824 FPR = Builder.CreateAdd(FPR, Builder.getInt8(1));
2825 Builder.CreateStore(FPR, FPRPtr);
2827 CGF.EmitBranch(Cont);
2829 CGF.EmitBlock(UsingOverflow);
2831 // Increase the overflow area.
2832 llvm::Value *Result2 = Builder.CreateIntToPtr(OverflowAreaAsInt, PTy);
2833 OverflowAreaAsInt = Builder.CreateAdd(OverflowAreaAsInt, Builder.getInt32(isInt ? 4 : 8));
2834 Builder.CreateStore(Builder.CreateIntToPtr(OverflowAreaAsInt, CharPtr), OverflowAreaPtr);
2835 CGF.EmitBranch(Cont);
2837 CGF.EmitBlock(Cont);
2839 llvm::PHINode *Result = CGF.Builder.CreatePHI(PTy, 2, "vaarg.addr");
2840 Result->addIncoming(Result1, UsingRegs);
2841 Result->addIncoming(Result2, UsingOverflow);
2843 if (Ty->isAggregateType()) {
2844 llvm::Value *AGGPtr = Builder.CreateBitCast(Result, CharPtrPtr, "aggrptr") ;
2845 return Builder.CreateLoad(AGGPtr, false, "aggr");
2852 PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2853 llvm::Value *Address) const {
2854 // This is calculated from the LLVM and GCC tables and verified
2855 // against gcc output. AFAIK all ABIs use the same encoding.
2857 CodeGen::CGBuilderTy &Builder = CGF.Builder;
2859 llvm::IntegerType *i8 = CGF.Int8Ty;
2860 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
2861 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
2862 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
2864 // 0-31: r0-31, the 4-byte general-purpose registers
2865 AssignToArrayRange(Builder, Address, Four8, 0, 31);
2867 // 32-63: fp0-31, the 8-byte floating-point registers
2868 AssignToArrayRange(Builder, Address, Eight8, 32, 63);
2870 // 64-76 are various 4-byte special-purpose registers:
2877 AssignToArrayRange(Builder, Address, Four8, 64, 76);
2879 // 77-108: v0-31, the 16-byte vector registers
2880 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
2887 AssignToArrayRange(Builder, Address, Four8, 109, 113);
2895 /// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information.
2896 class PPC64_SVR4_ABIInfo : public DefaultABIInfo {
2899 PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
2901 bool isPromotableTypeForABI(QualType Ty) const;
2903 ABIArgInfo classifyReturnType(QualType RetTy) const;
2904 ABIArgInfo classifyArgumentType(QualType Ty) const;
2906 // TODO: We can add more logic to computeInfo to improve performance.
2907 // Example: For aggregate arguments that fit in a register, we could
2908 // use getDirectInReg (as is done below for structs containing a single
2909 // floating-point value) to avoid pushing them to memory on function
2910 // entry. This would require changing the logic in PPCISelLowering
2911 // when lowering the parameters in the caller and args in the callee.
2912 virtual void computeInfo(CGFunctionInfo &FI) const {
2913 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2914 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2916 // We rely on the default argument classification for the most part.
2917 // One exception: An aggregate containing a single floating-point
2918 // or vector item must be passed in a register if one is available.
2919 const Type *T = isSingleElementStruct(it->type, getContext());
2921 const BuiltinType *BT = T->getAs<BuiltinType>();
2922 if (T->isVectorType() || (BT && BT->isFloatingPoint())) {
2924 it->info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT));
2928 it->info = classifyArgumentType(it->type);
2932 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr,
2934 CodeGenFunction &CGF) const;
2937 class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
2939 PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT)
2940 : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT)) {}
2942 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2943 // This is recovered from gcc output.
2944 return 1; // r1 is the dedicated stack pointer
2947 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2948 llvm::Value *Address) const;
2951 class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
2953 PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
2955 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2956 // This is recovered from gcc output.
2957 return 1; // r1 is the dedicated stack pointer
2960 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2961 llvm::Value *Address) const;
2966 // Return true if the ABI requires Ty to be passed sign- or zero-
2967 // extended to 64 bits.
2969 PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const {
2970 // Treat an enum type as its underlying type.
2971 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2972 Ty = EnumTy->getDecl()->getIntegerType();
2974 // Promotable integer types are required to be promoted by the ABI.
2975 if (Ty->isPromotableIntegerType())
2978 // In addition to the usual promotable integer types, we also need to
2979 // extend all 32-bit types, since the ABI requires promotion to 64 bits.
2980 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
2981 switch (BT->getKind()) {
2982 case BuiltinType::Int:
2983 case BuiltinType::UInt:
2993 PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const {
2994 if (Ty->isAnyComplexType())
2995 return ABIArgInfo::getDirect();
2997 if (isAggregateTypeForABI(Ty)) {
2998 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
2999 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
3001 return ABIArgInfo::getIndirect(0);
3004 return (isPromotableTypeForABI(Ty) ?
3005 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3009 PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const {
3010 if (RetTy->isVoidType())
3011 return ABIArgInfo::getIgnore();
3013 if (RetTy->isAnyComplexType())
3014 return ABIArgInfo::getDirect();
3016 if (isAggregateTypeForABI(RetTy))
3017 return ABIArgInfo::getIndirect(0);
3019 return (isPromotableTypeForABI(RetTy) ?
3020 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3023 // Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine.
3024 llvm::Value *PPC64_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr,
3026 CodeGenFunction &CGF) const {
3027 llvm::Type *BP = CGF.Int8PtrTy;
3028 llvm::Type *BPP = CGF.Int8PtrPtrTy;
3030 CGBuilderTy &Builder = CGF.Builder;
3031 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
3032 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
3034 // Update the va_list pointer. The pointer should be bumped by the
3035 // size of the object. We can trust getTypeSize() except for a complex
3036 // type whose base type is smaller than a doubleword. For these, the
3037 // size of the object is 16 bytes; see below for further explanation.
3038 unsigned SizeInBytes = CGF.getContext().getTypeSize(Ty) / 8;
3040 unsigned CplxBaseSize = 0;
3042 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
3043 BaseTy = CTy->getElementType();
3044 CplxBaseSize = CGF.getContext().getTypeSize(BaseTy) / 8;
3045 if (CplxBaseSize < 8)
3049 unsigned Offset = llvm::RoundUpToAlignment(SizeInBytes, 8);
3050 llvm::Value *NextAddr =
3051 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int64Ty, Offset),
3053 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
3055 // If we have a complex type and the base type is smaller than 8 bytes,
3056 // the ABI calls for the real and imaginary parts to be right-adjusted
3057 // in separate doublewords. However, Clang expects us to produce a
3058 // pointer to a structure with the two parts packed tightly. So generate
3059 // loads of the real and imaginary parts relative to the va_list pointer,
3060 // and store them to a temporary structure.
3061 if (CplxBaseSize && CplxBaseSize < 8) {
3062 llvm::Value *RealAddr = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
3063 llvm::Value *ImagAddr = RealAddr;
3064 RealAddr = Builder.CreateAdd(RealAddr, Builder.getInt64(8 - CplxBaseSize));
3065 ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(16 - CplxBaseSize));
3066 llvm::Type *PBaseTy = llvm::PointerType::getUnqual(CGF.ConvertType(BaseTy));
3067 RealAddr = Builder.CreateIntToPtr(RealAddr, PBaseTy);
3068 ImagAddr = Builder.CreateIntToPtr(ImagAddr, PBaseTy);
3069 llvm::Value *Real = Builder.CreateLoad(RealAddr, false, ".vareal");
3070 llvm::Value *Imag = Builder.CreateLoad(ImagAddr, false, ".vaimag");
3071 llvm::Value *Ptr = CGF.CreateTempAlloca(CGT.ConvertTypeForMem(Ty),
3073 llvm::Value *RealPtr = Builder.CreateStructGEP(Ptr, 0, ".real");
3074 llvm::Value *ImagPtr = Builder.CreateStructGEP(Ptr, 1, ".imag");
3075 Builder.CreateStore(Real, RealPtr, false);
3076 Builder.CreateStore(Imag, ImagPtr, false);
3080 // If the argument is smaller than 8 bytes, it is right-adjusted in
3081 // its doubleword slot. Adjust the pointer to pick it up from the
3083 if (SizeInBytes < 8) {
3084 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
3085 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt64(8 - SizeInBytes));
3086 Addr = Builder.CreateIntToPtr(AddrAsInt, BP);
3089 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
3090 return Builder.CreateBitCast(Addr, PTy);
3094 PPC64_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3095 llvm::Value *Address) {
3096 // This is calculated from the LLVM and GCC tables and verified
3097 // against gcc output. AFAIK all ABIs use the same encoding.
3099 CodeGen::CGBuilderTy &Builder = CGF.Builder;
3101 llvm::IntegerType *i8 = CGF.Int8Ty;
3102 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
3103 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
3104 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
3106 // 0-31: r0-31, the 8-byte general-purpose registers
3107 AssignToArrayRange(Builder, Address, Eight8, 0, 31);
3109 // 32-63: fp0-31, the 8-byte floating-point registers
3110 AssignToArrayRange(Builder, Address, Eight8, 32, 63);
3112 // 64-76 are various 4-byte special-purpose registers:
3119 AssignToArrayRange(Builder, Address, Four8, 64, 76);
3121 // 77-108: v0-31, the 16-byte vector registers
3122 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
3129 AssignToArrayRange(Builder, Address, Four8, 109, 113);
3135 PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable(
3136 CodeGen::CodeGenFunction &CGF,
3137 llvm::Value *Address) const {
3139 return PPC64_initDwarfEHRegSizeTable(CGF, Address);
3143 PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3144 llvm::Value *Address) const {
3146 return PPC64_initDwarfEHRegSizeTable(CGF, Address);
3149 //===----------------------------------------------------------------------===//
3150 // ARM ABI Implementation
3151 //===----------------------------------------------------------------------===//
3155 class ARMABIInfo : public ABIInfo {
3167 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {
3171 bool isEABI() const {
3172 StringRef Env = getTarget().getTriple().getEnvironmentName();
3173 return (Env == "gnueabi" || Env == "eabi" ||
3174 Env == "android" || Env == "androideabi");
3177 ABIKind getABIKind() const { return Kind; }
3180 ABIArgInfo classifyReturnType(QualType RetTy) const;
3181 ABIArgInfo classifyArgumentType(QualType RetTy, int *VFPRegs,
3182 unsigned &AllocatedVFP,
3184 bool isIllegalVectorType(QualType Ty) const;
3186 virtual void computeInfo(CGFunctionInfo &FI) const;
3188 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3189 CodeGenFunction &CGF) const;
3191 llvm::CallingConv::ID getLLVMDefaultCC() const;
3192 llvm::CallingConv::ID getABIDefaultCC() const;
3193 void setRuntimeCC();
3196 class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
3198 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K)
3199 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {}
3201 const ARMABIInfo &getABIInfo() const {
3202 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo());
3205 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
3209 StringRef getARCRetainAutoreleasedReturnValueMarker() const {
3210 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue";
3213 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3214 llvm::Value *Address) const {
3215 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
3217 // 0-15 are the 16 integer registers.
3218 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15);
3222 unsigned getSizeOfUnwindException() const {
3223 if (getABIInfo().isEABI()) return 88;
3224 return TargetCodeGenInfo::getSizeOfUnwindException();
3227 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
3228 CodeGen::CodeGenModule &CGM) const {
3229 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
3233 const ARMInterruptAttr *Attr = FD->getAttr<ARMInterruptAttr>();
3238 switch (Attr->getInterrupt()) {
3239 case ARMInterruptAttr::Generic: Kind = ""; break;
3240 case ARMInterruptAttr::IRQ: Kind = "IRQ"; break;
3241 case ARMInterruptAttr::FIQ: Kind = "FIQ"; break;
3242 case ARMInterruptAttr::SWI: Kind = "SWI"; break;
3243 case ARMInterruptAttr::ABORT: Kind = "ABORT"; break;
3244 case ARMInterruptAttr::UNDEF: Kind = "UNDEF"; break;
3247 llvm::Function *Fn = cast<llvm::Function>(GV);
3249 Fn->addFnAttr("interrupt", Kind);
3251 if (cast<ARMABIInfo>(getABIInfo()).getABIKind() == ARMABIInfo::APCS)
3254 // AAPCS guarantees that sp will be 8-byte aligned on any public interface,
3255 // however this is not necessarily true on taking any interrupt. Instruct
3256 // the backend to perform a realignment as part of the function prologue.
3257 llvm::AttrBuilder B;
3258 B.addStackAlignmentAttr(8);
3259 Fn->addAttributes(llvm::AttributeSet::FunctionIndex,
3260 llvm::AttributeSet::get(CGM.getLLVMContext(),
3261 llvm::AttributeSet::FunctionIndex,
3269 void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
3270 // To correctly handle Homogeneous Aggregate, we need to keep track of the
3271 // VFP registers allocated so far.
3272 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive
3273 // VFP registers of the appropriate type unallocated then the argument is
3274 // allocated to the lowest-numbered sequence of such registers.
3275 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are
3276 // unallocated are marked as unavailable.
3277 unsigned AllocatedVFP = 0;
3278 int VFPRegs[16] = { 0 };
3279 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
3280 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
3282 unsigned PreAllocation = AllocatedVFP;
3284 // 6.1.2.3 There is one VFP co-processor register class using registers
3285 // s0-s15 (d0-d7) for passing arguments.
3286 const unsigned NumVFPs = 16;
3287 it->info = classifyArgumentType(it->type, VFPRegs, AllocatedVFP, IsHA);
3288 // If we do not have enough VFP registers for the HA, any VFP registers
3289 // that are unallocated are marked as unavailable. To achieve this, we add
3290 // padding of (NumVFPs - PreAllocation) floats.
3291 if (IsHA && AllocatedVFP > NumVFPs && PreAllocation < NumVFPs) {
3292 llvm::Type *PaddingTy = llvm::ArrayType::get(
3293 llvm::Type::getFloatTy(getVMContext()), NumVFPs - PreAllocation);
3294 it->info = ABIArgInfo::getExpandWithPadding(false, PaddingTy);
3298 // Always honor user-specified calling convention.
3299 if (FI.getCallingConvention() != llvm::CallingConv::C)
3302 llvm::CallingConv::ID cc = getRuntimeCC();
3303 if (cc != llvm::CallingConv::C)
3304 FI.setEffectiveCallingConvention(cc);
3307 /// Return the default calling convention that LLVM will use.
3308 llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const {
3309 // The default calling convention that LLVM will infer.
3310 if (getTarget().getTriple().getEnvironmentName()=="gnueabihf")
3311 return llvm::CallingConv::ARM_AAPCS_VFP;
3313 return llvm::CallingConv::ARM_AAPCS;
3315 return llvm::CallingConv::ARM_APCS;
3318 /// Return the calling convention that our ABI would like us to use
3319 /// as the C calling convention.
3320 llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const {
3321 switch (getABIKind()) {
3322 case APCS: return llvm::CallingConv::ARM_APCS;
3323 case AAPCS: return llvm::CallingConv::ARM_AAPCS;
3324 case AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP;
3326 llvm_unreachable("bad ABI kind");
3329 void ARMABIInfo::setRuntimeCC() {
3330 assert(getRuntimeCC() == llvm::CallingConv::C);
3332 // Don't muddy up the IR with a ton of explicit annotations if
3333 // they'd just match what LLVM will infer from the triple.
3334 llvm::CallingConv::ID abiCC = getABIDefaultCC();
3335 if (abiCC != getLLVMDefaultCC())
3339 /// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous
3340 /// aggregate. If HAMembers is non-null, the number of base elements
3341 /// contained in the type is returned through it; this is used for the
3342 /// recursive calls that check aggregate component types.
3343 static bool isHomogeneousAggregate(QualType Ty, const Type *&Base,
3344 ASTContext &Context,
3345 uint64_t *HAMembers = 0) {
3346 uint64_t Members = 0;
3347 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
3348 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members))
3350 Members *= AT->getSize().getZExtValue();
3351 } else if (const RecordType *RT = Ty->getAs<RecordType>()) {
3352 const RecordDecl *RD = RT->getDecl();
3353 if (RD->hasFlexibleArrayMember())
3357 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
3359 const FieldDecl *FD = *i;
3360 uint64_t FldMembers;
3361 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers))
3364 Members = (RD->isUnion() ?
3365 std::max(Members, FldMembers) : Members + FldMembers);
3369 if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
3371 Ty = CT->getElementType();
3374 // Homogeneous aggregates for AAPCS-VFP must have base types of float,
3375 // double, or 64-bit or 128-bit vectors.
3376 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
3377 if (BT->getKind() != BuiltinType::Float &&
3378 BT->getKind() != BuiltinType::Double &&
3379 BT->getKind() != BuiltinType::LongDouble)
3381 } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
3382 unsigned VecSize = Context.getTypeSize(VT);
3383 if (VecSize != 64 && VecSize != 128)
3389 // The base type must be the same for all members. Vector types of the
3390 // same total size are treated as being equivalent here.
3391 const Type *TyPtr = Ty.getTypePtr();
3394 if (Base != TyPtr &&
3395 (!Base->isVectorType() || !TyPtr->isVectorType() ||
3396 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr)))
3400 // Homogeneous Aggregates can have at most 4 members of the base type.
3402 *HAMembers = Members;
3404 return (Members > 0 && Members <= 4);
3407 /// markAllocatedVFPs - update VFPRegs according to the alignment and
3408 /// number of VFP registers (unit is S register) requested.
3409 static void markAllocatedVFPs(int *VFPRegs, unsigned &AllocatedVFP,
3411 unsigned NumRequired) {
3413 if (AllocatedVFP >= 16)
3415 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive
3416 // VFP registers of the appropriate type unallocated then the argument is
3417 // allocated to the lowest-numbered sequence of such registers.
3418 for (unsigned I = 0; I < 16; I += Alignment) {
3419 bool FoundSlot = true;
3420 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++)
3421 if (J >= 16 || VFPRegs[J]) {
3426 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++)
3428 AllocatedVFP += NumRequired;
3432 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are
3433 // unallocated are marked as unavailable.
3434 for (unsigned I = 0; I < 16; I++)
3436 AllocatedVFP = 17; // We do not have enough VFP registers.
3439 ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, int *VFPRegs,
3440 unsigned &AllocatedVFP,
3442 // We update number of allocated VFPs according to
3443 // 6.1.2.1 The following argument types are VFP CPRCs:
3444 // A single-precision floating-point type (including promoted
3445 // half-precision types); A double-precision floating-point type;
3446 // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate
3447 // with a Base Type of a single- or double-precision floating-point type,
3448 // 64-bit containerized vectors or 128-bit containerized vectors with one
3449 // to four Elements.
3451 // Handle illegal vector types here.
3452 if (isIllegalVectorType(Ty)) {
3453 uint64_t Size = getContext().getTypeSize(Ty);
3455 llvm::Type *ResType =
3456 llvm::Type::getInt32Ty(getVMContext());
3457 return ABIArgInfo::getDirect(ResType);
3460 llvm::Type *ResType = llvm::VectorType::get(
3461 llvm::Type::getInt32Ty(getVMContext()), 2);
3462 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2);
3463 return ABIArgInfo::getDirect(ResType);
3466 llvm::Type *ResType = llvm::VectorType::get(
3467 llvm::Type::getInt32Ty(getVMContext()), 4);
3468 markAllocatedVFPs(VFPRegs, AllocatedVFP, 4, 4);
3469 return ABIArgInfo::getDirect(ResType);
3471 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3473 // Update VFPRegs for legal vector types.
3474 if (const VectorType *VT = Ty->getAs<VectorType>()) {
3475 uint64_t Size = getContext().getTypeSize(VT);
3476 // Size of a legal vector should be power of 2 and above 64.
3477 markAllocatedVFPs(VFPRegs, AllocatedVFP, Size >= 128 ? 4 : 2, Size / 32);
3479 // Update VFPRegs for floating point types.
3480 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
3481 if (BT->getKind() == BuiltinType::Half ||
3482 BT->getKind() == BuiltinType::Float)
3483 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, 1);
3484 if (BT->getKind() == BuiltinType::Double ||
3485 BT->getKind() == BuiltinType::LongDouble)
3486 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2);
3489 if (!isAggregateTypeForABI(Ty)) {
3490 // Treat an enum type as its underlying type.
3491 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
3492 Ty = EnumTy->getDecl()->getIntegerType();
3494 return (Ty->isPromotableIntegerType() ?
3495 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3498 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
3499 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
3501 // Ignore empty records.
3502 if (isEmptyRecord(getContext(), Ty, true))
3503 return ABIArgInfo::getIgnore();
3505 if (getABIKind() == ARMABIInfo::AAPCS_VFP) {
3506 // Homogeneous Aggregates need to be expanded when we can fit the aggregate
3507 // into VFP registers.
3508 const Type *Base = 0;
3509 uint64_t Members = 0;
3510 if (isHomogeneousAggregate(Ty, Base, getContext(), &Members)) {
3511 assert(Base && "Base class should be set for homogeneous aggregate");
3512 // Base can be a floating-point or a vector.
3513 if (Base->isVectorType()) {
3514 // ElementSize is in number of floats.
3515 unsigned ElementSize = getContext().getTypeSize(Base) == 64 ? 2 : 4;
3516 markAllocatedVFPs(VFPRegs, AllocatedVFP, ElementSize,
3517 Members * ElementSize);
3518 } else if (Base->isSpecificBuiltinType(BuiltinType::Float))
3519 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, Members);
3521 assert(Base->isSpecificBuiltinType(BuiltinType::Double) ||
3522 Base->isSpecificBuiltinType(BuiltinType::LongDouble));
3523 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, Members * 2);
3526 return ABIArgInfo::getExpand();
3530 // Support byval for ARM.
3531 // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at
3532 // most 8-byte. We realign the indirect argument if type alignment is bigger
3533 // than ABI alignment.
3534 uint64_t ABIAlign = 4;
3535 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8;
3536 if (getABIKind() == ARMABIInfo::AAPCS_VFP ||
3537 getABIKind() == ARMABIInfo::AAPCS)
3538 ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8);
3539 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) {
3540 return ABIArgInfo::getIndirect(0, /*ByVal=*/true,
3541 /*Realign=*/TyAlign > ABIAlign);
3544 // Otherwise, pass by coercing to a structure of the appropriate size.
3547 // FIXME: Try to match the types of the arguments more accurately where
3549 if (getContext().getTypeAlign(Ty) <= 32) {
3550 ElemTy = llvm::Type::getInt32Ty(getVMContext());
3551 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
3553 ElemTy = llvm::Type::getInt64Ty(getVMContext());
3554 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64;
3558 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL);
3559 return ABIArgInfo::getDirect(STy);
3562 static bool isIntegerLikeType(QualType Ty, ASTContext &Context,
3563 llvm::LLVMContext &VMContext) {
3564 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure
3565 // is called integer-like if its size is less than or equal to one word, and
3566 // the offset of each of its addressable sub-fields is zero.
3568 uint64_t Size = Context.getTypeSize(Ty);
3570 // Check that the type fits in a word.
3574 // FIXME: Handle vector types!
3575 if (Ty->isVectorType())
3578 // Float types are never treated as "integer like".
3579 if (Ty->isRealFloatingType())
3582 // If this is a builtin or pointer type then it is ok.
3583 if (Ty->getAs<BuiltinType>() || Ty->isPointerType())
3586 // Small complex integer types are "integer like".
3587 if (const ComplexType *CT = Ty->getAs<ComplexType>())
3588 return isIntegerLikeType(CT->getElementType(), Context, VMContext);
3590 // Single element and zero sized arrays should be allowed, by the definition
3591 // above, but they are not.
3593 // Otherwise, it must be a record type.
3594 const RecordType *RT = Ty->getAs<RecordType>();
3595 if (!RT) return false;
3597 // Ignore records with flexible arrays.
3598 const RecordDecl *RD = RT->getDecl();
3599 if (RD->hasFlexibleArrayMember())
3602 // Check that all sub-fields are at offset 0, and are themselves "integer
3604 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
3606 bool HadField = false;
3608 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
3609 i != e; ++i, ++idx) {
3610 const FieldDecl *FD = *i;
3612 // Bit-fields are not addressable, we only need to verify they are "integer
3613 // like". We still have to disallow a subsequent non-bitfield, for example:
3614 // struct { int : 0; int x }
3615 // is non-integer like according to gcc.
3616 if (FD->isBitField()) {
3620 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
3626 // Check if this field is at offset 0.
3627 if (Layout.getFieldOffset(idx) != 0)
3630 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
3633 // Only allow at most one field in a structure. This doesn't match the
3634 // wording above, but follows gcc in situations with a field following an
3636 if (!RD->isUnion()) {
3647 ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const {
3648 if (RetTy->isVoidType())
3649 return ABIArgInfo::getIgnore();
3651 // Large vector types should be returned via memory.
3652 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128)
3653 return ABIArgInfo::getIndirect(0);
3655 if (!isAggregateTypeForABI(RetTy)) {
3656 // Treat an enum type as its underlying type.
3657 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
3658 RetTy = EnumTy->getDecl()->getIntegerType();
3660 return (RetTy->isPromotableIntegerType() ?
3661 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3664 // Structures with either a non-trivial destructor or a non-trivial
3665 // copy constructor are always indirect.
3666 if (isRecordReturnIndirect(RetTy, getCXXABI()))
3667 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3669 // Are we following APCS?
3670 if (getABIKind() == APCS) {
3671 if (isEmptyRecord(getContext(), RetTy, false))
3672 return ABIArgInfo::getIgnore();
3674 // Complex types are all returned as packed integers.
3676 // FIXME: Consider using 2 x vector types if the back end handles them
3678 if (RetTy->isAnyComplexType())
3679 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
3680 getContext().getTypeSize(RetTy)));
3682 // Integer like structures are returned in r0.
3683 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) {
3684 // Return in the smallest viable integer type.
3685 uint64_t Size = getContext().getTypeSize(RetTy);
3687 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
3689 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
3690 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
3693 // Otherwise return in memory.
3694 return ABIArgInfo::getIndirect(0);
3697 // Otherwise this is an AAPCS variant.
3699 if (isEmptyRecord(getContext(), RetTy, true))
3700 return ABIArgInfo::getIgnore();
3702 // Check for homogeneous aggregates with AAPCS-VFP.
3703 if (getABIKind() == AAPCS_VFP) {
3704 const Type *Base = 0;
3705 if (isHomogeneousAggregate(RetTy, Base, getContext())) {
3706 assert(Base && "Base class should be set for homogeneous aggregate");
3707 // Homogeneous Aggregates are returned directly.
3708 return ABIArgInfo::getDirect();
3712 // Aggregates <= 4 bytes are returned in r0; other aggregates
3713 // are returned indirectly.
3714 uint64_t Size = getContext().getTypeSize(RetTy);
3716 // Return in the smallest viable integer type.
3718 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
3720 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
3721 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
3724 return ABIArgInfo::getIndirect(0);
3727 /// isIllegalVector - check whether Ty is an illegal vector type.
3728 bool ARMABIInfo::isIllegalVectorType(QualType Ty) const {
3729 if (const VectorType *VT = Ty->getAs<VectorType>()) {
3730 // Check whether VT is legal.
3731 unsigned NumElements = VT->getNumElements();
3732 uint64_t Size = getContext().getTypeSize(VT);
3733 // NumElements should be power of 2.
3734 if ((NumElements & (NumElements - 1)) != 0)
3736 // Size should be greater than 32 bits.
3742 llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3743 CodeGenFunction &CGF) const {
3744 llvm::Type *BP = CGF.Int8PtrTy;
3745 llvm::Type *BPP = CGF.Int8PtrPtrTy;
3747 CGBuilderTy &Builder = CGF.Builder;
3748 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
3749 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
3751 if (isEmptyRecord(getContext(), Ty, true)) {
3752 // These are ignored for parameter passing purposes.
3753 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
3754 return Builder.CreateBitCast(Addr, PTy);
3757 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8;
3758 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8;
3759 bool IsIndirect = false;
3761 // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for
3762 // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte.
3763 if (getABIKind() == ARMABIInfo::AAPCS_VFP ||
3764 getABIKind() == ARMABIInfo::AAPCS)
3765 TyAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8);
3768 // Use indirect if size of the illegal vector is bigger than 16 bytes.
3769 if (isIllegalVectorType(Ty) && Size > 16) {
3775 // Handle address alignment for ABI alignment > 4 bytes.
3777 assert((TyAlign & (TyAlign - 1)) == 0 &&
3778 "Alignment is not power of 2!");
3779 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty);
3780 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1));
3781 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1)));
3782 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align");
3786 llvm::RoundUpToAlignment(Size, 4);
3787 llvm::Value *NextAddr =
3788 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
3790 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
3793 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP));
3794 else if (TyAlign < CGF.getContext().getTypeAlign(Ty) / 8) {
3795 // We can't directly cast ap.cur to pointer to a vector type, since ap.cur
3796 // may not be correctly aligned for the vector type. We create an aligned
3797 // temporary space and copy the content over from ap.cur to the temporary
3798 // space. This is necessary if the natural alignment of the type is greater
3799 // than the ABI alignment.
3800 llvm::Type *I8PtrTy = Builder.getInt8PtrTy();
3801 CharUnits CharSize = getContext().getTypeSizeInChars(Ty);
3802 llvm::Value *AlignedTemp = CGF.CreateTempAlloca(CGF.ConvertType(Ty),
3804 llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy);
3805 llvm::Value *Src = Builder.CreateBitCast(Addr, I8PtrTy);
3806 Builder.CreateMemCpy(Dst, Src,
3807 llvm::ConstantInt::get(CGF.IntPtrTy, CharSize.getQuantity()),
3809 Addr = AlignedTemp; //The content is in aligned location.
3812 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
3813 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
3820 class NaClARMABIInfo : public ABIInfo {
3822 NaClARMABIInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind)
3823 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, Kind) {}
3824 virtual void computeInfo(CGFunctionInfo &FI) const;
3825 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3826 CodeGenFunction &CGF) const;
3828 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv.
3829 ARMABIInfo NInfo; // Used for everything else.
3832 class NaClARMTargetCodeGenInfo : public TargetCodeGenInfo {
3834 NaClARMTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind)
3835 : TargetCodeGenInfo(new NaClARMABIInfo(CGT, Kind)) {}
3840 void NaClARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
3841 if (FI.getASTCallingConvention() == CC_PnaclCall)
3842 PInfo.computeInfo(FI);
3844 static_cast<const ABIInfo&>(NInfo).computeInfo(FI);
3847 llvm::Value *NaClARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3848 CodeGenFunction &CGF) const {
3849 // Always use the native convention; calling pnacl-style varargs functions
3851 return static_cast<const ABIInfo&>(NInfo).EmitVAArg(VAListAddr, Ty, CGF);
3854 //===----------------------------------------------------------------------===//
3855 // AArch64 ABI Implementation
3856 //===----------------------------------------------------------------------===//
3860 class AArch64ABIInfo : public ABIInfo {
3862 AArch64ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
3865 // The AArch64 PCS is explicit about return types and argument types being
3866 // handled identically, so we don't need to draw a distinction between
3867 // Argument and Return classification.
3868 ABIArgInfo classifyGenericType(QualType Ty, int &FreeIntRegs,
3869 int &FreeVFPRegs) const;
3871 ABIArgInfo tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, bool IsInt,
3872 llvm::Type *DirectTy = 0) const;
3874 virtual void computeInfo(CGFunctionInfo &FI) const;
3876 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3877 CodeGenFunction &CGF) const;
3880 class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
3882 AArch64TargetCodeGenInfo(CodeGenTypes &CGT)
3883 :TargetCodeGenInfo(new AArch64ABIInfo(CGT)) {}
3885 const AArch64ABIInfo &getABIInfo() const {
3886 return static_cast<const AArch64ABIInfo&>(TargetCodeGenInfo::getABIInfo());
3889 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
3893 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3894 llvm::Value *Address) const {
3895 // 0-31 are x0-x30 and sp: 8 bytes each
3896 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
3897 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 31);
3899 // 64-95 are v0-v31: 16 bytes each
3900 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16);
3901 AssignToArrayRange(CGF.Builder, Address, Sixteen8, 64, 95);
3910 void AArch64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
3911 int FreeIntRegs = 8, FreeVFPRegs = 8;
3913 FI.getReturnInfo() = classifyGenericType(FI.getReturnType(),
3914 FreeIntRegs, FreeVFPRegs);
3916 FreeIntRegs = FreeVFPRegs = 8;
3917 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
3919 it->info = classifyGenericType(it->type, FreeIntRegs, FreeVFPRegs);
3925 AArch64ABIInfo::tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded,
3926 bool IsInt, llvm::Type *DirectTy) const {
3927 if (FreeRegs >= RegsNeeded) {
3928 FreeRegs -= RegsNeeded;
3929 return ABIArgInfo::getDirect(DirectTy);
3932 llvm::Type *Padding = 0;
3934 // We need padding so that later arguments don't get filled in anyway. That
3935 // wouldn't happen if only ByVal arguments followed in the same category, but
3936 // a large structure will simply seem to be a pointer as far as LLVM is
3940 Padding = llvm::Type::getInt64Ty(getVMContext());
3942 Padding = llvm::Type::getFloatTy(getVMContext());
3944 // Either [N x i64] or [N x float].
3945 Padding = llvm::ArrayType::get(Padding, FreeRegs);
3949 return ABIArgInfo::getIndirect(getContext().getTypeAlign(Ty) / 8,
3950 /*IsByVal=*/ true, /*Realign=*/ false,
3955 ABIArgInfo AArch64ABIInfo::classifyGenericType(QualType Ty,
3957 int &FreeVFPRegs) const {
3958 // Can only occurs for return, but harmless otherwise.
3959 if (Ty->isVoidType())
3960 return ABIArgInfo::getIgnore();
3962 // Large vector types should be returned via memory. There's no such concept
3963 // in the ABI, but they'd be over 16 bytes anyway so no matter how they're
3964 // classified they'd go into memory (see B.3).
3965 if (Ty->isVectorType() && getContext().getTypeSize(Ty) > 128) {
3966 if (FreeIntRegs > 0)
3968 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3971 // All non-aggregate LLVM types have a concrete ABI representation so they can
3972 // be passed directly. After this block we're guaranteed to be in a
3973 // complicated case.
3974 if (!isAggregateTypeForABI(Ty)) {
3975 // Treat an enum type as its underlying type.
3976 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
3977 Ty = EnumTy->getDecl()->getIntegerType();
3979 if (Ty->isFloatingType() || Ty->isVectorType())
3980 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ false);
3982 assert(getContext().getTypeSize(Ty) <= 128 &&
3983 "unexpectedly large scalar type");
3985 int RegsNeeded = getContext().getTypeSize(Ty) > 64 ? 2 : 1;
3987 // If the type may need padding registers to ensure "alignment", we must be
3988 // careful when this is accounted for. Increasing the effective size covers
3990 if (getContext().getTypeAlign(Ty) == 128)
3991 RegsNeeded += FreeIntRegs % 2 != 0;
3993 return tryUseRegs(Ty, FreeIntRegs, RegsNeeded, /*IsInt=*/ true);
3996 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
3997 if (FreeIntRegs > 0 && RAA == CGCXXABI::RAA_Indirect)
3999 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
4002 if (isEmptyRecord(getContext(), Ty, true)) {
4003 if (!getContext().getLangOpts().CPlusPlus) {
4004 // Empty structs outside C++ mode are a GNU extension, so no ABI can
4005 // possibly tell us what to do. It turns out (I believe) that GCC ignores
4006 // the object for parameter-passsing purposes.
4007 return ABIArgInfo::getIgnore();
4010 // The combination of C++98 9p5 (sizeof(struct) != 0) and the pseudocode
4011 // description of va_arg in the PCS require that an empty struct does
4012 // actually occupy space for parameter-passing. I'm hoping for a
4013 // clarification giving an explicit paragraph to point to in future.
4014 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ true,
4015 llvm::Type::getInt8Ty(getVMContext()));
4018 // Homogeneous vector aggregates get passed in registers or on the stack.
4019 const Type *Base = 0;
4020 uint64_t NumMembers = 0;
4021 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers)) {
4022 assert(Base && "Base class should be set for homogeneous aggregate");
4023 // Homogeneous aggregates are passed and returned directly.
4024 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ NumMembers,
4028 uint64_t Size = getContext().getTypeSize(Ty);
4030 // Small structs can use the same direct type whether they're in registers
4034 int SizeInRegs = (Size + 63) / 64;
4036 if (getContext().getTypeAlign(Ty) == 128) {
4037 BaseTy = llvm::Type::getIntNTy(getVMContext(), 128);
4040 // If the type may need padding registers to ensure "alignment", we must
4041 // be careful when this is accounted for. Increasing the effective size
4042 // covers all cases.
4043 SizeInRegs += FreeIntRegs % 2 != 0;
4045 BaseTy = llvm::Type::getInt64Ty(getVMContext());
4046 NumBases = SizeInRegs;
4048 llvm::Type *DirectTy = llvm::ArrayType::get(BaseTy, NumBases);
4050 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ SizeInRegs,
4051 /*IsInt=*/ true, DirectTy);
4054 // If the aggregate is > 16 bytes, it's passed and returned indirectly. In
4055 // LLVM terms the return uses an "sret" pointer, but that's handled elsewhere.
4057 return ABIArgInfo::getIndirect(0, /* byVal = */ false);
4060 llvm::Value *AArch64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
4061 CodeGenFunction &CGF) const {
4062 // The AArch64 va_list type and handling is specified in the Procedure Call
4063 // Standard, section B.4:
4073 assert(!CGF.CGM.getDataLayout().isBigEndian()
4074 && "va_arg not implemented for big-endian AArch64");
4076 int FreeIntRegs = 8, FreeVFPRegs = 8;
4077 Ty = CGF.getContext().getCanonicalType(Ty);
4078 ABIArgInfo AI = classifyGenericType(Ty, FreeIntRegs, FreeVFPRegs);
4080 llvm::BasicBlock *MaybeRegBlock = CGF.createBasicBlock("vaarg.maybe_reg");
4081 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
4082 llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack");
4083 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
4085 llvm::Value *reg_offs_p = 0, *reg_offs = 0;
4088 if (FreeIntRegs < 8) {
4089 assert(FreeVFPRegs == 8 && "Arguments never split between int & VFP regs");
4090 // 3 is the field number of __gr_offs
4091 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 3, "gr_offs_p");
4092 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs");
4093 reg_top_index = 1; // field number for __gr_top
4094 RegSize = 8 * (8 - FreeIntRegs);
4096 assert(FreeVFPRegs < 8 && "Argument must go in VFP or int regs");
4097 // 4 is the field number of __vr_offs.
4098 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 4, "vr_offs_p");
4099 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs");
4100 reg_top_index = 2; // field number for __vr_top
4101 RegSize = 16 * (8 - FreeVFPRegs);
4104 //=======================================
4105 // Find out where argument was passed
4106 //=======================================
4108 // If reg_offs >= 0 we're already using the stack for this type of
4109 // argument. We don't want to keep updating reg_offs (in case it overflows,
4110 // though anyone passing 2GB of arguments, each at most 16 bytes, deserves
4111 // whatever they get).
4112 llvm::Value *UsingStack = 0;
4113 UsingStack = CGF.Builder.CreateICmpSGE(reg_offs,
4114 llvm::ConstantInt::get(CGF.Int32Ty, 0));
4116 CGF.Builder.CreateCondBr(UsingStack, OnStackBlock, MaybeRegBlock);
4118 // Otherwise, at least some kind of argument could go in these registers, the
4119 // quesiton is whether this particular type is too big.
4120 CGF.EmitBlock(MaybeRegBlock);
4122 // Integer arguments may need to correct register alignment (for example a
4123 // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we
4124 // align __gr_offs to calculate the potential address.
4125 if (FreeIntRegs < 8 && AI.isDirect() && getContext().getTypeAlign(Ty) > 64) {
4126 int Align = getContext().getTypeAlign(Ty) / 8;
4128 reg_offs = CGF.Builder.CreateAdd(reg_offs,
4129 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1),
4131 reg_offs = CGF.Builder.CreateAnd(reg_offs,
4132 llvm::ConstantInt::get(CGF.Int32Ty, -Align),
4136 // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list.
4137 llvm::Value *NewOffset = 0;
4138 NewOffset = CGF.Builder.CreateAdd(reg_offs,
4139 llvm::ConstantInt::get(CGF.Int32Ty, RegSize),
4141 CGF.Builder.CreateStore(NewOffset, reg_offs_p);
4143 // Now we're in a position to decide whether this argument really was in
4144 // registers or not.
4145 llvm::Value *InRegs = 0;
4146 InRegs = CGF.Builder.CreateICmpSLE(NewOffset,
4147 llvm::ConstantInt::get(CGF.Int32Ty, 0),
4150 CGF.Builder.CreateCondBr(InRegs, InRegBlock, OnStackBlock);
4152 //=======================================
4153 // Argument was in registers
4154 //=======================================
4156 // Now we emit the code for if the argument was originally passed in
4157 // registers. First start the appropriate block:
4158 CGF.EmitBlock(InRegBlock);
4160 llvm::Value *reg_top_p = 0, *reg_top = 0;
4161 reg_top_p = CGF.Builder.CreateStructGEP(VAListAddr, reg_top_index, "reg_top_p");
4162 reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top");
4163 llvm::Value *BaseAddr = CGF.Builder.CreateGEP(reg_top, reg_offs);
4164 llvm::Value *RegAddr = 0;
4165 llvm::Type *MemTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty));
4167 if (!AI.isDirect()) {
4168 // If it's been passed indirectly (actually a struct), whatever we find from
4169 // stored registers or on the stack will actually be a struct **.
4170 MemTy = llvm::PointerType::getUnqual(MemTy);
4173 const Type *Base = 0;
4174 uint64_t NumMembers;
4175 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers)
4176 && NumMembers > 1) {
4177 // Homogeneous aggregates passed in registers will have their elements split
4178 // and stored 16-bytes apart regardless of size (they're notionally in qN,
4179 // qN+1, ...). We reload and store into a temporary local variable
4181 assert(AI.isDirect() && "Homogeneous aggregates should be passed directly");
4182 llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0));
4183 llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers);
4184 llvm::Value *Tmp = CGF.CreateTempAlloca(HFATy);
4186 for (unsigned i = 0; i < NumMembers; ++i) {
4187 llvm::Value *BaseOffset = llvm::ConstantInt::get(CGF.Int32Ty, 16 * i);
4188 llvm::Value *LoadAddr = CGF.Builder.CreateGEP(BaseAddr, BaseOffset);
4189 LoadAddr = CGF.Builder.CreateBitCast(LoadAddr,
4190 llvm::PointerType::getUnqual(BaseTy));
4191 llvm::Value *StoreAddr = CGF.Builder.CreateStructGEP(Tmp, i);
4193 llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr);
4194 CGF.Builder.CreateStore(Elem, StoreAddr);
4197 RegAddr = CGF.Builder.CreateBitCast(Tmp, MemTy);
4199 // Otherwise the object is contiguous in memory
4200 RegAddr = CGF.Builder.CreateBitCast(BaseAddr, MemTy);
4203 CGF.EmitBranch(ContBlock);
4205 //=======================================
4206 // Argument was on the stack
4207 //=======================================
4208 CGF.EmitBlock(OnStackBlock);
4210 llvm::Value *stack_p = 0, *OnStackAddr = 0;
4211 stack_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "stack_p");
4212 OnStackAddr = CGF.Builder.CreateLoad(stack_p, "stack");
4214 // Again, stack arguments may need realigmnent. In this case both integer and
4215 // floating-point ones might be affected.
4216 if (AI.isDirect() && getContext().getTypeAlign(Ty) > 64) {
4217 int Align = getContext().getTypeAlign(Ty) / 8;
4219 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty);
4221 OnStackAddr = CGF.Builder.CreateAdd(OnStackAddr,
4222 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1),
4224 OnStackAddr = CGF.Builder.CreateAnd(OnStackAddr,
4225 llvm::ConstantInt::get(CGF.Int64Ty, -Align),
4228 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy);
4233 StackSize = getContext().getTypeSize(Ty) / 8;
4237 // All stack slots are 8 bytes
4238 StackSize = llvm::RoundUpToAlignment(StackSize, 8);
4240 llvm::Value *StackSizeC = llvm::ConstantInt::get(CGF.Int32Ty, StackSize);
4241 llvm::Value *NewStack = CGF.Builder.CreateGEP(OnStackAddr, StackSizeC,
4244 // Write the new value of __stack for the next call to va_arg
4245 CGF.Builder.CreateStore(NewStack, stack_p);
4247 OnStackAddr = CGF.Builder.CreateBitCast(OnStackAddr, MemTy);
4249 CGF.EmitBranch(ContBlock);
4251 //=======================================
4253 //=======================================
4254 CGF.EmitBlock(ContBlock);
4256 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(MemTy, 2, "vaarg.addr");
4257 ResAddr->addIncoming(RegAddr, InRegBlock);
4258 ResAddr->addIncoming(OnStackAddr, OnStackBlock);
4263 return CGF.Builder.CreateLoad(ResAddr, "vaarg.addr");
4266 //===----------------------------------------------------------------------===//
4267 // NVPTX ABI Implementation
4268 //===----------------------------------------------------------------------===//
4272 class NVPTXABIInfo : public ABIInfo {
4274 NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
4276 ABIArgInfo classifyReturnType(QualType RetTy) const;
4277 ABIArgInfo classifyArgumentType(QualType Ty) const;
4279 virtual void computeInfo(CGFunctionInfo &FI) const;
4280 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
4281 CodeGenFunction &CFG) const;
4284 class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo {
4286 NVPTXTargetCodeGenInfo(CodeGenTypes &CGT)
4287 : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {}
4289 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
4290 CodeGen::CodeGenModule &M) const;
4292 static void addKernelMetadata(llvm::Function *F);
4295 ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const {
4296 if (RetTy->isVoidType())
4297 return ABIArgInfo::getIgnore();
4299 // note: this is different from default ABI
4300 if (!RetTy->isScalarType())
4301 return ABIArgInfo::getDirect();
4303 // Treat an enum type as its underlying type.
4304 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
4305 RetTy = EnumTy->getDecl()->getIntegerType();
4307 return (RetTy->isPromotableIntegerType() ?
4308 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
4311 ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const {
4312 // Treat an enum type as its underlying type.
4313 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
4314 Ty = EnumTy->getDecl()->getIntegerType();
4316 return (Ty->isPromotableIntegerType() ?
4317 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
4320 void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const {
4321 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
4322 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
4324 it->info = classifyArgumentType(it->type);
4326 // Always honor user-specified calling convention.
4327 if (FI.getCallingConvention() != llvm::CallingConv::C)
4330 FI.setEffectiveCallingConvention(getRuntimeCC());
4333 llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
4334 CodeGenFunction &CFG) const {
4335 llvm_unreachable("NVPTX does not support varargs");
4338 void NVPTXTargetCodeGenInfo::
4339 SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
4340 CodeGen::CodeGenModule &M) const{
4341 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
4344 llvm::Function *F = cast<llvm::Function>(GV);
4346 // Perform special handling in OpenCL mode
4347 if (M.getLangOpts().OpenCL) {
4348 // Use OpenCL function attributes to check for kernel functions
4349 // By default, all functions are device functions
4350 if (FD->hasAttr<OpenCLKernelAttr>()) {
4351 // OpenCL __kernel functions get kernel metadata
4352 addKernelMetadata(F);
4353 // And kernel functions are not subject to inlining
4354 F->addFnAttr(llvm::Attribute::NoInline);
4358 // Perform special handling in CUDA mode.
4359 if (M.getLangOpts().CUDA) {
4360 // CUDA __global__ functions get a kernel metadata entry. Since
4361 // __global__ functions cannot be called from the device, we do not
4362 // need to set the noinline attribute.
4363 if (FD->getAttr<CUDAGlobalAttr>())
4364 addKernelMetadata(F);
4368 void NVPTXTargetCodeGenInfo::addKernelMetadata(llvm::Function *F) {
4369 llvm::Module *M = F->getParent();
4370 llvm::LLVMContext &Ctx = M->getContext();
4372 // Get "nvvm.annotations" metadata node
4373 llvm::NamedMDNode *MD = M->getOrInsertNamedMetadata("nvvm.annotations");
4375 // Create !{<func-ref>, metadata !"kernel", i32 1} node
4376 llvm::SmallVector<llvm::Value *, 3> MDVals;
4377 MDVals.push_back(F);
4378 MDVals.push_back(llvm::MDString::get(Ctx, "kernel"));
4379 MDVals.push_back(llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), 1));
4381 // Append metadata to nvvm.annotations
4382 MD->addOperand(llvm::MDNode::get(Ctx, MDVals));
4387 //===----------------------------------------------------------------------===//
4388 // SystemZ ABI Implementation
4389 //===----------------------------------------------------------------------===//
4393 class SystemZABIInfo : public ABIInfo {
4395 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
4397 bool isPromotableIntegerType(QualType Ty) const;
4398 bool isCompoundType(QualType Ty) const;
4399 bool isFPArgumentType(QualType Ty) const;
4401 ABIArgInfo classifyReturnType(QualType RetTy) const;
4402 ABIArgInfo classifyArgumentType(QualType ArgTy) const;
4404 virtual void computeInfo(CGFunctionInfo &FI) const {
4405 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
4406 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
4408 it->info = classifyArgumentType(it->type);
4411 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
4412 CodeGenFunction &CGF) const;
4415 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
4417 SystemZTargetCodeGenInfo(CodeGenTypes &CGT)
4418 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {}
4423 bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const {
4424 // Treat an enum type as its underlying type.
4425 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
4426 Ty = EnumTy->getDecl()->getIntegerType();
4428 // Promotable integer types are required to be promoted by the ABI.
4429 if (Ty->isPromotableIntegerType())
4432 // 32-bit values must also be promoted.
4433 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
4434 switch (BT->getKind()) {
4435 case BuiltinType::Int:
4436 case BuiltinType::UInt:
4444 bool SystemZABIInfo::isCompoundType(QualType Ty) const {
4445 return Ty->isAnyComplexType() || isAggregateTypeForABI(Ty);
4448 bool SystemZABIInfo::isFPArgumentType(QualType Ty) const {
4449 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
4450 switch (BT->getKind()) {
4451 case BuiltinType::Float:
4452 case BuiltinType::Double:
4458 if (const RecordType *RT = Ty->getAsStructureType()) {
4459 const RecordDecl *RD = RT->getDecl();
4462 // If this is a C++ record, check the bases first.
4463 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
4464 for (CXXRecordDecl::base_class_const_iterator I = CXXRD->bases_begin(),
4465 E = CXXRD->bases_end(); I != E; ++I) {
4466 QualType Base = I->getType();
4468 // Empty bases don't affect things either way.
4469 if (isEmptyRecord(getContext(), Base, true))
4474 Found = isFPArgumentType(Base);
4479 // Check the fields.
4480 for (RecordDecl::field_iterator I = RD->field_begin(),
4481 E = RD->field_end(); I != E; ++I) {
4482 const FieldDecl *FD = *I;
4484 // Empty bitfields don't affect things either way.
4485 // Unlike isSingleElementStruct(), empty structure and array fields
4486 // do count. So do anonymous bitfields that aren't zero-sized.
4487 if (FD->isBitField() && FD->getBitWidthValue(getContext()) == 0)
4490 // Unlike isSingleElementStruct(), arrays do not count.
4491 // Nested isFPArgumentType structures still do though.
4494 Found = isFPArgumentType(FD->getType());
4499 // Unlike isSingleElementStruct(), trailing padding is allowed.
4500 // An 8-byte aligned struct s { float f; } is passed as a double.
4507 llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
4508 CodeGenFunction &CGF) const {
4509 // Assume that va_list type is correct; should be pointer to LLVM type:
4513 // i8 *__overflow_arg_area;
4514 // i8 *__reg_save_area;
4517 // Every argument occupies 8 bytes and is passed by preference in either
4519 Ty = CGF.getContext().getCanonicalType(Ty);
4520 ABIArgInfo AI = classifyArgumentType(Ty);
4521 bool InFPRs = isFPArgumentType(Ty);
4523 llvm::Type *APTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty));
4524 bool IsIndirect = AI.isIndirect();
4525 unsigned UnpaddedBitSize;
4527 APTy = llvm::PointerType::getUnqual(APTy);
4528 UnpaddedBitSize = 64;
4530 UnpaddedBitSize = getContext().getTypeSize(Ty);
4531 unsigned PaddedBitSize = 64;
4532 assert((UnpaddedBitSize <= PaddedBitSize) && "Invalid argument size.");
4534 unsigned PaddedSize = PaddedBitSize / 8;
4535 unsigned Padding = (PaddedBitSize - UnpaddedBitSize) / 8;
4537 unsigned MaxRegs, RegCountField, RegSaveIndex, RegPadding;
4539 MaxRegs = 4; // Maximum of 4 FPR arguments
4540 RegCountField = 1; // __fpr
4541 RegSaveIndex = 16; // save offset for f0
4542 RegPadding = 0; // floats are passed in the high bits of an FPR
4544 MaxRegs = 5; // Maximum of 5 GPR arguments
4545 RegCountField = 0; // __gpr
4546 RegSaveIndex = 2; // save offset for r2
4547 RegPadding = Padding; // values are passed in the low bits of a GPR
4550 llvm::Value *RegCountPtr =
4551 CGF.Builder.CreateStructGEP(VAListAddr, RegCountField, "reg_count_ptr");
4552 llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count");
4553 llvm::Type *IndexTy = RegCount->getType();
4554 llvm::Value *MaxRegsV = llvm::ConstantInt::get(IndexTy, MaxRegs);
4555 llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV,
4558 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
4559 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
4560 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
4561 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
4563 // Emit code to load the value if it was passed in registers.
4564 CGF.EmitBlock(InRegBlock);
4566 // Work out the address of an argument register.
4567 llvm::Value *PaddedSizeV = llvm::ConstantInt::get(IndexTy, PaddedSize);
4568 llvm::Value *ScaledRegCount =
4569 CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count");
4570 llvm::Value *RegBase =
4571 llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize + RegPadding);
4572 llvm::Value *RegOffset =
4573 CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset");
4574 llvm::Value *RegSaveAreaPtr =
4575 CGF.Builder.CreateStructGEP(VAListAddr, 3, "reg_save_area_ptr");
4576 llvm::Value *RegSaveArea =
4577 CGF.Builder.CreateLoad(RegSaveAreaPtr, "reg_save_area");
4578 llvm::Value *RawRegAddr =
4579 CGF.Builder.CreateGEP(RegSaveArea, RegOffset, "raw_reg_addr");
4580 llvm::Value *RegAddr =
4581 CGF.Builder.CreateBitCast(RawRegAddr, APTy, "reg_addr");
4583 // Update the register count
4584 llvm::Value *One = llvm::ConstantInt::get(IndexTy, 1);
4585 llvm::Value *NewRegCount =
4586 CGF.Builder.CreateAdd(RegCount, One, "reg_count");
4587 CGF.Builder.CreateStore(NewRegCount, RegCountPtr);
4588 CGF.EmitBranch(ContBlock);
4590 // Emit code to load the value if it was passed in memory.
4591 CGF.EmitBlock(InMemBlock);
4593 // Work out the address of a stack argument.
4594 llvm::Value *OverflowArgAreaPtr =
4595 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_ptr");
4596 llvm::Value *OverflowArgArea =
4597 CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area");
4598 llvm::Value *PaddingV = llvm::ConstantInt::get(IndexTy, Padding);
4599 llvm::Value *RawMemAddr =
4600 CGF.Builder.CreateGEP(OverflowArgArea, PaddingV, "raw_mem_addr");
4601 llvm::Value *MemAddr =
4602 CGF.Builder.CreateBitCast(RawMemAddr, APTy, "mem_addr");
4604 // Update overflow_arg_area_ptr pointer
4605 llvm::Value *NewOverflowArgArea =
4606 CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area");
4607 CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr);
4608 CGF.EmitBranch(ContBlock);
4610 // Return the appropriate result.
4611 CGF.EmitBlock(ContBlock);
4612 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(APTy, 2, "va_arg.addr");
4613 ResAddr->addIncoming(RegAddr, InRegBlock);
4614 ResAddr->addIncoming(MemAddr, InMemBlock);
4617 return CGF.Builder.CreateLoad(ResAddr, "indirect_arg");
4622 bool X86_32TargetCodeGenInfo::isStructReturnInRegABI(
4623 const llvm::Triple &Triple, const CodeGenOptions &Opts) {
4624 assert(Triple.getArch() == llvm::Triple::x86);
4626 switch (Opts.getStructReturnConvention()) {
4627 case CodeGenOptions::SRCK_Default:
4629 case CodeGenOptions::SRCK_OnStack: // -fpcc-struct-return
4631 case CodeGenOptions::SRCK_InRegs: // -freg-struct-return
4635 if (Triple.isOSDarwin())
4638 switch (Triple.getOS()) {
4639 case llvm::Triple::Cygwin:
4640 case llvm::Triple::MinGW32:
4641 case llvm::Triple::AuroraUX:
4642 case llvm::Triple::DragonFly:
4643 case llvm::Triple::FreeBSD:
4644 case llvm::Triple::OpenBSD:
4645 case llvm::Triple::Bitrig:
4646 case llvm::Triple::Win32:
4653 ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const {
4654 if (RetTy->isVoidType())
4655 return ABIArgInfo::getIgnore();
4656 if (isCompoundType(RetTy) || getContext().getTypeSize(RetTy) > 64)
4657 return ABIArgInfo::getIndirect(0);
4658 return (isPromotableIntegerType(RetTy) ?
4659 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
4662 ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const {
4663 // Handle the generic C++ ABI.
4664 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
4665 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
4667 // Integers and enums are extended to full register width.
4668 if (isPromotableIntegerType(Ty))
4669 return ABIArgInfo::getExtend();
4671 // Values that are not 1, 2, 4 or 8 bytes in size are passed indirectly.
4672 uint64_t Size = getContext().getTypeSize(Ty);
4673 if (Size != 8 && Size != 16 && Size != 32 && Size != 64)
4674 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
4676 // Handle small structures.
4677 if (const RecordType *RT = Ty->getAs<RecordType>()) {
4678 // Structures with flexible arrays have variable length, so really
4679 // fail the size test above.
4680 const RecordDecl *RD = RT->getDecl();
4681 if (RD->hasFlexibleArrayMember())
4682 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
4684 // The structure is passed as an unextended integer, a float, or a double.
4686 if (isFPArgumentType(Ty)) {
4687 assert(Size == 32 || Size == 64);
4689 PassTy = llvm::Type::getFloatTy(getVMContext());
4691 PassTy = llvm::Type::getDoubleTy(getVMContext());
4693 PassTy = llvm::IntegerType::get(getVMContext(), Size);
4694 return ABIArgInfo::getDirect(PassTy);
4697 // Non-structure compounds are passed indirectly.
4698 if (isCompoundType(Ty))
4699 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
4701 return ABIArgInfo::getDirect(0);
4704 //===----------------------------------------------------------------------===//
4705 // MSP430 ABI Implementation
4706 //===----------------------------------------------------------------------===//
4710 class MSP430TargetCodeGenInfo : public TargetCodeGenInfo {
4712 MSP430TargetCodeGenInfo(CodeGenTypes &CGT)
4713 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
4714 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
4715 CodeGen::CodeGenModule &M) const;
4720 void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
4721 llvm::GlobalValue *GV,
4722 CodeGen::CodeGenModule &M) const {
4723 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
4724 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) {
4725 // Handle 'interrupt' attribute:
4726 llvm::Function *F = cast<llvm::Function>(GV);
4728 // Step 1: Set ISR calling convention.
4729 F->setCallingConv(llvm::CallingConv::MSP430_INTR);
4731 // Step 2: Add attributes goodness.
4732 F->addFnAttr(llvm::Attribute::NoInline);
4734 // Step 3: Emit ISR vector alias.
4735 unsigned Num = attr->getNumber() / 2;
4736 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage,
4737 "__isr_" + Twine(Num),
4738 GV, &M.getModule());
4743 //===----------------------------------------------------------------------===//
4744 // MIPS ABI Implementation. This works for both little-endian and
4745 // big-endian variants.
4746 //===----------------------------------------------------------------------===//
4749 class MipsABIInfo : public ABIInfo {
4751 unsigned MinABIStackAlignInBytes, StackAlignInBytes;
4752 void CoerceToIntArgs(uint64_t TySize,
4753 SmallVectorImpl<llvm::Type *> &ArgList) const;
4754 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const;
4755 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const;
4756 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const;
4758 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) :
4759 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8),
4760 StackAlignInBytes(IsO32 ? 8 : 16) {}
4762 ABIArgInfo classifyReturnType(QualType RetTy) const;
4763 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const;
4764 virtual void computeInfo(CGFunctionInfo &FI) const;
4765 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
4766 CodeGenFunction &CGF) const;
4769 class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
4770 unsigned SizeOfUnwindException;
4772 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32)
4773 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)),
4774 SizeOfUnwindException(IsO32 ? 24 : 32) {}
4776 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
4780 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
4781 CodeGen::CodeGenModule &CGM) const {
4782 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
4784 llvm::Function *Fn = cast<llvm::Function>(GV);
4785 if (FD->hasAttr<Mips16Attr>()) {
4786 Fn->addFnAttr("mips16");
4788 else if (FD->hasAttr<NoMips16Attr>()) {
4789 Fn->addFnAttr("nomips16");
4793 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
4794 llvm::Value *Address) const;
4796 unsigned getSizeOfUnwindException() const {
4797 return SizeOfUnwindException;
4802 void MipsABIInfo::CoerceToIntArgs(uint64_t TySize,
4803 SmallVectorImpl<llvm::Type *> &ArgList) const {
4804 llvm::IntegerType *IntTy =
4805 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8);
4807 // Add (TySize / MinABIStackAlignInBytes) args of IntTy.
4808 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N)
4809 ArgList.push_back(IntTy);
4811 // If necessary, add one more integer type to ArgList.
4812 unsigned R = TySize % (MinABIStackAlignInBytes * 8);
4815 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R));
4818 // In N32/64, an aligned double precision floating point field is passed in
4820 llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const {
4821 SmallVector<llvm::Type*, 8> ArgList, IntArgList;
4824 CoerceToIntArgs(TySize, ArgList);
4825 return llvm::StructType::get(getVMContext(), ArgList);
4828 if (Ty->isComplexType())
4829 return CGT.ConvertType(Ty);
4831 const RecordType *RT = Ty->getAs<RecordType>();
4833 // Unions/vectors are passed in integer registers.
4834 if (!RT || !RT->isStructureOrClassType()) {
4835 CoerceToIntArgs(TySize, ArgList);
4836 return llvm::StructType::get(getVMContext(), ArgList);
4839 const RecordDecl *RD = RT->getDecl();
4840 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
4841 assert(!(TySize % 8) && "Size of structure must be multiple of 8.");
4843 uint64_t LastOffset = 0;
4845 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64);
4847 // Iterate over fields in the struct/class and check if there are any aligned
4849 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
4850 i != e; ++i, ++idx) {
4851 const QualType Ty = i->getType();
4852 const BuiltinType *BT = Ty->getAs<BuiltinType>();
4854 if (!BT || BT->getKind() != BuiltinType::Double)
4857 uint64_t Offset = Layout.getFieldOffset(idx);
4858 if (Offset % 64) // Ignore doubles that are not aligned.
4861 // Add ((Offset - LastOffset) / 64) args of type i64.
4862 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j)
4863 ArgList.push_back(I64);
4866 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext()));
4867 LastOffset = Offset + 64;
4870 CoerceToIntArgs(TySize - LastOffset, IntArgList);
4871 ArgList.append(IntArgList.begin(), IntArgList.end());
4873 return llvm::StructType::get(getVMContext(), ArgList);
4876 llvm::Type *MipsABIInfo::getPaddingType(uint64_t OrigOffset,
4877 uint64_t Offset) const {
4878 if (OrigOffset + MinABIStackAlignInBytes > Offset)
4881 return llvm::IntegerType::get(getVMContext(), (Offset - OrigOffset) * 8);
4885 MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const {
4886 uint64_t OrigOffset = Offset;
4887 uint64_t TySize = getContext().getTypeSize(Ty);
4888 uint64_t Align = getContext().getTypeAlign(Ty) / 8;
4890 Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes),
4891 (uint64_t)StackAlignInBytes);
4892 unsigned CurrOffset = llvm::RoundUpToAlignment(Offset, Align);
4893 Offset = CurrOffset + llvm::RoundUpToAlignment(TySize, Align * 8) / 8;
4895 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) {
4896 // Ignore empty aggregates.
4898 return ABIArgInfo::getIgnore();
4900 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
4901 Offset = OrigOffset + MinABIStackAlignInBytes;
4902 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
4905 // If we have reached here, aggregates are passed directly by coercing to
4906 // another structure type. Padding is inserted if the offset of the
4907 // aggregate is unaligned.
4908 return ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0,
4909 getPaddingType(OrigOffset, CurrOffset));
4912 // Treat an enum type as its underlying type.
4913 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
4914 Ty = EnumTy->getDecl()->getIntegerType();
4916 if (Ty->isPromotableIntegerType())
4917 return ABIArgInfo::getExtend();
4919 return ABIArgInfo::getDirect(
4920 0, 0, IsO32 ? 0 : getPaddingType(OrigOffset, CurrOffset));
4924 MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const {
4925 const RecordType *RT = RetTy->getAs<RecordType>();
4926 SmallVector<llvm::Type*, 8> RTList;
4928 if (RT && RT->isStructureOrClassType()) {
4929 const RecordDecl *RD = RT->getDecl();
4930 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
4931 unsigned FieldCnt = Layout.getFieldCount();
4933 // N32/64 returns struct/classes in floating point registers if the
4934 // following conditions are met:
4935 // 1. The size of the struct/class is no larger than 128-bit.
4936 // 2. The struct/class has one or two fields all of which are floating
4938 // 3. The offset of the first field is zero (this follows what gcc does).
4940 // Any other composite results are returned in integer registers.
4942 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) {
4943 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end();
4944 for (; b != e; ++b) {
4945 const BuiltinType *BT = b->getType()->getAs<BuiltinType>();
4947 if (!BT || !BT->isFloatingPoint())
4950 RTList.push_back(CGT.ConvertType(b->getType()));
4954 return llvm::StructType::get(getVMContext(), RTList,
4955 RD->hasAttr<PackedAttr>());
4961 CoerceToIntArgs(Size, RTList);
4962 return llvm::StructType::get(getVMContext(), RTList);
4965 ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const {
4966 uint64_t Size = getContext().getTypeSize(RetTy);
4968 if (RetTy->isVoidType() || Size == 0)
4969 return ABIArgInfo::getIgnore();
4971 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) {
4972 if (isRecordReturnIndirect(RetTy, getCXXABI()))
4973 return ABIArgInfo::getIndirect(0);
4976 if (RetTy->isAnyComplexType())
4977 return ABIArgInfo::getDirect();
4979 // O32 returns integer vectors in registers.
4980 if (IsO32 && RetTy->isVectorType() && !RetTy->hasFloatingRepresentation())
4981 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size));
4984 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size));
4987 return ABIArgInfo::getIndirect(0);
4990 // Treat an enum type as its underlying type.
4991 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
4992 RetTy = EnumTy->getDecl()->getIntegerType();
4994 return (RetTy->isPromotableIntegerType() ?
4995 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
4998 void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const {
4999 ABIArgInfo &RetInfo = FI.getReturnInfo();
5000 RetInfo = classifyReturnType(FI.getReturnType());
5002 // Check if a pointer to an aggregate is passed as a hidden argument.
5003 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0;
5005 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
5007 it->info = classifyArgumentType(it->type, Offset);
5010 llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5011 CodeGenFunction &CGF) const {
5012 llvm::Type *BP = CGF.Int8PtrTy;
5013 llvm::Type *BPP = CGF.Int8PtrPtrTy;
5015 CGBuilderTy &Builder = CGF.Builder;
5016 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
5017 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
5018 int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8;
5019 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
5020 llvm::Value *AddrTyped;
5021 unsigned PtrWidth = getTarget().getPointerWidth(0);
5022 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty;
5024 if (TypeAlign > MinABIStackAlignInBytes) {
5025 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy);
5026 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1);
5027 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign);
5028 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc);
5029 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask);
5030 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy);
5033 AddrTyped = Builder.CreateBitCast(Addr, PTy);
5035 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP);
5036 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes);
5038 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign);
5039 llvm::Value *NextAddr =
5040 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset),
5042 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
5048 MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
5049 llvm::Value *Address) const {
5050 // This information comes from gcc's implementation, which seems to
5051 // as canonical as it gets.
5053 // Everything on MIPS is 4 bytes. Double-precision FP registers
5054 // are aliased to pairs of single-precision FP registers.
5055 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
5057 // 0-31 are the general purpose registers, $0 - $31.
5058 // 32-63 are the floating-point registers, $f0 - $f31.
5059 // 64 and 65 are the multiply/divide registers, $hi and $lo.
5060 // 66 is the (notional, I think) register for signal-handler return.
5061 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65);
5063 // 67-74 are the floating-point status registers, $fcc0 - $fcc7.
5064 // They are one bit wide and ignored here.
5066 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31.
5067 // (coprocessor 1 is the FP unit)
5068 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31.
5069 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31.
5070 // 176-181 are the DSP accumulator registers.
5071 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181);
5075 //===----------------------------------------------------------------------===//
5076 // TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults.
5077 // Currently subclassed only to implement custom OpenCL C function attribute
5079 //===----------------------------------------------------------------------===//
5083 class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
5085 TCETargetCodeGenInfo(CodeGenTypes &CGT)
5086 : DefaultTargetCodeGenInfo(CGT) {}
5088 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5089 CodeGen::CodeGenModule &M) const;
5092 void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D,
5093 llvm::GlobalValue *GV,
5094 CodeGen::CodeGenModule &M) const {
5095 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
5098 llvm::Function *F = cast<llvm::Function>(GV);
5100 if (M.getLangOpts().OpenCL) {
5101 if (FD->hasAttr<OpenCLKernelAttr>()) {
5102 // OpenCL C Kernel functions are not subject to inlining
5103 F->addFnAttr(llvm::Attribute::NoInline);
5105 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) {
5107 // Convert the reqd_work_group_size() attributes to metadata.
5108 llvm::LLVMContext &Context = F->getContext();
5109 llvm::NamedMDNode *OpenCLMetadata =
5110 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info");
5112 SmallVector<llvm::Value*, 5> Operands;
5113 Operands.push_back(F);
5115 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty,
5117 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim())));
5118 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty,
5120 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim())));
5121 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty,
5123 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim())));
5125 // Add a boolean constant operand for "required" (true) or "hint" (false)
5126 // for implementing the work_group_size_hint attr later. Currently
5127 // always true as the hint is not yet implemented.
5128 Operands.push_back(llvm::ConstantInt::getTrue(Context));
5129 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands));
5137 //===----------------------------------------------------------------------===//
5138 // Hexagon ABI Implementation
5139 //===----------------------------------------------------------------------===//
5143 class HexagonABIInfo : public ABIInfo {
5147 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
5151 ABIArgInfo classifyReturnType(QualType RetTy) const;
5152 ABIArgInfo classifyArgumentType(QualType RetTy) const;
5154 virtual void computeInfo(CGFunctionInfo &FI) const;
5156 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5157 CodeGenFunction &CGF) const;
5160 class HexagonTargetCodeGenInfo : public TargetCodeGenInfo {
5162 HexagonTargetCodeGenInfo(CodeGenTypes &CGT)
5163 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {}
5165 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
5172 void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const {
5173 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
5174 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
5176 it->info = classifyArgumentType(it->type);
5179 ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const {
5180 if (!isAggregateTypeForABI(Ty)) {
5181 // Treat an enum type as its underlying type.
5182 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
5183 Ty = EnumTy->getDecl()->getIntegerType();
5185 return (Ty->isPromotableIntegerType() ?
5186 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5189 // Ignore empty records.
5190 if (isEmptyRecord(getContext(), Ty, true))
5191 return ABIArgInfo::getIgnore();
5193 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
5194 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
5196 uint64_t Size = getContext().getTypeSize(Ty);
5198 return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
5199 // Pass in the smallest viable integer type.
5201 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
5203 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
5205 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
5207 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
5210 ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const {
5211 if (RetTy->isVoidType())
5212 return ABIArgInfo::getIgnore();
5214 // Large vector types should be returned via memory.
5215 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64)
5216 return ABIArgInfo::getIndirect(0);
5218 if (!isAggregateTypeForABI(RetTy)) {
5219 // Treat an enum type as its underlying type.
5220 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
5221 RetTy = EnumTy->getDecl()->getIntegerType();
5223 return (RetTy->isPromotableIntegerType() ?
5224 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5227 // Structures with either a non-trivial destructor or a non-trivial
5228 // copy constructor are always indirect.
5229 if (isRecordReturnIndirect(RetTy, getCXXABI()))
5230 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
5232 if (isEmptyRecord(getContext(), RetTy, true))
5233 return ABIArgInfo::getIgnore();
5235 // Aggregates <= 8 bytes are returned in r0; other aggregates
5236 // are returned indirectly.
5237 uint64_t Size = getContext().getTypeSize(RetTy);
5239 // Return in the smallest viable integer type.
5241 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
5243 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
5245 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
5246 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
5249 return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
5252 llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5253 CodeGenFunction &CGF) const {
5254 // FIXME: Need to handle alignment
5255 llvm::Type *BPP = CGF.Int8PtrPtrTy;
5257 CGBuilderTy &Builder = CGF.Builder;
5258 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
5260 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
5262 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
5263 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
5266 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
5267 llvm::Value *NextAddr =
5268 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
5270 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
5276 //===----------------------------------------------------------------------===//
5277 // SPARC v9 ABI Implementation.
5278 // Based on the SPARC Compliance Definition version 2.4.1.
5280 // Function arguments a mapped to a nominal "parameter array" and promoted to
5281 // registers depending on their type. Each argument occupies 8 or 16 bytes in
5282 // the array, structs larger than 16 bytes are passed indirectly.
5284 // One case requires special care:
5291 // When a struct mixed is passed by value, it only occupies 8 bytes in the
5292 // parameter array, but the int is passed in an integer register, and the float
5293 // is passed in a floating point register. This is represented as two arguments
5294 // with the LLVM IR inreg attribute:
5296 // declare void f(i32 inreg %i, float inreg %f)
5298 // The code generator will only allocate 4 bytes from the parameter array for
5299 // the inreg arguments. All other arguments are allocated a multiple of 8
5303 class SparcV9ABIInfo : public ABIInfo {
5305 SparcV9ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
5308 ABIArgInfo classifyType(QualType RetTy, unsigned SizeLimit) const;
5309 virtual void computeInfo(CGFunctionInfo &FI) const;
5310 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5311 CodeGenFunction &CGF) const;
5313 // Coercion type builder for structs passed in registers. The coercion type
5314 // serves two purposes:
5316 // 1. Pad structs to a multiple of 64 bits, so they are passed 'left-aligned'
5318 // 2. Expose aligned floating point elements as first-level elements, so the
5319 // code generator knows to pass them in floating point registers.
5321 // We also compute the InReg flag which indicates that the struct contains
5322 // aligned 32-bit floats.
5324 struct CoerceBuilder {
5325 llvm::LLVMContext &Context;
5326 const llvm::DataLayout &DL;
5327 SmallVector<llvm::Type*, 8> Elems;
5331 CoerceBuilder(llvm::LLVMContext &c, const llvm::DataLayout &dl)
5332 : Context(c), DL(dl), Size(0), InReg(false) {}
5334 // Pad Elems with integers until Size is ToSize.
5335 void pad(uint64_t ToSize) {
5336 assert(ToSize >= Size && "Cannot remove elements");
5340 // Finish the current 64-bit word.
5341 uint64_t Aligned = llvm::RoundUpToAlignment(Size, 64);
5342 if (Aligned > Size && Aligned <= ToSize) {
5343 Elems.push_back(llvm::IntegerType::get(Context, Aligned - Size));
5347 // Add whole 64-bit words.
5348 while (Size + 64 <= ToSize) {
5349 Elems.push_back(llvm::Type::getInt64Ty(Context));
5353 // Final in-word padding.
5354 if (Size < ToSize) {
5355 Elems.push_back(llvm::IntegerType::get(Context, ToSize - Size));
5360 // Add a floating point element at Offset.
5361 void addFloat(uint64_t Offset, llvm::Type *Ty, unsigned Bits) {
5362 // Unaligned floats are treated as integers.
5365 // The InReg flag is only required if there are any floats < 64 bits.
5369 Elems.push_back(Ty);
5370 Size = Offset + Bits;
5373 // Add a struct type to the coercion type, starting at Offset (in bits).
5374 void addStruct(uint64_t Offset, llvm::StructType *StrTy) {
5375 const llvm::StructLayout *Layout = DL.getStructLayout(StrTy);
5376 for (unsigned i = 0, e = StrTy->getNumElements(); i != e; ++i) {
5377 llvm::Type *ElemTy = StrTy->getElementType(i);
5378 uint64_t ElemOffset = Offset + Layout->getElementOffsetInBits(i);
5379 switch (ElemTy->getTypeID()) {
5380 case llvm::Type::StructTyID:
5381 addStruct(ElemOffset, cast<llvm::StructType>(ElemTy));
5383 case llvm::Type::FloatTyID:
5384 addFloat(ElemOffset, ElemTy, 32);
5386 case llvm::Type::DoubleTyID:
5387 addFloat(ElemOffset, ElemTy, 64);
5389 case llvm::Type::FP128TyID:
5390 addFloat(ElemOffset, ElemTy, 128);
5392 case llvm::Type::PointerTyID:
5393 if (ElemOffset % 64 == 0) {
5395 Elems.push_back(ElemTy);
5405 // Check if Ty is a usable substitute for the coercion type.
5406 bool isUsableType(llvm::StructType *Ty) const {
5407 if (Ty->getNumElements() != Elems.size())
5409 for (unsigned i = 0, e = Elems.size(); i != e; ++i)
5410 if (Elems[i] != Ty->getElementType(i))
5415 // Get the coercion type as a literal struct type.
5416 llvm::Type *getType() const {
5417 if (Elems.size() == 1)
5418 return Elems.front();
5420 return llvm::StructType::get(Context, Elems);
5424 } // end anonymous namespace
5427 SparcV9ABIInfo::classifyType(QualType Ty, unsigned SizeLimit) const {
5428 if (Ty->isVoidType())
5429 return ABIArgInfo::getIgnore();
5431 uint64_t Size = getContext().getTypeSize(Ty);
5433 // Anything too big to fit in registers is passed with an explicit indirect
5434 // pointer / sret pointer.
5435 if (Size > SizeLimit)
5436 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
5438 // Treat an enum type as its underlying type.
5439 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
5440 Ty = EnumTy->getDecl()->getIntegerType();
5442 // Integer types smaller than a register are extended.
5443 if (Size < 64 && Ty->isIntegerType())
5444 return ABIArgInfo::getExtend();
5446 // Other non-aggregates go in registers.
5447 if (!isAggregateTypeForABI(Ty))
5448 return ABIArgInfo::getDirect();
5450 // If a C++ object has either a non-trivial copy constructor or a non-trivial
5451 // destructor, it is passed with an explicit indirect pointer / sret pointer.
5452 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
5453 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
5455 // This is a small aggregate type that should be passed in registers.
5456 // Build a coercion type from the LLVM struct type.
5457 llvm::StructType *StrTy = dyn_cast<llvm::StructType>(CGT.ConvertType(Ty));
5459 return ABIArgInfo::getDirect();
5461 CoerceBuilder CB(getVMContext(), getDataLayout());
5462 CB.addStruct(0, StrTy);
5463 CB.pad(llvm::RoundUpToAlignment(CB.DL.getTypeSizeInBits(StrTy), 64));
5465 // Try to use the original type for coercion.
5466 llvm::Type *CoerceTy = CB.isUsableType(StrTy) ? StrTy : CB.getType();
5469 return ABIArgInfo::getDirectInReg(CoerceTy);
5471 return ABIArgInfo::getDirect(CoerceTy);
5474 llvm::Value *SparcV9ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5475 CodeGenFunction &CGF) const {
5476 ABIArgInfo AI = classifyType(Ty, 16 * 8);
5477 llvm::Type *ArgTy = CGT.ConvertType(Ty);
5478 if (AI.canHaveCoerceToType() && !AI.getCoerceToType())
5479 AI.setCoerceToType(ArgTy);
5481 llvm::Type *BPP = CGF.Int8PtrPtrTy;
5482 CGBuilderTy &Builder = CGF.Builder;
5483 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
5484 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
5485 llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy);
5486 llvm::Value *ArgAddr;
5489 switch (AI.getKind()) {
5490 case ABIArgInfo::Expand:
5491 llvm_unreachable("Unsupported ABI kind for va_arg");
5493 case ABIArgInfo::Extend:
5496 .CreateConstGEP1_32(Addr, 8 - getDataLayout().getTypeAllocSize(ArgTy),
5500 case ABIArgInfo::Direct:
5501 Stride = getDataLayout().getTypeAllocSize(AI.getCoerceToType());
5505 case ABIArgInfo::Indirect:
5507 ArgAddr = Builder.CreateBitCast(Addr,
5508 llvm::PointerType::getUnqual(ArgPtrTy),
5510 ArgAddr = Builder.CreateLoad(ArgAddr, "indirect.arg");
5513 case ABIArgInfo::Ignore:
5514 return llvm::UndefValue::get(ArgPtrTy);
5518 Addr = Builder.CreateConstGEP1_32(Addr, Stride, "ap.next");
5519 Builder.CreateStore(Addr, VAListAddrAsBPP);
5521 return Builder.CreatePointerCast(ArgAddr, ArgPtrTy, "arg.addr");
5524 void SparcV9ABIInfo::computeInfo(CGFunctionInfo &FI) const {
5525 FI.getReturnInfo() = classifyType(FI.getReturnType(), 32 * 8);
5526 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
5528 it->info = classifyType(it->type, 16 * 8);
5532 class SparcV9TargetCodeGenInfo : public TargetCodeGenInfo {
5534 SparcV9TargetCodeGenInfo(CodeGenTypes &CGT)
5535 : TargetCodeGenInfo(new SparcV9ABIInfo(CGT)) {}
5537 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
5541 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
5542 llvm::Value *Address) const;
5544 } // end anonymous namespace
5547 SparcV9TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
5548 llvm::Value *Address) const {
5549 // This is calculated from the LLVM and GCC tables and verified
5550 // against gcc output. AFAIK all ABIs use the same encoding.
5552 CodeGen::CGBuilderTy &Builder = CGF.Builder;
5554 llvm::IntegerType *i8 = CGF.Int8Ty;
5555 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
5556 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
5558 // 0-31: the 8-byte general-purpose registers
5559 AssignToArrayRange(Builder, Address, Eight8, 0, 31);
5561 // 32-63: f0-31, the 4-byte floating-point registers
5562 AssignToArrayRange(Builder, Address, Four8, 32, 63);
5572 AssignToArrayRange(Builder, Address, Eight8, 64, 71);
5574 // 72-87: d0-15, the 8-byte floating-point registers
5575 AssignToArrayRange(Builder, Address, Eight8, 72, 87);
5581 //===----------------------------------------------------------------------===//
5582 // Xcore ABI Implementation
5583 //===----------------------------------------------------------------------===//
5585 class XCoreABIInfo : public DefaultABIInfo {
5587 XCoreABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
5588 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5589 CodeGenFunction &CGF) const;
5592 class XcoreTargetCodeGenInfo : public TargetCodeGenInfo {
5594 XcoreTargetCodeGenInfo(CodeGenTypes &CGT)
5595 :TargetCodeGenInfo(new XCoreABIInfo(CGT)) {}
5597 } // End anonymous namespace.
5599 llvm::Value *XCoreABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5600 CodeGenFunction &CGF) const {
5601 CGBuilderTy &Builder = CGF.Builder;
5604 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr,
5606 llvm::Value *AP = Builder.CreateLoad(VAListAddrAsBPP);
5608 // Handle the argument.
5609 ABIArgInfo AI = classifyArgumentType(Ty);
5610 llvm::Type *ArgTy = CGT.ConvertType(Ty);
5611 if (AI.canHaveCoerceToType() && !AI.getCoerceToType())
5612 AI.setCoerceToType(ArgTy);
5613 llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy);
5615 uint64_t ArgSize = 0;
5616 switch (AI.getKind()) {
5617 case ABIArgInfo::Expand:
5618 llvm_unreachable("Unsupported ABI kind for va_arg");
5619 case ABIArgInfo::Ignore:
5620 Val = llvm::UndefValue::get(ArgPtrTy);
5623 case ABIArgInfo::Extend:
5624 case ABIArgInfo::Direct:
5625 Val = Builder.CreatePointerCast(AP, ArgPtrTy);
5626 ArgSize = getDataLayout().getTypeAllocSize(AI.getCoerceToType());
5630 case ABIArgInfo::Indirect:
5631 llvm::Value *ArgAddr;
5632 ArgAddr = Builder.CreateBitCast(AP, llvm::PointerType::getUnqual(ArgPtrTy));
5633 ArgAddr = Builder.CreateLoad(ArgAddr);
5634 Val = Builder.CreatePointerCast(ArgAddr, ArgPtrTy);
5639 // Increment the VAList.
5641 llvm::Value *APN = Builder.CreateConstGEP1_32(AP, ArgSize);
5642 Builder.CreateStore(APN, VAListAddrAsBPP);
5647 //===----------------------------------------------------------------------===//
5649 //===----------------------------------------------------------------------===//
5651 const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
5652 if (TheTargetCodeGenInfo)
5653 return *TheTargetCodeGenInfo;
5655 const llvm::Triple &Triple = getTarget().getTriple();
5656 switch (Triple.getArch()) {
5658 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types));
5660 case llvm::Triple::le32:
5661 return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types));
5662 case llvm::Triple::mips:
5663 case llvm::Triple::mipsel:
5664 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true));
5666 case llvm::Triple::mips64:
5667 case llvm::Triple::mips64el:
5668 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false));
5670 case llvm::Triple::aarch64:
5671 return *(TheTargetCodeGenInfo = new AArch64TargetCodeGenInfo(Types));
5673 case llvm::Triple::arm:
5674 case llvm::Triple::thumb:
5676 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS;
5677 if (strcmp(getTarget().getABI(), "apcs-gnu") == 0)
5678 Kind = ARMABIInfo::APCS;
5679 else if (CodeGenOpts.FloatABI == "hard" ||
5680 (CodeGenOpts.FloatABI != "soft" &&
5681 Triple.getEnvironment() == llvm::Triple::GNUEABIHF))
5682 Kind = ARMABIInfo::AAPCS_VFP;
5684 switch (Triple.getOS()) {
5685 case llvm::Triple::NaCl:
5686 return *(TheTargetCodeGenInfo =
5687 new NaClARMTargetCodeGenInfo(Types, Kind));
5689 return *(TheTargetCodeGenInfo =
5690 new ARMTargetCodeGenInfo(Types, Kind));
5694 case llvm::Triple::ppc:
5695 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types));
5696 case llvm::Triple::ppc64:
5697 if (Triple.isOSBinFormatELF())
5698 return *(TheTargetCodeGenInfo = new PPC64_SVR4_TargetCodeGenInfo(Types));
5700 return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types));
5701 case llvm::Triple::ppc64le:
5702 assert(Triple.isOSBinFormatELF() && "PPC64 LE non-ELF not supported!");
5703 return *(TheTargetCodeGenInfo = new PPC64_SVR4_TargetCodeGenInfo(Types));
5705 case llvm::Triple::nvptx:
5706 case llvm::Triple::nvptx64:
5707 return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types));
5709 case llvm::Triple::msp430:
5710 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types));
5712 case llvm::Triple::systemz:
5713 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types));
5715 case llvm::Triple::tce:
5716 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types));
5718 case llvm::Triple::x86: {
5719 bool IsDarwinVectorABI = Triple.isOSDarwin();
5720 bool IsSmallStructInRegABI =
5721 X86_32TargetCodeGenInfo::isStructReturnInRegABI(Triple, CodeGenOpts);
5722 bool IsWin32FloatStructABI = (Triple.getOS() == llvm::Triple::Win32);
5724 if (Triple.getOS() == llvm::Triple::Win32) {
5725 return *(TheTargetCodeGenInfo =
5726 new WinX86_32TargetCodeGenInfo(Types,
5727 IsDarwinVectorABI, IsSmallStructInRegABI,
5728 IsWin32FloatStructABI,
5729 CodeGenOpts.NumRegisterParameters));
5731 return *(TheTargetCodeGenInfo =
5732 new X86_32TargetCodeGenInfo(Types,
5733 IsDarwinVectorABI, IsSmallStructInRegABI,
5734 IsWin32FloatStructABI,
5735 CodeGenOpts.NumRegisterParameters));
5739 case llvm::Triple::x86_64: {
5740 bool HasAVX = strcmp(getTarget().getABI(), "avx") == 0;
5742 switch (Triple.getOS()) {
5743 case llvm::Triple::Win32:
5744 case llvm::Triple::MinGW32:
5745 case llvm::Triple::Cygwin:
5746 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types));
5747 case llvm::Triple::NaCl:
5748 return *(TheTargetCodeGenInfo = new NaClX86_64TargetCodeGenInfo(Types,
5751 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types,
5755 case llvm::Triple::hexagon:
5756 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types));
5757 case llvm::Triple::sparcv9:
5758 return *(TheTargetCodeGenInfo = new SparcV9TargetCodeGenInfo(Types));
5759 case llvm::Triple::xcore:
5760 return *(TheTargetCodeGenInfo = new XcoreTargetCodeGenInfo(Types));