2 .\" Copyright (c) 2005 Bruce M Simpson <bms@FreeBSD.org>
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35 .Nm pci_disable_busmaster ,
37 .Nm pci_enable_busmaster ,
45 .Nm pci_find_pcie_root_port ,
46 .Nm pci_get_max_read_req ,
47 .Nm pci_get_powerstate ,
48 .Nm pci_get_vpd_ident ,
49 .Nm pci_get_vpd_readonly ,
52 .Nm pci_msix_pba_bar ,
53 .Nm pci_msix_table_bar ,
54 .Nm pci_pending_msix ,
58 .Nm pci_restore_state ,
60 .Nm pci_set_max_read_req ,
61 .Nm pci_set_powerstate ,
62 .Nm pci_write_config ,
63 .Nm pcie_adjust_config ,
64 .Nm pcie_read_config ,
72 .Fn pci_alloc_msi "device_t dev" "int *count"
74 .Fn pci_alloc_msix "device_t dev" "int *count"
76 .Fn pci_disable_busmaster "device_t dev"
78 .Fn pci_disable_io "device_t dev" "int space"
80 .Fn pci_enable_busmaster "device_t dev"
82 .Fn pci_enable_io "device_t dev" "int space"
84 .Fn pci_find_bsf "uint8_t bus" "uint8_t slot" "uint8_t func"
86 .Fn pci_find_cap "device_t dev" "int capability" "int *capreg"
88 .Fn pci_find_dbsf "uint32_t domain" "uint8_t bus" "uint8_t slot" "uint8_t func"
90 .Fn pci_find_device "uint16_t vendor" "uint16_t device"
92 .Fn pci_find_extcap "device_t dev" "int capability" "int *capreg"
94 .Fn pci_find_htcap "device_t dev" "int capability" "int *capreg"
96 .Fn pci_find_pcie_root_port "device_t dev"
98 .Fn pci_get_max_read_req "device_t dev"
100 .Fn pci_get_powerstate "device_t dev"
102 .Fn pci_get_vpd_ident "device_t dev" "const char **identptr"
104 .Fn pci_get_vpd_readonly "device_t dev" "const char *kw" "const char **vptr"
106 .Fn pci_msi_count "device_t dev"
108 .Fn pci_msix_count "device_t dev"
110 .Fn pci_msix_pba_bar "device_t dev"
112 .Fn pci_msix_table_bar "device_t dev"
114 .Fn pci_pending_msix "device_t dev" "u_int index"
116 .Fn pci_read_config "device_t dev" "int reg" "int width"
118 .Fn pci_release_msi "device_t dev"
120 .Fn pci_remap_msix "device_t dev" "int count" "const u_int *vectors"
122 .Fn pci_restore_state "device_t dev"
124 .Fn pci_save_state "device_t dev"
126 .Fn pci_set_max_read_req "device_t dev" "int size"
128 .Fn pci_set_powerstate "device_t dev" "int state"
130 .Fn pci_write_config "device_t dev" "int reg" "uint32_t val" "int width"
132 .Fo pcie_adjust_config
140 .Fn pcie_read_config "device_t dev" "int reg" "int width"
142 .Fn pcie_write_config "device_t dev" "int reg" "uint32_t val" "int width"
146 set of functions are used for managing PCI devices.
147 The functions are split into several groups:
148 raw configuration access,
151 device configuration,
153 message signaled interrupts.
154 .Ss Raw Configuration Access
157 function is used to read data from the PCI configuration
164 specifying the size of the access.
168 function is used to write the value
170 to the PCI configuration
177 specifying the size of the access.
180 .Fn pcie_adjust_config
181 function is used to modify the value of a register in the PCI-express
182 capability register set of device
186 specifies a relative offset in the register set with
188 specifying the size of the access.
189 The new value of the register is computed by modifying bits set in
193 Any bits not specified in
196 The previous value of the register is returned.
200 function is used to read the value of a register in the PCI-express
201 capability register set of device
205 specifies a relative offset in the register set with
207 specifying the size of the access.
210 .Fn pcie_write_config
211 function is used to write the value
213 to a register in the PCI-express capability register set of device
217 specifies a relative offset in the register set with
219 specifying the size of the access.
222 Device drivers should only use these functions for functionality that
223 is not available via another
229 function looks up the
231 of a PCI device, given its
238 number actually refers to the number of the device on the bus,
239 which does not necessarily indicate its geographic location
240 in terms of a physical slot.
241 Note that in case the system has multiple PCI domains,
244 function only searches the first one.
245 Actually, it is equivalent to:
246 .Bd -literal -offset indent
247 pci_find_dbsf(0, bus, slot, func);
252 function looks up the
254 of a PCI device, given its
262 number actually refers to the number of the device on the bus,
263 which does not necessarily indicate its geographic location
264 in terms of a physical slot.
268 function looks up the
270 of a PCI device, given its
275 Note that there can be multiple matches for this search; this function
276 only returns the first matching device.
277 .Ss Device Information
280 function is used to locate the first instance of a PCI capability
281 register set for the device
283 The capability to locate is specified by ID via
285 Constant macros of the form
287 for standard capability IDs are defined in
288 .In dev/pci/pcireg.h .
289 If the capability is found, then
291 is set to the offset in configuration space of the capability register set,
295 If the capability is not found or the device does not support capabilities,
301 function is used to locate the first instance of a PCI-express
302 extended capability register set for the device
304 The extended capability to locate is specified by ID via
306 Constant macros of the form
308 for standard extended capability IDs are defined in
309 .In dev/pci/pcireg.h .
310 If the extended capability is found, then
312 is set to the offset in configuration space of the extended capability
316 If the extended capability is not found or the device is not a
323 function is used to locate the first instance of a HyperTransport capability
324 register set for the device
326 The capability to locate is specified by type via
328 Constant macros of the form
330 for standard HyperTransport capability types are defined in
331 .In dev/pci/pcireg.h .
332 If the capability is found, then
334 is set to the offset in configuration space of the capability register set,
338 If the capability is not found or the device is not a HyperTransport device,
343 .Fn pci_find_pcie_root_port
344 function walks up the PCI device hierarchy to locate the PCI-express root
347 If a root port is not found,
348 .Fn pci_find_pcie_root_port
353 .Fn pci_get_vpd_ident
354 function is used to fetch a device's Vital Product Data
359 supports VPD and provides an identifier string,
362 is set to point at a read-only, null-terminated copy of the identifier
365 .Fn pci_get_vpd_ident
367 If the device does not support VPD or does not provide an identifier
370 .Fn pci_get_vpd_ident
374 .Fn pci_get_vpd_readonly
375 function is used to fetch the value of a single VPD read-only keyword
378 The keyword to fetch is identified by the two character string
380 If the device supports VPD and provides a read-only value for the
384 is set to point at a read-only, null-terminated copy of the value,
386 .Fn pci_get_vpd_readonly
388 If the device does not support VPD or does not provide the requested
391 .Fn pci_get_vpd_readonly
393 .Ss Device Configuration
395 .Fn pci_enable_busmaster
396 function enables PCI bus mastering for the device
399 .Dv PCIM_CMD_BUSMASTEREN
404 .Fn pci_disable_busmaster
405 function clears this bit.
409 function enables memory or I/O port address decoding for the device
417 register appropriately.
420 function clears the appropriate bit.
423 argument specifies which resource is affected; this can be either
428 Device drivers should generally not use these routines directly.
429 The PCI bus will enable decoding automatically when a
433 resource is activated via
434 .Xr bus_alloc_resource 9
436 .Xr bus_activate_resource 9 .
439 .Fn pci_get_max_read_req
440 function returns the current maximum read request size in bytes for a
444 device is not a PCI-express device,
445 .Fn pci_get_max_read_req
449 .Fn pci_set_max_read_req
450 sets the PCI-express maximum read request size for
456 .Fn pci_set_max_read_req
457 returns the actual size set in bytes.
460 device is not a PCI-express device,
461 .Fn pci_set_max_read_req
465 .Fn pci_get_powerstate
466 function returns the current power state of the device
468 If the device does not support power management capabilities, then the default
470 .Dv PCI_POWERSTATE_D0
472 The following power states are defined by PCI:
473 .Bl -hang -width ".Dv PCI_POWERSTATE_UNKNOWN"
474 .It Dv PCI_POWERSTATE_D0
475 State in which device is on and running.
476 It is receiving full power from the system and delivering
477 full functionality to the user.
478 .It Dv PCI_POWERSTATE_D1
479 Class-specific low-power state in which device context may or
481 Busses in this state cannot do anything to the bus, to
482 force devices to lose context.
483 .It Dv PCI_POWERSTATE_D2
484 Class-specific low-power state in which device context may or
486 Attains greater power savings than
487 .Dv PCI_POWERSTATE_D1 .
488 Busses in this state can cause devices to lose some context.
491 be prepared for the bus to be in this state or higher.
492 .It Dv PCI_POWERSTATE_D3
493 State in which the device is off and not running.
494 Device context is lost, and power from the device can
496 .It Dv PCI_POWERSTATE_UNKNOWN
497 State of the device is unknown.
501 .Fn pci_set_powerstate
502 function is used to transition the device
504 to the PCI power state
506 If the device does not support power management capabilities or
507 it does not support the specific power state
509 then the function will fail with
515 .Fn pci_restore_state
516 functions can be used by a device driver to save and restore standard PCI
520 function must be invoked while the device has valid state before
521 .Fn pci_restore_state
523 If the device is not in the fully-powered state
524 .Pq Dv PCI_POWERSTATE_D0
526 .Fn pci_restore_state
528 then the device will be transitioned to
529 .Dv PCI_POWERSTATE_D0
530 before any config registers are restored.
531 .Ss Message Signaled Interrupts
532 Message Signaled Interrupts
535 Enhanced Message Signaled Interrupts
537 are PCI capabilities that provide an alternate method for PCI
538 devices to signal interrupts.
539 The legacy INTx interrupt is available to PCI devices as a
541 resource with a resource ID of zero.
542 MSI and MSI-X interrupts are available to PCI devices as one or more
544 resources with resource IDs greater than zero.
545 A driver must ask the PCI bus to allocate MSI or MSI-X interrupts
550 before it can use MSI or MSI-X
553 A driver is not allowed to use the legacy INTx
555 resource if MSI or MSI-X interrupts have been allocated,
556 and attempts to allocate MSI or MSI-X interrupts will fail if the
557 driver is currently using the legacy INTx
560 A driver is only allowed to use either MSI or MSI-X,
565 function returns the maximum number of MSI messages supported by the
568 If the device does not support MSI,
575 function attempts to allocate
577 MSI messages for the device
581 function may allocate fewer messages than requested for various
582 reasons including requests for more messages than the device
585 or if the system has a shortage of available MSI messages.
588 is set to the number of messages allocated and
593 resources for the allocated messages will be available at consecutive
594 resource IDs beginning with one.
597 is not able to allocate any messages,
599 Note that MSI only supports message counts that are powers of two;
600 requests to allocate a non-power of two count of messages will fail.
604 function is used to release any allocated MSI or MSI-X messages back
608 resources are allocated by the driver or have a configured interrupt
610 this function will fail with
614 function returns zero on success and an error on failure.
618 function returns the maximum number of MSI-X messages supported by the
621 If the device does not support MSI-X,
628 function returns the offset in configuration space of the Base Address Register
630 containing the MSI-X Pending Bit Array (PBA) for device
632 The returned value can be used as the resource ID with
633 .Xr bus_alloc_resource 9
635 .Xr bus_release_resource 9
637 If the device does not support MSI-X,
643 .Fn pci_msix_table_bar
644 function returns the offset in configuration space of the BAR
645 containing the MSI-X vector table for device
647 The returned value can be used as the resource ID with
648 .Xr bus_alloc_resource 9
650 .Xr bus_release_resource 9
652 If the device does not support MSI-X,
654 .Fn pci_msix_table_bar
659 function attempts to allocate
661 MSI-X messages for the device
665 function may allocate fewer messages than requested for various
666 reasons including requests for more messages than the device
669 or if the system has a shortage of available MSI-X messages.
672 is set to the number of messages allocated and
676 the resource ID for each
678 resource identifies the index in the MSI-X table of the
679 corresponding message.
680 A resource ID of one maps to the first index of the MSI-X table;
681 a resource ID two identifies the second index in the table, etc.
686 messages allocated to the first
691 is not able to allocate any messages,
694 MSI-X does not require message counts that are powers of two.
696 The BARs containing the MSI-X vector table and PBA must be
698 .Xr bus_alloc_resource 9
701 and must not be released until after calling
702 .Fn pci_release_msi .
703 Note that the vector table and PBA may be stored in the same BAR or in
708 function examines the
711 to determine the pending status of the MSI-X message at table index
713 If the indicated message is pending,
714 this function returns a non-zero value;
719 to this function will result in undefined behavior.
721 As mentioned in the description of
723 MSI-X messages are initially assigned to the first N table entries.
724 A driver may use a different distribution of available messages to
725 table entries via the
728 Note that this function must be called after a successful call to
730 but before any of the
732 resources are allocated.
735 function returns zero on success,
736 or an error on failure.
743 The array maps directly to the MSI-X table in that the first entry in
744 the array specifies the message used for the first entry in the MSI-X
746 the second entry in the array corresponds to the second entry in the
749 The vector value in each array index can either be zero to indicate
750 that no message should be assigned to the corresponding MSI-X table entry,
751 or it can be a number from one to N
753 where N is the count returned from the previous call to
756 to indicate which of the allocated messages should be assigned to the
757 corresponding MSI-X table entry.
762 each MSI-X table entry with a non-zero vector will have an associated
764 resource whose resource ID corresponds to the table index as described
767 MSI-X table entries that with a vector of zero will not have an
772 if any of the original messages allocated by
774 are not used in the new distribution of messages in the MSI-X table,
775 they will be released automatically.
776 Note that if a driver wishes to use fewer messages than were allocated by
778 the driver must use a single, contiguous range of messages beginning
779 with one in the new distribution.
782 function will fail if this condition is not met.
783 .Sh IMPLEMENTATION NOTES
786 type varies according to the size of the PCI bus address
787 space on the target architecture.
791 .Xr bus_alloc_resource 9 ,
793 .Xr bus_release_resource 9 ,
794 .Xr bus_setup_intr 9 ,
795 .Xr bus_teardown_intr 9 ,
801 .%B FreeBSD Developers' Handbook
803 .%U http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/developers-handbook/
808 .%B PCI System Architecture
811 .%O ISBN 0-201-30974-2
814 This manual page was written by
815 .An Bruce M Simpson Aq bms@FreeBSD.org
817 .An John Baldwin Aq jhb@FreeBSD.org .
819 The kernel PCI code has a number of references to
821 These do not refer to the geographic location of PCI devices,
822 but to the device number assigned by the combination of the PCI IDSEL
823 mechanism and the platform firmware.
824 This should be taken note of when working with the kernel PCI code.
826 The PCI bus driver should allocate the MSI-X vector table and PBA internally
827 as necessary rather than requiring the caller to do so.