2 * Copyright (c) 2010 The FreeBSD Foundation
3 * Copyright (c) 2010-2011 Semihalf
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * Marvell DB-78460 Device Tree Source.
35 model = "mrvl,DB-78460";
49 compatible = "ARM,88VS584";
51 d-cache-line-size = <32>; // 32 bytes
52 i-cache-line-size = <32>; // 32 bytes
53 d-cache-size = <0x8000>; // L1, 32K
54 i-cache-size = <0x8000>; // L1, 32K
55 timebase-frequency = <0>;
56 bus-frequency = <200000000>;
57 clock-frequency = <0>;
62 device_type = "memory";
63 reg = <0x0 0x80000000>; // 2G at 0x0
69 compatible = "simple-bus";
70 ranges = <0x0 0xd0000000 0x00100000>;
77 #interrupt-cells = <1>;
78 reg = <0x20a00 0x500 0x21000 0x800 0x20400 0x100>;
79 compatible = "mrvl,mpic";
83 compatible = "mrvl,rtc";
88 compatible = "mrvl,timer";
91 interrupt-parent = <&MPIC>;
98 compatible = "mrvl,twsi";
101 interrupt-parent = <&MPIC>;
105 #address-cells = <1>;
107 compatible = "mrvl,twsi";
108 reg = <0x11100 0x20>;
110 interrupt-parent = <&MPIC>;
113 serial0: serial@12000 {
114 compatible = "ns16550";
115 reg = <0x12000 0x20>;
117 current-speed = <115200>;
118 clock-frequency = <0>;
121 interrupt-parent = <&MPIC>;
124 serial1: serial@12100 {
125 compatible = "ns16550";
126 reg = <0x12100 0x20>;
128 current-speed = <115200>;
129 clock-frequency = <0>;
132 interrupt-parent = <&MPIC>;
135 serial2: serial@12200 {
136 compatible = "ns16550";
137 reg = <0x12200 0x20>;
139 current-speed = <115200>;
140 clock-frequency = <0>;
143 interrupt-parent = <&MPIC>;
146 serial3: serial@12300 {
147 compatible = "ns16550";
148 reg = <0x12300 0x20>;
150 current-speed = <115200>;
151 clock-frequency = <0>;
154 interrupt-parent = <&MPIC>;
159 compatible = "mrvl,mpp";
160 reg = <0x18000 0x34>;
163 0 1 /* MPP[0]: GE1_TXCLK */
164 1 1 /* MPP[1]: GE1_TXCTL */
165 2 1 /* MPP[2]: GE1_RXCTL */
166 3 1 /* MPP[3]: GE1_RXCLK */
167 4 1 /* MPP[4]: GE1_TXD[0] */
168 5 1 /* MPP[5]: GE1_TXD[1] */
169 6 1 /* MPP[6]: GE1_TXD[2] */
170 7 1 /* MPP[7]: GE1_TXD[3] */
171 8 1 /* MPP[8]: GE1_RXD[0] */
172 9 1 /* MPP[9]: GE1_RXD[1] */
173 10 1 /* MPP[10]: GE1_RXD[2] */
174 11 1 /* MPP[11]: GE1_RXD[3] */
175 12 2 /* MPP[13]: SYSRST_OUTn */
176 13 2 /* MPP[13]: SYSRST_OUTn */
177 14 2 /* MPP[14]: SATA1_ACTn */
178 15 2 /* MPP[15]: SATA0_ACTn */
179 16 2 /* MPP[16]: UA2_TXD */
180 17 2 /* MPP[17]: UA2_RXD */
181 18 2 /* MPP[18]: <UNKNOWN> */
182 19 2 /* MPP[19]: <UNKNOWN> */
183 20 2 /* MPP[20]: <UNKNOWN> */
184 21 2 /* MPP[21]: <UNKNOWN> */
185 22 2 /* MPP[22]: UA3_TXD */
234 compatible = "mrvl,usb-ehci", "usb-ehci";
235 reg = <0x50000 0x1000>;
236 interrupts = <124 45>;
237 interrupt-parent = <&MPIC>;
241 compatible = "mrvl,usb-ehci", "usb-ehci";
242 reg = <0x51000 0x1000>;
243 interrupts = <124 46>;
244 interrupt-parent = <&MPIC>;
248 compatible = "mrvl,usb-ehci", "usb-ehci";
249 reg = <0x52000 0x1000>;
250 interrupts = <124 47>;
251 interrupt-parent = <&MPIC>;
254 enet0: ethernet@72000 {
255 #address-cells = <1>;
258 compatible = "mrvl,ge";
259 reg = <0x72000 0x2000>;
260 ranges = <0x0 0x72000 0x2000>;
261 local-mac-address = [ 00 04 01 07 84 60 ];
262 interrupts = <67 68 122 >;
263 interrupt-parent = <&MPIC>;
264 phy-handle = <&phy0>;
268 #address-cells = <1>;
270 compatible = "mrvl,mdio";
272 phy0: ethernet-phy@0 {
275 phy1: ethernet-phy@1 {
278 phy2: ethernet-phy@2 {
281 phy3: ethernet-phy@3 {
288 compatible = "mrvl,sata";
289 reg = <0xA0000 0x6000>;
291 interrupt-parent = <&MPIC>;
295 pci0: pcie@d0040000 {
296 compatible = "mrvl,pcie";
298 #interrupt-cells = <1>;
300 #address-cells = <3>;
301 reg = <0xd0040000 0x2000>;
303 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
304 0x01000000 0x0 0x00000000 0xa0000000 0x0 0x08000000>;
305 clock-frequency = <33333333>;
306 interrupt-parent = <&MPIC>;
308 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
310 0x0800 0x0 0x0 0x1 &MPIC 0x3A
311 0x0800 0x0 0x0 0x2 &MPIC 0x3A
312 0x0800 0x0 0x0 0x3 &MPIC 0x3A
313 0x0800 0x0 0x0 0x4 &MPIC 0x3A
318 compatible = "mrvl,cesa-sram";
319 reg = <0xffff0000 0x00010000>;