2 * Copyright (c) 2013 Ian Lepore
3 * Copyright (c) 2010 The FreeBSD Foundation
6 * This software substantially based on work developed by Semihalf
7 * under sponsorship from the FreeBSD Foundation.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * GlobalScale Technologies DreamPlug Device Tree Source.
32 * This source is for version 10 revision 01 units with NOR SPI flash.
33 * These units are marked "1001" on the serial number label.
41 model = "GlobalScale Technologies Dreamplug v1001";
42 compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
62 compatible = "ARM,88FR131";
64 d-cache-line-size = <32>; // 32 bytes
65 i-cache-line-size = <32>; // 32 bytes
66 d-cache-size = <0x4000>; // L1, 16K
67 i-cache-size = <0x4000>; // L1, 16K
68 timebase-frequency = <0>;
70 clock-frequency = <0>;
76 device_type = "memory";
77 reg = <0x0 0x20000000>; // 512M at 0x0
83 compatible = "mrvl,lbc";
86 /* This reflects CPU decode windows setup. */
87 ranges = <0x0 0x1e 0xfa000000 0x00100000>;
92 compatible = "cfi-flash";
93 reg = <0x0 0x0 0x00100000>;
99 SOC: soc88f6281@f1000000 {
100 #address-cells = <1>;
102 compatible = "simple-bus";
103 ranges = <0x0 0xf1000000 0x00100000>;
107 interrupt-controller;
108 #address-cells = <0>;
109 #interrupt-cells = <1>;
110 reg = <0x20200 0x3c>;
111 compatible = "mrvl,pic";
115 compatible = "mrvl,timer";
116 reg = <0x20300 0x30>;
118 interrupt-parent = <&PIC>;
124 compatible = "mrvl,mpp";
125 reg = <0x10000 0x34>;
128 0 2 /* MPP[ 0]: SPI_SCn */
129 1 2 /* MPP[ 1]: SPI_MOSI */
130 2 2 /* MPP[ 2]: SPI_SCK */
131 3 2 /* MPP[ 3]: SPI_MISO */
132 4 1 /* MPP[ 4]: NF_IO[6] */
133 5 1 /* MPP[ 5]: NF_IO[7] */
134 6 1 /* MPP[ 6]: SYSRST_OUTn */
135 7 0 /* MPP[ 7]: GPO[7] */
136 8 1 /* MPP[ 8]: TW_SDA */
137 9 1 /* MPP[ 9]: TW_SCK */
138 10 3 /* MPP[10]: UA0_TXD */
139 11 3 /* MPP[11]: US0_RXD */
140 12 1 /* MPP[12]: SD_CLK */
141 13 1 /* MPP[13]: SD_CMD */
142 14 1 /* MPP[14]: SD_D[0] */
143 15 1 /* MPP[15]: SD_D[1] */
144 16 1 /* MPP[16]: SD_D[2] */
145 17 1 /* MPP[17]: SD_D[3] */
146 18 1 /* MPP[18]: NF_IO[0] */
147 19 1 /* MPP[19]: NF_IO[1] */
148 20 3 /* MPP[20]: GE1[ 0] */
149 21 3 /* MPP[21]: GE1[ 1] */
150 22 3 /* MPP[22]: GE1[ 2] */
151 23 3 /* MPP[23]: GE1[ 3] */
152 24 3 /* MPP[24]: GE1[ 4] */
153 25 3 /* MPP[25]: GE1[ 5] */
154 26 3 /* MPP[26]: GE1[ 6] */
155 27 3 /* MPP[27]: GE1[ 7] */
156 28 3 /* MPP[28]: GE1[ 8] */
157 29 3 /* MPP[29]: GE1[ 9] */
158 30 3 /* MPP[30]: GE1[10] */
159 31 3 /* MPP[31]: GE1[11] */
160 32 3 /* MPP[32]: GE1[12] */
161 33 3 /* MPP[33]: GE1[13] */
162 34 3 /* MPP[34]: GE1[14] */
163 35 3 /* MPP[35]: GE1[15] */
164 36 0 /* MPP[36]: GPIO[36] */
165 37 0 /* MPP[37]: GPIO[37] */
166 38 0 /* MPP[38]: GPIO[38] */
167 39 0 /* MPP[39]: GPIO[39] */
168 40 2 /* MPP[40]: TDM_SPI_SCK */
169 41 2 /* MPP[41]: TDM_SPI_MISO */
170 42 2 /* MPP[42]: TDM_SPI_MOSI */
171 43 0 /* MPP[43]: GPIO[43] */
172 44 0 /* MPP[44]: GPIO[44] */
173 45 0 /* MPP[45]: GPIO[45] */
174 46 0 /* MPP[46]: GPIO[46] */
175 47 0 /* MPP[47]: GPIO[47] */
176 48 0 /* MPP[48]: GPIO[48] */
177 49 0 /* MPP[49]: GPIO[49] */
183 compatible = "mrvl,gpio";
184 reg = <0x10100 0x20>;
186 interrupts = <35 36 37 38 39 40 41>;
187 interrupt-parent = <&PIC>;
192 compatible = "mrvl,gpioled";
194 gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */
195 &GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */
196 &GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */
200 compatible = "mrvl,rtc";
201 reg = <0x10300 0x08>;
205 #address-cells = <1>;
207 compatible = "mrvl,twsi";
208 reg = <0x11000 0x20>;
210 interrupt-parent = <&PIC>;
213 enet0: ethernet@72000 {
214 #address-cells = <1>;
217 compatible = "mrvl,ge";
218 reg = <0x72000 0x2000>;
219 ranges = <0x0 0x72000 0x2000>;
220 local-mac-address = [ 00 00 00 00 00 00 ];
221 interrupts = <12 13 14 11 46>;
222 interrupt-parent = <&PIC>;
223 phy-handle = <&phy0>;
226 #address-cells = <1>;
228 compatible = "mrvl,mdio";
230 phy0: ethernet-phy@0 {
234 phy1: ethernet-phy@1 {
240 enet1: ethernet@76000 {
241 #address-cells = <1>;
244 compatible = "mrvl,ge";
245 reg = <0x76000 0x02000>;
246 ranges = <0x0 0x76000 0x2000>;
247 local-mac-address = [ 00 00 00 00 00 00 ];
248 interrupts = <16 17 18 15 47>;
249 interrupt-parent = <&PIC>;
250 phy-handle = <&phy1>;
253 serial0: serial@12000 {
254 compatible = "ns16550";
255 reg = <0x12000 0x20>;
257 clock-frequency = <0>;
259 interrupt-parent = <&PIC>;
262 serial1: serial@12100 {
263 compatible = "ns16550";
264 reg = <0x12100 0x20>;
266 clock-frequency = <0>;
268 interrupt-parent = <&PIC>;
272 compatible = "mrvl,cesa";
273 reg = <0x30000 0x10000>;
275 interrupt-parent = <&PIC>;
277 sram-handle = <&SRAM>;
281 compatible = "mrvl,usb-ehci", "usb-ehci";
282 reg = <0x50000 0x1000>;
283 interrupts = <48 19>;
284 interrupt-parent = <&PIC>;
288 compatible = "mrvl,xor";
289 reg = <0x60000 0x1000>;
290 interrupts = <5 6 7 8>;
291 interrupt-parent = <&PIC>;
295 compatible = "mrvl,sata";
296 reg = <0x80000 0x6000>;
298 interrupt-parent = <&PIC>;
302 compatible = "mrvl,sdio";
303 reg = <0x90000 0x134>;
305 interrupt-parent = <&PIC>;
309 SRAM: sram@fd000000 {
310 compatible = "mrvl,cesa-sram";
311 reg = <0xfd000000 0x00100000>;