4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License"). You may not use this file except in compliance
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
26 * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
27 * Use is subject to license terms.
31 * Copyright (c) 2011, Joyent, Inc. All rights reserved.
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/types.h>
37 #include <sys/kernel.h>
38 #include <sys/malloc.h>
41 #include <sys/dtrace_impl.h>
42 #include <sys/dtrace_bsd.h>
43 #include <machine/clock.h>
44 #include <machine/frame.h>
47 extern uintptr_t dtrace_in_probe_addr;
48 extern int dtrace_in_probe;
50 extern void dtrace_getnanotime(struct timespec *tsp);
52 int dtrace_invop(uintptr_t, uintptr_t *, uintptr_t);
54 typedef struct dtrace_invop_hdlr {
55 int (*dtih_func)(uintptr_t, uintptr_t *, uintptr_t);
56 struct dtrace_invop_hdlr *dtih_next;
57 } dtrace_invop_hdlr_t;
59 dtrace_invop_hdlr_t *dtrace_invop_hdlr;
62 dtrace_invop(uintptr_t addr, uintptr_t *stack, uintptr_t eax)
64 dtrace_invop_hdlr_t *hdlr;
67 for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next)
68 if ((rval = hdlr->dtih_func(addr, stack, eax)) != 0)
75 dtrace_invop_add(int (*func)(uintptr_t, uintptr_t *, uintptr_t))
77 dtrace_invop_hdlr_t *hdlr;
79 hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP);
80 hdlr->dtih_func = func;
81 hdlr->dtih_next = dtrace_invop_hdlr;
82 dtrace_invop_hdlr = hdlr;
86 dtrace_invop_remove(int (*func)(uintptr_t, uintptr_t *, uintptr_t))
88 dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL;
92 panic("attempt to remove non-existent invop handler");
94 if (hdlr->dtih_func == func)
98 hdlr = hdlr->dtih_next;
102 ASSERT(dtrace_invop_hdlr == hdlr);
103 dtrace_invop_hdlr = hdlr->dtih_next;
105 ASSERT(dtrace_invop_hdlr != hdlr);
106 prev->dtih_next = hdlr->dtih_next;
114 dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit))
116 (*func)(0, (uintptr_t) addr_PTmap);
120 dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg)
124 if (cpu == DTRACE_CPUALL)
127 CPU_SETOF(cpu, &cpus);
129 smp_rendezvous_cpus(cpus, smp_no_rendevous_barrier, func,
130 smp_no_rendevous_barrier, arg);
134 dtrace_sync_func(void)
141 dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL);
145 int (*dtrace_pid_probe_ptr)(struct regs *);
146 int (*dtrace_return_probe_ptr)(struct regs *);
149 dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid)
153 extern void trap(struct regs *, caddr_t, processorid_t);
155 if (USERMODE(rp->r_cs) || (rp->r_ps & PS_VM)) {
156 if (curthread->t_cred != p->p_cred) {
157 cred_t *oldcred = curthread->t_cred;
159 * DTrace accesses t_cred in probe context. t_cred
160 * must always be either NULL, or point to a valid,
161 * allocated cred structure.
163 curthread->t_cred = crgetcred();
168 if (rp->r_trapno == T_DTRACE_RET) {
169 uint8_t step = curthread->t_dtrace_step;
170 uint8_t ret = curthread->t_dtrace_ret;
171 uintptr_t npc = curthread->t_dtrace_npc;
173 if (curthread->t_dtrace_ast) {
175 curthread->t_sig_check = 1;
179 * Clear all user tracing flags.
181 curthread->t_dtrace_ft = 0;
184 * If we weren't expecting to take a return probe trap, kill
185 * the process as though it had just executed an unassigned
189 tsignal(curthread, SIGILL);
194 * If we hit this trap unrelated to a return probe, we're
195 * just here to reset the AST flag since we deferred a signal
196 * until after we logically single-stepped the instruction we
205 * We need to wait until after we've called the
206 * dtrace_return_probe_ptr function pointer to set %pc.
208 rwp = &CPU->cpu_ft_lock;
209 rw_enter(rwp, RW_READER);
210 if (dtrace_return_probe_ptr != NULL)
211 (void) (*dtrace_return_probe_ptr)(rp);
215 } else if (rp->r_trapno == T_BPTFLT) {
217 rwp = &CPU->cpu_ft_lock;
220 * The DTrace fasttrap provider uses the breakpoint trap
221 * (int 3). We let DTrace take the first crack at handling
222 * this trap; if it's not a probe that DTrace knowns about,
223 * we call into the trap() routine to handle it like a
224 * breakpoint placed by a conventional debugger.
226 rw_enter(rwp, RW_READER);
227 if (dtrace_pid_probe_ptr != NULL &&
228 (*dtrace_pid_probe_ptr)(rp) == 0) {
235 * If the instruction that caused the breakpoint trap doesn't
236 * look like an int 3 anymore, it may be that this tracepoint
237 * was removed just after the user thread executed it. In
238 * that case, return to user land to retry the instuction.
240 if (fuword8((void *)(rp->r_pc - 1), &instr) == 0 &&
241 instr != FASTTRAP_INSTR) {
246 trap(rp, addr, cpuid);
249 trap(rp, addr, cpuid);
254 dtrace_safe_synchronous_signal(void)
256 kthread_t *t = curthread;
257 struct regs *rp = lwptoregs(ttolwp(t));
258 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc;
260 ASSERT(t->t_dtrace_on);
263 * If we're not in the range of scratch addresses, we're not actually
264 * tracing user instructions so turn off the flags. If the instruction
265 * we copied out caused a synchonous trap, reset the pc back to its
266 * original value and turn off the flags.
268 if (rp->r_pc < t->t_dtrace_scrpc ||
269 rp->r_pc > t->t_dtrace_astpc + isz) {
271 } else if (rp->r_pc == t->t_dtrace_scrpc ||
272 rp->r_pc == t->t_dtrace_astpc) {
273 rp->r_pc = t->t_dtrace_pc;
279 dtrace_safe_defer_signal(void)
281 kthread_t *t = curthread;
282 struct regs *rp = lwptoregs(ttolwp(t));
283 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc;
285 ASSERT(t->t_dtrace_on);
288 * If we're not in the range of scratch addresses, we're not actually
289 * tracing user instructions so turn off the flags.
291 if (rp->r_pc < t->t_dtrace_scrpc ||
292 rp->r_pc > t->t_dtrace_astpc + isz) {
298 * If we have executed the original instruction, but we have performed
299 * neither the jmp back to t->t_dtrace_npc nor the clean up of any
300 * registers used to emulate %rip-relative instructions in 64-bit mode,
301 * we'll save ourselves some effort by doing that here and taking the
302 * signal right away. We detect this condition by seeing if the program
303 * counter is the range [scrpc + isz, astpc).
305 if (rp->r_pc >= t->t_dtrace_scrpc + isz &&
306 rp->r_pc < t->t_dtrace_astpc) {
309 * If there is a scratch register and we're on the
310 * instruction immediately after the modified instruction,
311 * restore the value of that scratch register.
313 if (t->t_dtrace_reg != 0 &&
314 rp->r_pc == t->t_dtrace_scrpc + isz) {
315 switch (t->t_dtrace_reg) {
317 rp->r_rax = t->t_dtrace_regv;
320 rp->r_rcx = t->t_dtrace_regv;
323 rp->r_r8 = t->t_dtrace_regv;
326 rp->r_r9 = t->t_dtrace_regv;
331 rp->r_pc = t->t_dtrace_npc;
337 * Otherwise, make sure we'll return to the kernel after executing
338 * the copied out instruction and defer the signal.
340 if (!t->t_dtrace_step) {
341 ASSERT(rp->r_pc < t->t_dtrace_astpc);
342 rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc;
343 t->t_dtrace_step = 1;
352 static int64_t tgt_cpu_tsc;
353 static int64_t hst_cpu_tsc;
354 static int64_t tsc_skew[MAXCPU];
355 static uint64_t nsec_scale;
357 /* See below for the explanation of this macro. */
358 #define SCALE_SHIFT 28
361 dtrace_gethrtime_init_cpu(void *arg)
363 uintptr_t cpu = (uintptr_t) arg;
366 tgt_cpu_tsc = rdtsc();
368 hst_cpu_tsc = rdtsc();
372 dtrace_gethrtime_init(void *arg)
380 * Get TSC frequency known at this moment.
381 * This should be constant if TSC is invariant.
382 * Otherwise tick->time conversion will be inaccurate, but
383 * will preserve monotonic property of TSC.
385 tsc_f = atomic_load_acq_64(&tsc_freq);
388 * The following line checks that nsec_scale calculated below
389 * doesn't overflow 32-bit unsigned integer, so that it can multiply
390 * another 32-bit integer without overflowing 64-bit.
391 * Thus minimum supported TSC frequency is 62.5MHz.
393 KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT)), ("TSC frequency is too low"));
396 * We scale up NANOSEC/tsc_f ratio to preserve as much precision
398 * 2^28 factor was chosen quite arbitrarily from practical
400 * - it supports TSC frequencies as low as 62.5MHz (see above);
401 * - it provides quite good precision (e < 0.01%) up to THz
402 * (terahertz) values;
404 nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f;
406 /* The current CPU is the reference one. */
408 tsc_skew[curcpu] = 0;
414 CPU_SETOF(PCPU_GET(cpuid), &map);
415 CPU_SET(pc->pc_cpuid, &map);
417 smp_rendezvous_cpus(map, NULL,
418 dtrace_gethrtime_init_cpu,
419 smp_no_rendevous_barrier, (void *)(uintptr_t) i);
421 tsc_skew[i] = tgt_cpu_tsc - hst_cpu_tsc;
426 SYSINIT(dtrace_gethrtime_init, SI_SUB_SMP, SI_ORDER_ANY, dtrace_gethrtime_init, NULL);
429 * DTrace needs a high resolution time function which can
430 * be called from a probe context and guaranteed not to have
431 * instrumented with probes itself.
433 * Returns nanoseconds since boot.
443 * We split TSC value into lower and higher 32-bit halves and separately
444 * scale them with nsec_scale, then we scale them down by 2^28
445 * (see nsec_scale calculations) taking into account 32-bit shift of
446 * the higher half and finally add.
448 tsc = rdtsc() - tsc_skew[curcpu];
451 return (((lo * nsec_scale) >> SCALE_SHIFT) +
452 ((hi * nsec_scale) << (32 - SCALE_SHIFT)));
456 dtrace_gethrestime(void)
458 struct timespec current_time;
460 dtrace_getnanotime(¤t_time);
462 return (current_time.tv_sec * 1000000000ULL + current_time.tv_nsec);
465 /* Function to handle DTrace traps during probes. See amd64/amd64/trap.c */
467 dtrace_trap(struct trapframe *frame, u_int type)
470 * A trap can occur while DTrace executes a probe. Before
471 * executing the probe, DTrace blocks re-scheduling and sets
472 * a flag in it's per-cpu flags to indicate that it doesn't
473 * want to fault. On returning from the probe, the no-fault
474 * flag is cleared and finally re-scheduling is enabled.
476 * Check if DTrace has enabled 'no-fault' mode:
479 if ((cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT) != 0) {
481 * There are only a couple of trap types that are expected.
482 * All the rest will be handled in the usual way.
485 /* Privilieged instruction fault. */
488 /* General protection fault. */
490 /* Flag an illegal operation. */
491 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP;
494 * Offset the instruction pointer to the instruction
495 * following the one causing the fault.
497 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip);
501 /* Flag a bad address. */
502 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR;
503 cpu_core[curcpu].cpuc_dtrace_illval = frame->tf_addr;
506 * Offset the instruction pointer to the instruction
507 * following the one causing the fault.
509 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip);
512 /* Handle all other traps in the usual way. */
517 /* Handle the trap in the usual way. */