2 * Copyright (c) 2013 Bjoern A. Zeeb
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249)
7 * ("MRC2"), as part of the DARPA MRC research programme.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
39 #include <sys/socket.h>
40 #include <sys/systm.h>
42 #include <machine/bus.h>
43 #include <machine/resource.h>
45 #include <net/ethernet.h>
47 #include <net/if_media.h>
49 #include <dev/mii/mii.h>
50 #include <dev/mii/miivar.h>
53 #include <dev/fdt/fdt_common.h>
54 #include <dev/ofw/openfirm.h>
55 #include <dev/ofw/ofw_bus.h>
56 #include <dev/ofw/ofw_bus_subr.h>
58 #include <dev/altera/atse/if_atsereg.h>
60 /* "device miibus" required. See GENERIC if you get errors here. */
61 #include "miibus_if.h"
64 atse_probe_fdt(device_t dev)
67 if (!ofw_bus_status_okay(dev))
70 if (ofw_bus_is_compatible(dev, "altera,atse")) {
71 device_set_desc(dev, "Altera Triple-Speed Ethernet MegaCore");
72 return (BUS_PROBE_DEFAULT);
78 atse_attach_fdt(device_t dev)
80 struct atse_softc *sc;
83 sc = device_get_softc(dev);
85 sc->atse_unit = device_get_unit(dev);
88 * FDT has the list of our resources. Given we are using multiple
89 * memory regions and possibly multiple interrupts, we need to attach
90 * them in the order specified in .dts:
91 * MAC, RX and RXC FIFO, TX and TXC FIFO; RX INTR, TX INTR.
94 /* MAC: Avalon-MM, atse management register region. */
96 sc->atse_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
97 &sc->atse_mem_rid, RF_ACTIVE);
98 if (sc->atse_mem_res == NULL) {
99 device_printf(dev, "failed to map memory for ctrl region\n");
104 device_printf(sc->atse_dev, "MAC ctrl region at mem %p-%p\n",
105 (void *)rman_get_start(sc->atse_mem_res),
106 (void *)(rman_get_start(sc->atse_mem_res) +
107 rman_get_size(sc->atse_mem_res)));
110 * RX and RXC FIFO memory regions.
111 * 0x00: 2 * 32bit FIFO data,
112 * 0x20: 8 * 32bit FIFO ctrl, Avalon-ST Sink to Avalon-MM R-Slave.
114 sc->atse_rx_mem_rid = 1;
115 sc->atse_rx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
116 &sc->atse_rx_mem_rid, RF_ACTIVE);
117 if (sc->atse_rx_mem_res == NULL) {
118 device_printf(dev, "failed to map memory for RX FIFO\n");
123 device_printf(sc->atse_dev, "RX FIFO at mem %p-%p\n",
124 (void *)rman_get_start(sc->atse_rx_mem_res),
125 (void *)(rman_get_start(sc->atse_rx_mem_res) +
126 rman_get_size(sc->atse_rx_mem_res)));
128 sc->atse_rxc_mem_rid = 2;
129 sc->atse_rxc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
130 &sc->atse_rxc_mem_rid, RF_ACTIVE);
131 if (sc->atse_rxc_mem_res == NULL) {
132 device_printf(dev, "failed to map memory for RXC FIFO\n");
137 device_printf(sc->atse_dev, "RXC FIFO at mem %p-%p\n",
138 (void *)rman_get_start(sc->atse_rxc_mem_res),
139 (void *)(rman_get_start(sc->atse_rxc_mem_res) +
140 rman_get_size(sc->atse_rxc_mem_res)));
143 * TX and TXC FIFO memory regions.
144 * 0x00: 2 * 32bit FIFO data,
145 * 0x20: 8 * 32bit FIFO ctrl, Avalon-MM W-Slave to Avalon-ST Source.
147 sc->atse_tx_mem_rid = 3;
148 sc->atse_tx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
149 &sc->atse_tx_mem_rid, RF_ACTIVE);
150 if (sc->atse_tx_mem_res == NULL) {
151 device_printf(dev, "failed to map memory for TX FIFO\n");
156 device_printf(sc->atse_dev, "TX FIFO at mem %p-%p\n",
157 (void *)rman_get_start(sc->atse_tx_mem_res),
158 (void *)(rman_get_start(sc->atse_tx_mem_res) +
159 rman_get_size(sc->atse_tx_mem_res)));
161 sc->atse_txc_mem_rid = 4;
162 sc->atse_txc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
163 &sc->atse_txc_mem_rid, RF_ACTIVE);
164 if (sc->atse_txc_mem_res == NULL) {
165 device_printf(dev, "failed to map memory for TXC FIFO\n");
170 device_printf(sc->atse_dev, "TXC FIFO at mem %p-%p\n",
171 (void *)rman_get_start(sc->atse_txc_mem_res),
172 (void *)(rman_get_start(sc->atse_txc_mem_res) +
173 rman_get_size(sc->atse_txc_mem_res)));
175 /* (Optional) RX and TX IRQ. */
176 sc->atse_rx_irq_rid = 0;
177 sc->atse_rx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
178 &sc->atse_rx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
179 sc->atse_tx_irq_rid = 1;
180 sc->atse_tx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
181 &sc->atse_tx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
183 error = atse_attach(dev);
191 atse_detach_resources(dev);
196 static device_method_t atse_methods_fdt[] = {
197 /* Device interface */
198 DEVMETHOD(device_probe, atse_probe_fdt),
199 DEVMETHOD(device_attach, atse_attach_fdt),
200 DEVMETHOD(device_detach, atse_detach_dev),
203 DEVMETHOD(miibus_readreg, atse_miibus_readreg),
204 DEVMETHOD(miibus_writereg, atse_miibus_writereg),
205 DEVMETHOD(miibus_statchg, atse_miibus_statchg),
210 static driver_t atse_driver_fdt = {
213 sizeof(struct atse_softc)
216 DRIVER_MODULE(atse, simplebus, atse_driver_fdt, atse_devclass, 0, 0);
217 DRIVER_MODULE(miibus, atse, miibus_driver, miibus_devclass, 0, 0);