sys/dev/ata/ata-all.c

   1 /*-
   2  * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer,
  10  *    without modification, immediately at the beginning of the file.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 #include <sys/param.h>
  31 #include <sys/systm.h>
  32 #include <sys/ata.h>
  33 #include <sys/kernel.h>
  34 #include <sys/module.h>
  35 #include <sys/endian.h>
  36 #include <sys/ctype.h>
  37 #include <sys/conf.h>
  38 #include <sys/bus.h>
  39 #include <sys/bio.h>
  40 #include <sys/malloc.h>
  41 #include <sys/sysctl.h>
  42 #include <sys/sema.h>
  43 #include <sys/taskqueue.h>
  44 #include <vm/uma.h>
  45 #include <machine/stdarg.h>
  46 #include <machine/resource.h>
  47 #include <machine/bus.h>
  48 #include <sys/rman.h>
  49 #include <dev/ata/ata-all.h>
  50 #include <dev/pci/pcivar.h>
  51 #include <ata_if.h>
  52
  53 #include <cam/cam.h>
  54 #include <cam/cam_ccb.h>
  55 #include <cam/cam_sim.h>
  56 #include <cam/cam_xpt_sim.h>
  57 #include <cam/cam_debug.h>
  58
  59 /* prototypes */
  60 static void ataaction(struct cam_sim *sim, union ccb *ccb);
  61 static void atapoll(struct cam_sim *sim);
  62 static void ata_cam_begin_transaction(device_t dev, union ccb *ccb);
  63 static void ata_cam_end_transaction(device_t dev, struct ata_request *request);
  64 static void ata_cam_request_sense(device_t dev, struct ata_request *request);
  65 static int ata_check_ids(device_t dev, union ccb *ccb);
  66 static void ata_conn_event(void *context, int dummy);
  67 static void ata_interrupt_locked(void *data);
  68 static int ata_module_event_handler(module_t mod, int what, void *arg);
  69 static void ata_periodic_poll(void *data);
  70 static int ata_str2mode(const char *str);
  71
  72 /* global vars */
  73 MALLOC_DEFINE(M_ATA, "ata_generic", "ATA driver generic layer");
  74 int (*ata_raid_ioctl_func)(u_long cmd, caddr_t data) = NULL;
  75 devclass_t ata_devclass;
  76 int ata_dma_check_80pin = 1;
  77
  78 /* sysctl vars */
  79 static SYSCTL_NODE(_hw, OID_AUTO, ata, CTLFLAG_RD, 0, "ATA driver parameters");
  80 TUNABLE_INT("hw.ata.ata_dma_check_80pin", &ata_dma_check_80pin);
  81 SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma_check_80pin,
  82            CTLFLAG_RW, &ata_dma_check_80pin, 1,
  83            "Check for 80pin cable before setting ATA DMA mode");
  84 FEATURE(ata_cam, "ATA devices are accessed through the cam(4) driver");
  85
  86 /*
  87  * newbus device interface related functions
  88  */
  89 int
  90 ata_probe(device_t dev)
  91 {
  92     return (BUS_PROBE_LOW_PRIORITY);
  93 }
  94
  95 int
  96 ata_attach(device_t dev)
  97 {
  98     struct ata_channel *ch = device_get_softc(dev);
  99     int error, rid;
 100     struct cam_devq *devq;
 101     const char *res;
 102     char buf[64];
 103     int i, mode;
 104
 105     /* check that we have a virgin channel to attach */
 106     if (ch->r_irq)
 107         return EEXIST;
 108
 109     /* initialize the softc basics */
 110     ch->dev = dev;
 111     ch->state = ATA_IDLE;
 112     bzero(&ch->state_mtx, sizeof(struct mtx));
 113     mtx_init(&ch->state_mtx, "ATA state lock", NULL, MTX_DEF);
 114     TASK_INIT(&ch->conntask, 0, ata_conn_event, dev);
 115         for (i = 0; i < 16; i++) {
 116                 ch->user[i].revision = 0;
 117                 snprintf(buf, sizeof(buf), "dev%d.sata_rev", i);
 118                 if (resource_int_value(device_get_name(dev),
 119                     device_get_unit(dev), buf, &mode) != 0 &&
 120                     resource_int_value(device_get_name(dev),
 121                     device_get_unit(dev), "sata_rev", &mode) != 0)
 122                         mode = -1;
 123                 if (mode >= 0)
 124                         ch->user[i].revision = mode;
 125                 ch->user[i].mode = 0;
 126                 snprintf(buf, sizeof(buf), "dev%d.mode", i);
 127                 if (resource_string_value(device_get_name(dev),
 128                     device_get_unit(dev), buf, &res) == 0)
 129                         mode = ata_str2mode(res);
 130                 else if (resource_string_value(device_get_name(dev),
 131                     device_get_unit(dev), "mode", &res) == 0)
 132                         mode = ata_str2mode(res);
 133                 else
 134                         mode = -1;
 135                 if (mode >= 0)
 136                         ch->user[i].mode = mode;
 137                 if (ch->flags & ATA_SATA)
 138                         ch->user[i].bytecount = 8192;
 139                 else
 140                         ch->user[i].bytecount = MAXPHYS;
 141                 ch->user[i].caps = 0;
 142                 ch->curr[i] = ch->user[i];
 143                 if (ch->flags & ATA_SATA) {
 144                         if (ch->pm_level > 0)
 145                                 ch->user[i].caps |= CTS_SATA_CAPS_H_PMREQ;
 146                         if (ch->pm_level > 1)
 147                                 ch->user[i].caps |= CTS_SATA_CAPS_D_PMREQ;
 148                 } else {
 149                         if (!(ch->flags & ATA_NO_48BIT_DMA))
 150                                 ch->user[i].caps |= CTS_ATA_CAPS_H_DMA48;
 151                 }
 152         }
 153         callout_init(&ch->poll_callout, 1);
 154
 155     /* allocate DMA resources if DMA HW present*/
 156     if (ch->dma.alloc)
 157         ch->dma.alloc(dev);
 158
 159     /* setup interrupt delivery */
 160     rid = ATA_IRQ_RID;
 161     ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
 162                                        RF_SHAREABLE | RF_ACTIVE);
 163     if (!ch->r_irq) {
 164         device_printf(dev, "unable to allocate interrupt\n");
 165         return ENXIO;
 166     }
 167     if ((error = bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL,
 168                                 ata_interrupt, ch, &ch->ih))) {
 169         bus_release_resource(dev, SYS_RES_IRQ, rid, ch->r_irq);
 170         device_printf(dev, "unable to setup interrupt\n");
 171         return error;
 172     }
 173
 174         if (ch->flags & ATA_PERIODIC_POLL)
 175                 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
 176         mtx_lock(&ch->state_mtx);
 177         /* Create the device queue for our SIM. */
 178         devq = cam_simq_alloc(1);
 179         if (devq == NULL) {
 180                 device_printf(dev, "Unable to allocate simq\n");
 181                 error = ENOMEM;
 182                 goto err1;
 183         }
 184         /* Construct SIM entry */
 185         ch->sim = cam_sim_alloc(ataaction, atapoll, "ata", ch,
 186             device_get_unit(dev), &ch->state_mtx, 1, 0, devq);
 187         if (ch->sim == NULL) {
 188                 device_printf(dev, "unable to allocate sim\n");
 189                 cam_simq_free(devq);
 190                 error = ENOMEM;
 191                 goto err1;
 192         }
 193         if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) {
 194                 device_printf(dev, "unable to register xpt bus\n");
 195                 error = ENXIO;
 196                 goto err2;
 197         }
 198         if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim),
 199             CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
 200                 device_printf(dev, "unable to create path\n");
 201                 error = ENXIO;
 202                 goto err3;
 203         }
 204         mtx_unlock(&ch->state_mtx);
 205         return (0);
 206
 207 err3:
 208         xpt_bus_deregister(cam_sim_path(ch->sim));
 209 err2:
 210         cam_sim_free(ch->sim, /*free_devq*/TRUE);
 211         ch->sim = NULL;
 212 err1:
 213         bus_release_resource(dev, SYS_RES_IRQ, rid, ch->r_irq);
 214         mtx_unlock(&ch->state_mtx);
 215         if (ch->flags & ATA_PERIODIC_POLL)
 216                 callout_drain(&ch->poll_callout);
 217         return (error);
 218 }
 219
 220 int
 221 ata_detach(device_t dev)
 222 {
 223     struct ata_channel *ch = device_get_softc(dev);
 224
 225     /* check that we have a valid channel to detach */
 226     if (!ch->r_irq)
 227         return ENXIO;
 228
 229     /* grap the channel lock so no new requests gets launched */
 230     mtx_lock(&ch->state_mtx);
 231     ch->state |= ATA_STALL_QUEUE;
 232     mtx_unlock(&ch->state_mtx);
 233     if (ch->flags & ATA_PERIODIC_POLL)
 234         callout_drain(&ch->poll_callout);
 235
 236     taskqueue_drain(taskqueue_thread, &ch->conntask);
 237
 238         mtx_lock(&ch->state_mtx);
 239         xpt_async(AC_LOST_DEVICE, ch->path, NULL);
 240         xpt_free_path(ch->path);
 241         xpt_bus_deregister(cam_sim_path(ch->sim));
 242         cam_sim_free(ch->sim, /*free_devq*/TRUE);
 243         ch->sim = NULL;
 244         mtx_unlock(&ch->state_mtx);
 245
 246     /* release resources */
 247     bus_teardown_intr(dev, ch->r_irq, ch->ih);
 248     bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq);
 249     ch->r_irq = NULL;
 250
 251     /* free DMA resources if DMA HW present*/
 252     if (ch->dma.free)
 253         ch->dma.free(dev);
 254
 255     mtx_destroy(&ch->state_mtx);
 256     return 0;
 257 }
 258
 259 static void
 260 ata_conn_event(void *context, int dummy)
 261 {
 262         device_t dev = (device_t)context;
 263         struct ata_channel *ch = device_get_softc(dev);
 264         union ccb *ccb;
 265
 266         mtx_lock(&ch->state_mtx);
 267         if (ch->sim == NULL) {
 268                 mtx_unlock(&ch->state_mtx);
 269                 return;
 270         }
 271         ata_reinit(dev);
 272         if ((ccb = xpt_alloc_ccb_nowait()) == NULL)
 273                 return;
 274         if (xpt_create_path(&ccb->ccb_h.path, NULL,
 275             cam_sim_path(ch->sim),
 276             CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
 277                 xpt_free_ccb(ccb);
 278                 return;
 279         }
 280         xpt_rescan(ccb);
 281         mtx_unlock(&ch->state_mtx);
 282 }
 283
 284 int
 285 ata_reinit(device_t dev)
 286 {
 287     struct ata_channel *ch = device_get_softc(dev);
 288     struct ata_request *request;
 289
 290         xpt_freeze_simq(ch->sim, 1);
 291         if ((request = ch->running)) {
 292                 ch->running = NULL;
 293                 if (ch->state == ATA_ACTIVE)
 294                     ch->state = ATA_IDLE;
 295                 callout_stop(&request->callout);
 296                 if (ch->dma.unload)
 297                     ch->dma.unload(request);
 298                 request->result = ERESTART;
 299                 ata_cam_end_transaction(dev, request);
 300         }
 301         /* reset the controller HW, the channel and device(s) */
 302         ATA_RESET(dev);
 303         /* Tell the XPT about the event */
 304         xpt_async(AC_BUS_RESET, ch->path, NULL);
 305         xpt_release_simq(ch->sim, TRUE);
 306         return(0);
 307 }
 308
 309 int
 310 ata_suspend(device_t dev)
 311 {
 312     struct ata_channel *ch;
 313
 314     /* check for valid device */
 315     if (!dev || !(ch = device_get_softc(dev)))
 316         return ENXIO;
 317
 318         if (ch->flags & ATA_PERIODIC_POLL)
 319                 callout_drain(&ch->poll_callout);
 320         mtx_lock(&ch->state_mtx);
 321         xpt_freeze_simq(ch->sim, 1);
 322         while (ch->state != ATA_IDLE)
 323                 msleep(ch, &ch->state_mtx, PRIBIO, "atasusp", hz/100);
 324         mtx_unlock(&ch->state_mtx);
 325     return(0);
 326 }
 327
 328 int
 329 ata_resume(device_t dev)
 330 {
 331     struct ata_channel *ch;
 332     int error;
 333
 334     /* check for valid device */
 335     if (!dev || !(ch = device_get_softc(dev)))
 336         return ENXIO;
 337
 338         mtx_lock(&ch->state_mtx);
 339         error = ata_reinit(dev);
 340         xpt_release_simq(ch->sim, TRUE);
 341         mtx_unlock(&ch->state_mtx);
 342         if (ch->flags & ATA_PERIODIC_POLL)
 343                 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
 344     return error;
 345 }
 346
 347 void
 348 ata_interrupt(void *data)
 349 {
 350     struct ata_channel *ch = (struct ata_channel *)data;
 351
 352     mtx_lock(&ch->state_mtx);
 353     ata_interrupt_locked(data);
 354     mtx_unlock(&ch->state_mtx);
 355 }
 356
 357 static void
 358 ata_interrupt_locked(void *data)
 359 {
 360         struct ata_channel *ch = (struct ata_channel *)data;
 361         struct ata_request *request;
 362
 363         /* ignore interrupt if its not for us */
 364         if (ch->hw.status && !ch->hw.status(ch->dev))
 365                 return;
 366
 367         /* do we have a running request */
 368         if (!(request = ch->running))
 369                 return;
 370
 371         ATA_DEBUG_RQ(request, "interrupt");
 372
 373         /* safetycheck for the right state */
 374         if (ch->state == ATA_IDLE) {
 375                 device_printf(request->dev, "interrupt on idle channel ignored\n");
 376                 return;
 377         }
 378
 379         /*
 380          * we have the HW locks, so end the transaction for this request
 381          * if it finishes immediately otherwise wait for next interrupt
 382          */
 383         if (ch->hw.end_transaction(request) == ATA_OP_FINISHED) {
 384                 ch->running = NULL;
 385                 if (ch->state == ATA_ACTIVE)
 386                         ch->state = ATA_IDLE;
 387                 ata_cam_end_transaction(ch->dev, request);
 388                 return;
 389         }
 390 }
 391
 392 static void
 393 ata_periodic_poll(void *data)
 394 {
 395     struct ata_channel *ch = (struct ata_channel *)data;
 396
 397     callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
 398     ata_interrupt(ch);
 399 }
 400
 401 void
 402 ata_print_cable(device_t dev, u_int8_t *who)
 403 {
 404     device_printf(dev,
 405                   "DMA limited to UDMA33, %s found non-ATA66 cable\n", who);
 406 }
 407
 408 /*
 409  * misc support functions
 410  */
 411 void
 412 ata_default_registers(device_t dev)
 413 {
 414     struct ata_channel *ch = device_get_softc(dev);
 415
 416     /* fill in the defaults from whats setup already */
 417     ch->r_io[ATA_ERROR].res = ch->r_io[ATA_FEATURE].res;
 418     ch->r_io[ATA_ERROR].offset = ch->r_io[ATA_FEATURE].offset;
 419     ch->r_io[ATA_IREASON].res = ch->r_io[ATA_COUNT].res;
 420     ch->r_io[ATA_IREASON].offset = ch->r_io[ATA_COUNT].offset;
 421     ch->r_io[ATA_STATUS].res = ch->r_io[ATA_COMMAND].res;
 422     ch->r_io[ATA_STATUS].offset = ch->r_io[ATA_COMMAND].offset;
 423     ch->r_io[ATA_ALTSTAT].res = ch->r_io[ATA_CONTROL].res;
 424     ch->r_io[ATA_ALTSTAT].offset = ch->r_io[ATA_CONTROL].offset;
 425 }
 426
 427 void
 428 ata_udelay(int interval)
 429 {
 430     /* for now just use DELAY, the timer/sleep subsytems are not there yet */
 431     if (1 || interval < (1000000/hz) || ata_delayed_attach)
 432         DELAY(interval);
 433     else
 434         pause("ataslp", interval/(1000000/hz));
 435 }
 436
 437 const char *
 438 ata_cmd2str(struct ata_request *request)
 439 {
 440         static char buffer[20];
 441
 442         if (request->flags & ATA_R_ATAPI) {
 443                 switch (request->u.atapi.sense.key ?
 444                     request->u.atapi.saved_cmd : request->u.atapi.ccb[0]) {
 445                 case 0x00: return ("TEST_UNIT_READY");
 446                 case 0x01: return ("REZERO");
 447                 case 0x03: return ("REQUEST_SENSE");
 448                 case 0x04: return ("FORMAT");
 449                 case 0x08: return ("READ");
 450                 case 0x0a: return ("WRITE");
 451                 case 0x10: return ("WEOF");
 452                 case 0x11: return ("SPACE");
 453                 case 0x12: return ("INQUIRY");
 454                 case 0x15: return ("MODE_SELECT");
 455                 case 0x19: return ("ERASE");
 456                 case 0x1a: return ("MODE_SENSE");
 457                 case 0x1b: return ("START_STOP");
 458                 case 0x1e: return ("PREVENT_ALLOW");
 459                 case 0x23: return ("ATAPI_READ_FORMAT_CAPACITIES");
 460                 case 0x25: return ("READ_CAPACITY");
 461                 case 0x28: return ("READ_BIG");
 462                 case 0x2a: return ("WRITE_BIG");
 463                 case 0x2b: return ("LOCATE");
 464                 case 0x34: return ("READ_POSITION");
 465                 case 0x35: return ("SYNCHRONIZE_CACHE");
 466                 case 0x3b: return ("WRITE_BUFFER");
 467                 case 0x3c: return ("READ_BUFFER");
 468                 case 0x42: return ("READ_SUBCHANNEL");
 469                 case 0x43: return ("READ_TOC");
 470                 case 0x45: return ("PLAY_10");
 471                 case 0x47: return ("PLAY_MSF");
 472                 case 0x48: return ("PLAY_TRACK");
 473                 case 0x4b: return ("PAUSE");
 474                 case 0x51: return ("READ_DISK_INFO");
 475                 case 0x52: return ("READ_TRACK_INFO");
 476                 case 0x53: return ("RESERVE_TRACK");
 477                 case 0x54: return ("SEND_OPC_INFO");
 478                 case 0x55: return ("MODE_SELECT_BIG");
 479                 case 0x58: return ("REPAIR_TRACK");
 480                 case 0x59: return ("READ_MASTER_CUE");
 481                 case 0x5a: return ("MODE_SENSE_BIG");
 482                 case 0x5b: return ("CLOSE_TRACK/SESSION");
 483                 case 0x5c: return ("READ_BUFFER_CAPACITY");
 484                 case 0x5d: return ("SEND_CUE_SHEET");
 485                 case 0x96: return ("SERVICE_ACTION_IN");
 486                 case 0xa1: return ("BLANK_CMD");
 487                 case 0xa3: return ("SEND_KEY");
 488                 case 0xa4: return ("REPORT_KEY");
 489                 case 0xa5: return ("PLAY_12");
 490                 case 0xa6: return ("LOAD_UNLOAD");
 491                 case 0xad: return ("READ_DVD_STRUCTURE");
 492                 case 0xb4: return ("PLAY_CD");
 493                 case 0xbb: return ("SET_SPEED");
 494                 case 0xbd: return ("MECH_STATUS");
 495                 case 0xbe: return ("READ_CD");
 496                 case 0xff: return ("POLL_DSC");
 497                 }
 498         } else {
 499                 switch (request->u.ata.command) {
 500                 case 0x00: return ("NOP");
 501                 case 0x08: return ("DEVICE_RESET");
 502                 case 0x20: return ("READ");
 503                 case 0x24: return ("READ48");
 504                 case 0x25: return ("READ_DMA48");
 505                 case 0x26: return ("READ_DMA_QUEUED48");
 506                 case 0x27: return ("READ_NATIVE_MAX_ADDRESS48");
 507                 case 0x29: return ("READ_MUL48");
 508                 case 0x30: return ("WRITE");
 509                 case 0x34: return ("WRITE48");
 510                 case 0x35: return ("WRITE_DMA48");
 511                 case 0x36: return ("WRITE_DMA_QUEUED48");
 512                 case 0x37: return ("SET_MAX_ADDRESS48");
 513                 case 0x39: return ("WRITE_MUL48");
 514                 case 0x70: return ("SEEK");
 515                 case 0xa0: return ("PACKET_CMD");
 516                 case 0xa1: return ("ATAPI_IDENTIFY");
 517                 case 0xa2: return ("SERVICE");
 518                 case 0xb0: return ("SMART");
 519                 case 0xc0: return ("CFA ERASE");
 520                 case 0xc4: return ("READ_MUL");
 521                 case 0xc5: return ("WRITE_MUL");
 522                 case 0xc6: return ("SET_MULTI");
 523                 case 0xc7: return ("READ_DMA_QUEUED");
 524                 case 0xc8: return ("READ_DMA");
 525                 case 0xca: return ("WRITE_DMA");
 526                 case 0xcc: return ("WRITE_DMA_QUEUED");
 527                 case 0xe6: return ("SLEEP");
 528                 case 0xe7: return ("FLUSHCACHE");
 529                 case 0xea: return ("FLUSHCACHE48");
 530                 case 0xec: return ("ATA_IDENTIFY");
 531                 case 0xef:
 532                         switch (request->u.ata.feature) {
 533                         case 0x03: return ("SETFEATURES SET TRANSFER MODE");
 534                         case 0x02: return ("SETFEATURES ENABLE WCACHE");
 535                         case 0x82: return ("SETFEATURES DISABLE WCACHE");
 536                         case 0xaa: return ("SETFEATURES ENABLE RCACHE");
 537                         case 0x55: return ("SETFEATURES DISABLE RCACHE");
 538                         }
 539                         sprintf(buffer, "SETFEATURES 0x%02x",
 540                             request->u.ata.feature);
 541                         return (buffer);
 542                 case 0xf5: return ("SECURITY_FREE_LOCK");
 543                 case 0xf8: return ("READ_NATIVE_MAX_ADDRESS");
 544                 case 0xf9: return ("SET_MAX_ADDRESS");
 545                 }
 546         }
 547         sprintf(buffer, "unknown CMD (0x%02x)", request->u.ata.command);
 548         return (buffer);
 549 }
 550
 551 const char *
 552 ata_mode2str(int mode)
 553 {
 554     switch (mode) {
 555     case -1: return "UNSUPPORTED";
 556     case ATA_PIO0: return "PIO0";
 557     case ATA_PIO1: return "PIO1";
 558     case ATA_PIO2: return "PIO2";
 559     case ATA_PIO3: return "PIO3";
 560     case ATA_PIO4: return "PIO4";
 561     case ATA_WDMA0: return "WDMA0";
 562     case ATA_WDMA1: return "WDMA1";
 563     case ATA_WDMA2: return "WDMA2";
 564     case ATA_UDMA0: return "UDMA16";
 565     case ATA_UDMA1: return "UDMA25";
 566     case ATA_UDMA2: return "UDMA33";
 567     case ATA_UDMA3: return "UDMA40";
 568     case ATA_UDMA4: return "UDMA66";
 569     case ATA_UDMA5: return "UDMA100";
 570     case ATA_UDMA6: return "UDMA133";
 571     case ATA_SA150: return "SATA150";
 572     case ATA_SA300: return "SATA300";
 573     case ATA_SA600: return "SATA600";
 574     default:
 575         if (mode & ATA_DMA_MASK)
 576             return "BIOSDMA";
 577         else
 578             return "BIOSPIO";
 579     }
 580 }
 581
 582 static int
 583 ata_str2mode(const char *str)
 584 {
 585
 586         if (!strcasecmp(str, "PIO0")) return (ATA_PIO0);
 587         if (!strcasecmp(str, "PIO1")) return (ATA_PIO1);
 588         if (!strcasecmp(str, "PIO2")) return (ATA_PIO2);
 589         if (!strcasecmp(str, "PIO3")) return (ATA_PIO3);
 590         if (!strcasecmp(str, "PIO4")) return (ATA_PIO4);
 591         if (!strcasecmp(str, "WDMA0")) return (ATA_WDMA0);
 592         if (!strcasecmp(str, "WDMA1")) return (ATA_WDMA1);
 593         if (!strcasecmp(str, "WDMA2")) return (ATA_WDMA2);
 594         if (!strcasecmp(str, "UDMA0")) return (ATA_UDMA0);
 595         if (!strcasecmp(str, "UDMA16")) return (ATA_UDMA0);
 596         if (!strcasecmp(str, "UDMA1")) return (ATA_UDMA1);
 597         if (!strcasecmp(str, "UDMA25")) return (ATA_UDMA1);
 598         if (!strcasecmp(str, "UDMA2")) return (ATA_UDMA2);
 599         if (!strcasecmp(str, "UDMA33")) return (ATA_UDMA2);
 600         if (!strcasecmp(str, "UDMA3")) return (ATA_UDMA3);
 601         if (!strcasecmp(str, "UDMA44")) return (ATA_UDMA3);
 602         if (!strcasecmp(str, "UDMA4")) return (ATA_UDMA4);
 603         if (!strcasecmp(str, "UDMA66")) return (ATA_UDMA4);
 604         if (!strcasecmp(str, "UDMA5")) return (ATA_UDMA5);
 605         if (!strcasecmp(str, "UDMA100")) return (ATA_UDMA5);
 606         if (!strcasecmp(str, "UDMA6")) return (ATA_UDMA6);
 607         if (!strcasecmp(str, "UDMA133")) return (ATA_UDMA6);
 608         return (-1);
 609 }
 610
 611 int
 612 ata_atapi(device_t dev, int target)
 613 {
 614     struct ata_channel *ch = device_get_softc(dev);
 615
 616     return (ch->devices & (ATA_ATAPI_MASTER << target));
 617 }
 618
 619 void
 620 ata_timeout(struct ata_request *request)
 621 {
 622         struct ata_channel *ch;
 623
 624         ch = device_get_softc(request->parent);
 625         //request->flags |= ATA_R_DEBUG;
 626         ATA_DEBUG_RQ(request, "timeout");
 627
 628         /*
 629          * If we have an ATA_ACTIVE request running, we flag the request
 630          * ATA_R_TIMEOUT so ata_cam_end_transaction() will handle it correctly.
 631          * Also, NULL out the running request so we wont loose the race with
 632          * an eventual interrupt arriving late.
 633          */
 634         if (ch->state == ATA_ACTIVE) {
 635                 request->flags |= ATA_R_TIMEOUT;
 636                 if (ch->dma.unload)
 637                         ch->dma.unload(request);
 638                 ch->running = NULL;
 639                 ch->state = ATA_IDLE;
 640                 ata_cam_end_transaction(ch->dev, request);
 641         }
 642         mtx_unlock(&ch->state_mtx);
 643 }
 644
 645 static void
 646 ata_cam_begin_transaction(device_t dev, union ccb *ccb)
 647 {
 648         struct ata_channel *ch = device_get_softc(dev);
 649         struct ata_request *request;
 650
 651         request = &ch->request;
 652         bzero(request, sizeof(*request));
 653
 654         /* setup request */
 655         request->dev = NULL;
 656         request->parent = dev;
 657         request->unit = ccb->ccb_h.target_id;
 658         if (ccb->ccb_h.func_code == XPT_ATA_IO) {
 659                 request->data = ccb->ataio.data_ptr;
 660                 request->bytecount = ccb->ataio.dxfer_len;
 661                 request->u.ata.command = ccb->ataio.cmd.command;
 662                 request->u.ata.feature = ((uint16_t)ccb->ataio.cmd.features_exp << 8) |
 663                                           (uint16_t)ccb->ataio.cmd.features;
 664                 request->u.ata.count = ((uint16_t)ccb->ataio.cmd.sector_count_exp << 8) |
 665                                         (uint16_t)ccb->ataio.cmd.sector_count;
 666                 if (ccb->ataio.cmd.flags & CAM_ATAIO_48BIT) {
 667                         request->flags |= ATA_R_48BIT;
 668                         request->u.ata.lba =
 669                                      ((uint64_t)ccb->ataio.cmd.lba_high_exp << 40) |
 670                                      ((uint64_t)ccb->ataio.cmd.lba_mid_exp << 32) |
 671                                      ((uint64_t)ccb->ataio.cmd.lba_low_exp << 24);
 672                 } else {
 673                         request->u.ata.lba =
 674                                      ((uint64_t)(ccb->ataio.cmd.device & 0x0f) << 24);
 675                 }
 676                 request->u.ata.lba |= ((uint64_t)ccb->ataio.cmd.lba_high << 16) |
 677                                       ((uint64_t)ccb->ataio.cmd.lba_mid << 8) |
 678                                        (uint64_t)ccb->ataio.cmd.lba_low;
 679                 if (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)
 680                         request->flags |= ATA_R_NEEDRESULT;
 681                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE &&
 682                     ccb->ataio.cmd.flags & CAM_ATAIO_DMA)
 683                         request->flags |= ATA_R_DMA;
 684                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
 685                         request->flags |= ATA_R_READ;
 686                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
 687                         request->flags |= ATA_R_WRITE;
 688                 if (ccb->ataio.cmd.command == ATA_READ_MUL ||
 689                     ccb->ataio.cmd.command == ATA_READ_MUL48 ||
 690                     ccb->ataio.cmd.command == ATA_WRITE_MUL ||
 691                     ccb->ataio.cmd.command == ATA_WRITE_MUL48) {
 692                         request->transfersize = min(request->bytecount,
 693                             ch->curr[ccb->ccb_h.target_id].bytecount);
 694                 } else
 695                         request->transfersize = min(request->bytecount, 512);
 696         } else {
 697                 request->data = ccb->csio.data_ptr;
 698                 request->bytecount = ccb->csio.dxfer_len;
 699                 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
 700                     ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes,
 701                     request->u.atapi.ccb, ccb->csio.cdb_len);
 702                 request->flags |= ATA_R_ATAPI;
 703                 if (ch->curr[ccb->ccb_h.target_id].atapi == 16)
 704                         request->flags |= ATA_R_ATAPI16;
 705                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE &&
 706                     ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA)
 707                         request->flags |= ATA_R_DMA;
 708                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
 709                         request->flags |= ATA_R_READ;
 710                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
 711                         request->flags |= ATA_R_WRITE;
 712                 request->transfersize = min(request->bytecount,
 713                     ch->curr[ccb->ccb_h.target_id].bytecount);
 714         }
 715         request->retries = 0;
 716         request->timeout = (ccb->ccb_h.timeout + 999) / 1000;
 717         callout_init_mtx(&request->callout, &ch->state_mtx, CALLOUT_RETURNUNLOCKED);
 718         request->ccb = ccb;
 719         request->flags |= ATA_R_DATA_IN_CCB;
 720
 721         ch->running = request;
 722         ch->state = ATA_ACTIVE;
 723         if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) {
 724             ch->running = NULL;
 725             ch->state = ATA_IDLE;
 726             ata_cam_end_transaction(dev, request);
 727             return;
 728         }
 729 }
 730
 731 static void
 732 ata_cam_request_sense(device_t dev, struct ata_request *request)
 733 {
 734         struct ata_channel *ch = device_get_softc(dev);
 735         union ccb *ccb = request->ccb;
 736
 737         ch->requestsense = 1;
 738
 739         bzero(request, sizeof(*request));
 740         request->dev = NULL;
 741         request->parent = dev;
 742         request->unit = ccb->ccb_h.target_id;
 743         request->data = (void *)&ccb->csio.sense_data;
 744         request->bytecount = ccb->csio.sense_len;
 745         request->u.atapi.ccb[0] = ATAPI_REQUEST_SENSE;
 746         request->u.atapi.ccb[4] = ccb->csio.sense_len;
 747         request->flags |= ATA_R_ATAPI;
 748         if (ch->curr[ccb->ccb_h.target_id].atapi == 16)
 749                 request->flags |= ATA_R_ATAPI16;
 750         if (ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA)
 751                 request->flags |= ATA_R_DMA;
 752         request->flags |= ATA_R_READ;
 753         request->transfersize = min(request->bytecount,
 754             ch->curr[ccb->ccb_h.target_id].bytecount);
 755         request->retries = 0;
 756         request->timeout = (ccb->ccb_h.timeout + 999) / 1000;
 757         callout_init_mtx(&request->callout, &ch->state_mtx, CALLOUT_RETURNUNLOCKED);
 758         request->ccb = ccb;
 759
 760         ch->running = request;
 761         ch->state = ATA_ACTIVE;
 762         if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) {
 763                 ch->running = NULL;
 764                 ch->state = ATA_IDLE;
 765                 ata_cam_end_transaction(dev, request);
 766                 return;
 767         }
 768 }
 769
 770 static void
 771 ata_cam_process_sense(device_t dev, struct ata_request *request)
 772 {
 773         struct ata_channel *ch = device_get_softc(dev);
 774         union ccb *ccb = request->ccb;
 775         int fatalerr = 0;
 776
 777         ch->requestsense = 0;
 778
 779         if (request->flags & ATA_R_TIMEOUT)
 780                 fatalerr = 1;
 781         if ((request->flags & ATA_R_TIMEOUT) == 0 &&
 782             (request->status & ATA_S_ERROR) == 0 &&
 783             request->result == 0) {
 784                 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
 785         } else {
 786                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 787                 ccb->ccb_h.status |= CAM_AUTOSENSE_FAIL;
 788         }
 789
 790         xpt_done(ccb);
 791         /* Do error recovery if needed. */
 792         if (fatalerr)
 793                 ata_reinit(dev);
 794 }
 795
 796 static void
 797 ata_cam_end_transaction(device_t dev, struct ata_request *request)
 798 {
 799         struct ata_channel *ch = device_get_softc(dev);
 800         union ccb *ccb = request->ccb;
 801         int fatalerr = 0;
 802
 803         if (ch->requestsense) {
 804                 ata_cam_process_sense(dev, request);
 805                 return;
 806         }
 807
 808         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 809         if (request->flags & ATA_R_TIMEOUT) {
 810                 xpt_freeze_simq(ch->sim, 1);
 811                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 812                 ccb->ccb_h.status |= CAM_CMD_TIMEOUT | CAM_RELEASE_SIMQ;
 813                 fatalerr = 1;
 814         } else if (request->status & ATA_S_ERROR) {
 815                 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
 816                         ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR;
 817                 } else {
 818                         ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
 819                         ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
 820                 }
 821         } else if (request->result == ERESTART)
 822                 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
 823         else if (request->result != 0)
 824                 ccb->ccb_h.status |= CAM_REQ_CMP_ERR;
 825         else
 826                 ccb->ccb_h.status |= CAM_REQ_CMP;
 827         if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP &&
 828             !(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
 829                 xpt_freeze_devq(ccb->ccb_h.path, 1);
 830                 ccb->ccb_h.status |= CAM_DEV_QFRZN;
 831         }
 832         if (ccb->ccb_h.func_code == XPT_ATA_IO &&
 833             ((request->status & ATA_S_ERROR) ||
 834             (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT))) {
 835                 struct ata_res *res = &ccb->ataio.res;
 836                 res->status = request->status;
 837                 res->error = request->error;
 838                 res->lba_low = request->u.ata.lba;
 839                 res->lba_mid = request->u.ata.lba >> 8;
 840                 res->lba_high = request->u.ata.lba >> 16;
 841                 res->device = request->u.ata.lba >> 24;
 842                 res->lba_low_exp = request->u.ata.lba >> 24;
 843                 res->lba_mid_exp = request->u.ata.lba >> 32;
 844                 res->lba_high_exp = request->u.ata.lba >> 40;
 845                 res->sector_count = request->u.ata.count;
 846                 res->sector_count_exp = request->u.ata.count >> 8;
 847         }
 848         if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
 849                 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
 850                         ccb->ataio.resid =
 851                             ccb->ataio.dxfer_len - request->donecount;
 852                 } else {
 853                         ccb->csio.resid =
 854                             ccb->csio.dxfer_len - request->donecount;
 855                 }
 856         }
 857         if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR &&
 858             (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)
 859                 ata_cam_request_sense(dev, request);
 860         else
 861                 xpt_done(ccb);
 862         /* Do error recovery if needed. */
 863         if (fatalerr)
 864                 ata_reinit(dev);
 865 }
 866
 867 static int
 868 ata_check_ids(device_t dev, union ccb *ccb)
 869 {
 870         struct ata_channel *ch = device_get_softc(dev);
 871
 872         if (ccb->ccb_h.target_id > ((ch->flags & ATA_NO_SLAVE) ? 0 : 1)) {
 873                 ccb->ccb_h.status = CAM_TID_INVALID;
 874                 xpt_done(ccb);
 875                 return (-1);
 876         }
 877         if (ccb->ccb_h.target_lun != 0) {
 878                 ccb->ccb_h.status = CAM_LUN_INVALID;
 879                 xpt_done(ccb);
 880                 return (-1);
 881         }
 882         return (0);
 883 }
 884
 885 static void
 886 ataaction(struct cam_sim *sim, union ccb *ccb)
 887 {
 888         device_t dev, parent;
 889         struct ata_channel *ch;
 890
 891         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ataaction func_code=%x\n",
 892             ccb->ccb_h.func_code));
 893
 894         ch = (struct ata_channel *)cam_sim_softc(sim);
 895         dev = ch->dev;
 896         switch (ccb->ccb_h.func_code) {
 897         /* Common cases first */
 898         case XPT_ATA_IO:        /* Execute the requested I/O operation */
 899         case XPT_SCSI_IO:
 900                 if (ata_check_ids(dev, ccb))
 901                         return;
 902                 if ((ch->devices & ((ATA_ATA_MASTER | ATA_ATAPI_MASTER)
 903                     << ccb->ccb_h.target_id)) == 0) {
 904                         ccb->ccb_h.status = CAM_SEL_TIMEOUT;
 905                         break;
 906                 }
 907                 if (ch->running)
 908                         device_printf(dev, "already running!\n");
 909                 if (ccb->ccb_h.func_code == XPT_ATA_IO &&
 910                     (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) &&
 911                     (ccb->ataio.cmd.control & ATA_A_RESET)) {
 912                         struct ata_res *res = &ccb->ataio.res;
 913
 914                         bzero(res, sizeof(*res));
 915                         if (ch->devices & (ATA_ATA_MASTER << ccb->ccb_h.target_id)) {
 916                                 res->lba_high = 0;
 917                                 res->lba_mid = 0;
 918                         } else {
 919                                 res->lba_high = 0xeb;
 920                                 res->lba_mid = 0x14;
 921                         }
 922                         ccb->ccb_h.status = CAM_REQ_CMP;
 923                         break;
 924                 }
 925                 ata_cam_begin_transaction(dev, ccb);
 926                 return;
 927         case XPT_EN_LUN:                /* Enable LUN as a target */
 928         case XPT_TARGET_IO:             /* Execute target I/O request */
 929         case XPT_ACCEPT_TARGET_IO:      /* Accept Host Target Mode CDB */
 930         case XPT_CONT_TARGET_IO:        /* Continue Host Target I/O Connection*/
 931         case XPT_ABORT:                 /* Abort the specified CCB */
 932                 /* XXX Implement */
 933                 ccb->ccb_h.status = CAM_REQ_INVALID;
 934                 break;
 935         case XPT_SET_TRAN_SETTINGS:
 936         {
 937                 struct  ccb_trans_settings *cts = &ccb->cts;
 938                 struct  ata_cam_device *d;
 939
 940                 if (ata_check_ids(dev, ccb))
 941                         return;
 942                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
 943                         d = &ch->curr[ccb->ccb_h.target_id];
 944                 else
 945                         d = &ch->user[ccb->ccb_h.target_id];
 946                 if (ch->flags & ATA_SATA) {
 947                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION)
 948                                 d->revision = cts->xport_specific.sata.revision;
 949                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) {
 950                                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
 951                                         d->mode = ATA_SETMODE(ch->dev,
 952                                             ccb->ccb_h.target_id,
 953                                             cts->xport_specific.sata.mode);
 954                                 } else
 955                                         d->mode = cts->xport_specific.sata.mode;
 956                         }
 957                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT)
 958                                 d->bytecount = min(8192, cts->xport_specific.sata.bytecount);
 959                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI)
 960                                 d->atapi = cts->xport_specific.sata.atapi;
 961                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS)
 962                                 d->caps = cts->xport_specific.sata.caps;
 963                 } else {
 964                         if (cts->xport_specific.ata.valid & CTS_ATA_VALID_MODE) {
 965                                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
 966                                         d->mode = ATA_SETMODE(ch->dev,
 967                                             ccb->ccb_h.target_id,
 968                                             cts->xport_specific.ata.mode);
 969                                 } else
 970                                         d->mode = cts->xport_specific.ata.mode;
 971                         }
 972                         if (cts->xport_specific.ata.valid & CTS_ATA_VALID_BYTECOUNT)
 973                                 d->bytecount = cts->xport_specific.ata.bytecount;
 974                         if (cts->xport_specific.ata.valid & CTS_ATA_VALID_ATAPI)
 975                                 d->atapi = cts->xport_specific.ata.atapi;
 976                         if (cts->xport_specific.ata.valid & CTS_ATA_VALID_CAPS)
 977                                 d->caps = cts->xport_specific.ata.caps;
 978                 }
 979                 ccb->ccb_h.status = CAM_REQ_CMP;
 980                 break;
 981         }
 982         case XPT_GET_TRAN_SETTINGS:
 983         {
 984                 struct  ccb_trans_settings *cts = &ccb->cts;
 985                 struct  ata_cam_device *d;
 986
 987                 if (ata_check_ids(dev, ccb))
 988                         return;
 989                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
 990                         d = &ch->curr[ccb->ccb_h.target_id];
 991                 else
 992                         d = &ch->user[ccb->ccb_h.target_id];
 993                 cts->protocol = PROTO_UNSPECIFIED;
 994                 cts->protocol_version = PROTO_VERSION_UNSPECIFIED;
 995                 if (ch->flags & ATA_SATA) {
 996                         cts->transport = XPORT_SATA;
 997                         cts->transport_version = XPORT_VERSION_UNSPECIFIED;
 998                         cts->xport_specific.sata.valid = 0;
 999                         cts->xport_specific.sata.mode = d->mode;
1000                         cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE;
1001                         cts->xport_specific.sata.bytecount = d->bytecount;
1002                         cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT;
1003                         if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1004                                 cts->xport_specific.sata.revision =
1005                                     ATA_GETREV(dev, ccb->ccb_h.target_id);
1006                                 if (cts->xport_specific.sata.revision != 0xff) {
1007                                         cts->xport_specific.sata.valid |=
1008                                             CTS_SATA_VALID_REVISION;
1009                                 }
1010                                 cts->xport_specific.sata.caps =
1011                                     d->caps & CTS_SATA_CAPS_D;
1012                                 if (ch->pm_level) {
1013                                         cts->xport_specific.sata.caps |=
1014                                             CTS_SATA_CAPS_H_PMREQ;
1015                                 }
1016                                 cts->xport_specific.sata.caps &=
1017                                     ch->user[ccb->ccb_h.target_id].caps;
1018                         } else {
1019                                 cts->xport_specific.sata.revision = d->revision;
1020                                 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION;
1021                                 cts->xport_specific.sata.caps = d->caps;
1022                         }
1023                         cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS;
1024                         cts->xport_specific.sata.atapi = d->atapi;
1025                         cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI;
1026                 } else {
1027                         cts->transport = XPORT_ATA;
1028                         cts->transport_version = XPORT_VERSION_UNSPECIFIED;
1029                         cts->xport_specific.ata.valid = 0;
1030                         cts->xport_specific.ata.mode = d->mode;
1031                         cts->xport_specific.ata.valid |= CTS_ATA_VALID_MODE;
1032                         cts->xport_specific.ata.bytecount = d->bytecount;
1033                         cts->xport_specific.ata.valid |= CTS_ATA_VALID_BYTECOUNT;
1034                         if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1035                                 cts->xport_specific.ata.caps =
1036                                     d->caps & CTS_ATA_CAPS_D;
1037                                 if (!(ch->flags & ATA_NO_48BIT_DMA))
1038                                         cts->xport_specific.ata.caps |=
1039                                             CTS_ATA_CAPS_H_DMA48;
1040                                 cts->xport_specific.ata.caps &=
1041                                     ch->user[ccb->ccb_h.target_id].caps;
1042                         } else
1043                                 cts->xport_specific.ata.caps = d->caps;
1044                         cts->xport_specific.ata.valid |= CTS_ATA_VALID_CAPS;
1045                         cts->xport_specific.ata.atapi = d->atapi;
1046                         cts->xport_specific.ata.valid |= CTS_ATA_VALID_ATAPI;
1047                 }
1048                 ccb->ccb_h.status = CAM_REQ_CMP;
1049                 break;
1050         }
1051         case XPT_RESET_BUS:             /* Reset the specified SCSI bus */
1052         case XPT_RESET_DEV:     /* Bus Device Reset the specified SCSI device */
1053                 ata_reinit(dev);
1054                 ccb->ccb_h.status = CAM_REQ_CMP;
1055                 break;
1056         case XPT_TERM_IO:               /* Terminate the I/O process */
1057                 /* XXX Implement */
1058                 ccb->ccb_h.status = CAM_REQ_INVALID;
1059                 break;
1060         case XPT_PATH_INQ:              /* Path routing inquiry */
1061         {
1062                 struct ccb_pathinq *cpi = &ccb->cpi;
1063
1064                 parent = device_get_parent(dev);
1065                 cpi->version_num = 1; /* XXX??? */
1066                 cpi->hba_inquiry = PI_SDTR_ABLE;
1067                 cpi->target_sprt = 0;
1068                 cpi->hba_misc = PIM_SEQSCAN;
1069                 cpi->hba_eng_cnt = 0;
1070                 if (ch->flags & ATA_NO_SLAVE)
1071                         cpi->max_target = 0;
1072                 else
1073                         cpi->max_target = 1;
1074                 cpi->max_lun = 0;
1075                 cpi->initiator_id = 0;
1076                 cpi->bus_id = cam_sim_bus(sim);
1077                 if (ch->flags & ATA_SATA)
1078                         cpi->base_transfer_speed = 150000;
1079                 else
1080                         cpi->base_transfer_speed = 3300;
1081                 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1082                 strncpy(cpi->hba_vid, "ATA", HBA_IDLEN);
1083                 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1084                 cpi->unit_number = cam_sim_unit(sim);
1085                 if (ch->flags & ATA_SATA)
1086                         cpi->transport = XPORT_SATA;
1087                 else
1088                         cpi->transport = XPORT_ATA;
1089                 cpi->transport_version = XPORT_VERSION_UNSPECIFIED;
1090                 cpi->protocol = PROTO_ATA;
1091                 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED;
1092                 cpi->maxio = ch->dma.max_iosize ? ch->dma.max_iosize : DFLTPHYS;
1093                 if (device_get_devclass(device_get_parent(parent)) ==
1094                     devclass_find("pci")) {
1095                         cpi->hba_vendor = pci_get_vendor(parent);
1096                         cpi->hba_device = pci_get_device(parent);
1097                         cpi->hba_subvendor = pci_get_subvendor(parent);
1098                         cpi->hba_subdevice = pci_get_subdevice(parent);
1099                 }
1100                 cpi->ccb_h.status = CAM_REQ_CMP;
1101                 break;
1102         }
1103         default:
1104                 ccb->ccb_h.status = CAM_REQ_INVALID;
1105                 break;
1106         }
1107         xpt_done(ccb);
1108 }
1109
1110 static void
1111 atapoll(struct cam_sim *sim)
1112 {
1113         struct ata_channel *ch = (struct ata_channel *)cam_sim_softc(sim);
1114
1115         ata_interrupt_locked(ch);
1116 }
1117
1118 /*
1119  * module handeling
1120  */
1121 static int
1122 ata_module_event_handler(module_t mod, int what, void *arg)
1123 {
1124
1125     switch (what) {
1126     case MOD_LOAD:
1127         return 0;
1128
1129     case MOD_UNLOAD:
1130         return 0;
1131
1132     default:
1133         return EOPNOTSUPP;
1134     }
1135 }
1136
1137 static moduledata_t ata_moduledata = { "ata", ata_module_event_handler, NULL };
1138 DECLARE_MODULE(ata, ata_moduledata, SI_SUB_CONFIGURE, SI_ORDER_SECOND);
1139 MODULE_VERSION(ata, 1);
1140 MODULE_DEPEND(ata, cam, 1, 1, 1);