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3 * Copyright (c) 2013-2015 Avago Technologies
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30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
36 * Copyright (c) 2000-2015 LSI Corporation.
37 * Copyright (c) 2013-2015 Avago Technologies
41 * Title: MPI SCSI initiator mode messages and structures
42 * Creation Date: June 23, 2006
44 * mpi2_init.h Version: 02.00.15
46 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
47 * prefix are for use only on MPI v2.5 products, and must not be used
48 * with MPI v2.0 products. Unless otherwise noted, names beginning with
49 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
54 * Date Version Description
55 * -------- -------- ------------------------------------------------------
56 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
57 * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
58 * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
59 * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
60 * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
61 * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
62 * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
63 * Control field Task Attribute flags.
64 * Moved LUN field defines to mpi2.h becasue they are
65 * common to many structures.
66 * 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
67 * Query Asynchronous Event.
68 * Defined two new bits in the SlotStatus field of the SCSI
69 * Enclosure Processor Request and Reply.
70 * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
71 * both SCSI IO Error Reply and SCSI Task Management Reply.
72 * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
73 * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
74 * 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it.
75 * 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request.
76 * 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
77 * 11-18-11 02.00.12 Incorporating additions for MPI v2.5.
78 * 02-06-12 02.00.13 Added alternate defines for Task Priority / Command
79 * Priority to match SAM-4.
80 * Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY.
81 * 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
82 * 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY,
83 * replacing the Reserved4 field.
84 * --------------------------------------------------------------------------
90 /*****************************************************************************
92 * SCSI Initiator Messages
94 *****************************************************************************/
96 /****************************************************************************
97 * SCSI IO messages and associated structures
98 ****************************************************************************/
100 typedef struct _MPI2_SCSI_IO_CDB_EEDP32
102 U8 CDB[20]; /* 0x00 */
103 U32 PrimaryReferenceTag; /* 0x14 */
104 U16 PrimaryApplicationTag; /* 0x18 */
105 U16 PrimaryApplicationTagMask; /* 0x1A */
106 U32 TransferLength; /* 0x1C */
107 } MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32,
108 Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t;
110 /* MPI v2.0 CDB field */
111 typedef union _MPI2_SCSI_IO_CDB_UNION
114 MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
115 MPI2_SGE_SIMPLE_UNION SGE;
116 } MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION,
117 Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t;
119 /* MPI v2.0 SCSI IO Request Message */
120 typedef struct _MPI2_SCSI_IO_REQUEST
122 U16 DevHandle; /* 0x00 */
123 U8 ChainOffset; /* 0x02 */
124 U8 Function; /* 0x03 */
125 U16 Reserved1; /* 0x04 */
126 U8 Reserved2; /* 0x06 */
127 U8 MsgFlags; /* 0x07 */
130 U16 Reserved3; /* 0x0A */
131 U32 SenseBufferLowAddress; /* 0x0C */
132 U16 SGLFlags; /* 0x10 */
133 U8 SenseBufferLength; /* 0x12 */
134 U8 Reserved4; /* 0x13 */
135 U8 SGLOffset0; /* 0x14 */
136 U8 SGLOffset1; /* 0x15 */
137 U8 SGLOffset2; /* 0x16 */
138 U8 SGLOffset3; /* 0x17 */
139 U32 SkipCount; /* 0x18 */
140 U32 DataLength; /* 0x1C */
141 U32 BidirectionalDataLength; /* 0x20 */
142 U16 IoFlags; /* 0x24 */
143 U16 EEDPFlags; /* 0x26 */
144 U32 EEDPBlockSize; /* 0x28 */
145 U32 SecondaryReferenceTag; /* 0x2C */
146 U16 SecondaryApplicationTag; /* 0x30 */
147 U16 ApplicationTagTranslationMask; /* 0x32 */
148 U8 LUN[8]; /* 0x34 */
149 U32 Control; /* 0x3C */
150 MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
152 #ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */
153 MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
156 MPI2_SGE_IO_UNION SGL; /* 0x60 */
158 } MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST,
159 Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t;
161 /* SCSI IO MsgFlags bits */
163 /* MsgFlags for SenseBufferAddressSpace */
164 #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
165 #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
166 #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
167 #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
168 #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
170 /* SCSI IO SGLFlags bits */
172 /* base values for Data Location Address Space */
173 #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
174 #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
175 #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
176 #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
177 #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
179 /* base values for Type */
180 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
181 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
182 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
183 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
185 /* shift values for each sub-field */
186 #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
187 #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
188 #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
189 #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
191 /* number of SGLOffset fields */
192 #define MPI2_SCSIIO_NUM_SGLOFFSETS (4)
194 /* SCSI IO IoFlags bits */
196 /* Large CDB Address Space */
197 #define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
198 #define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
199 #define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
200 #define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
201 #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
203 #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
204 #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
205 #define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
206 #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
207 #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
209 /* SCSI IO EEDPFlags bits */
211 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
212 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
213 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
214 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
216 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
217 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
218 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
220 #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
222 #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
223 #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
224 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
225 #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
226 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
227 #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
228 #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
229 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
231 /* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
233 /* SCSI IO Control bits */
234 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
235 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
237 #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
238 #define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24)
239 #define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
240 #define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
241 #define MPI2_SCSIIO_CONTROL_READ (0x02000000)
242 #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
244 #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
245 #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
246 /* alternate name for the previous field; called Command Priority in SAM-4 */
247 #define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800)
248 #define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11)
250 #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
251 #define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
252 #define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
253 #define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
254 #define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
256 #define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
257 #define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
258 #define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
259 #define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
262 /* MPI v2.5 CDB field */
263 typedef union _MPI25_SCSI_IO_CDB_UNION
266 MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
267 MPI2_IEEE_SGE_SIMPLE64 SGE;
268 } MPI25_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI25_SCSI_IO_CDB_UNION,
269 Mpi25ScsiIoCdb_t, MPI2_POINTER pMpi25ScsiIoCdb_t;
271 /* MPI v2.5 SCSI IO Request Message */
272 typedef struct _MPI25_SCSI_IO_REQUEST
274 U16 DevHandle; /* 0x00 */
275 U8 ChainOffset; /* 0x02 */
276 U8 Function; /* 0x03 */
277 U16 Reserved1; /* 0x04 */
278 U8 Reserved2; /* 0x06 */
279 U8 MsgFlags; /* 0x07 */
282 U16 Reserved3; /* 0x0A */
283 U32 SenseBufferLowAddress; /* 0x0C */
284 U8 DMAFlags; /* 0x10 */
285 U8 Reserved5; /* 0x11 */
286 U8 SenseBufferLength; /* 0x12 */
287 U8 Reserved4; /* 0x13 */
288 U8 SGLOffset0; /* 0x14 */
289 U8 SGLOffset1; /* 0x15 */
290 U8 SGLOffset2; /* 0x16 */
291 U8 SGLOffset3; /* 0x17 */
292 U32 SkipCount; /* 0x18 */
293 U32 DataLength; /* 0x1C */
294 U32 BidirectionalDataLength; /* 0x20 */
295 U16 IoFlags; /* 0x24 */
296 U16 EEDPFlags; /* 0x26 */
297 U16 EEDPBlockSize; /* 0x28 */
298 U16 Reserved6; /* 0x2A */
299 U32 SecondaryReferenceTag; /* 0x2C */
300 U16 SecondaryApplicationTag; /* 0x30 */
301 U16 ApplicationTagTranslationMask; /* 0x32 */
302 U8 LUN[8]; /* 0x34 */
303 U32 Control; /* 0x3C */
304 MPI25_SCSI_IO_CDB_UNION CDB; /* 0x40 */
306 #ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */
307 MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion;
310 MPI25_SGE_IO_UNION SGL; /* 0x60 */
312 } MPI25_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI25_SCSI_IO_REQUEST,
313 Mpi25SCSIIORequest_t, MPI2_POINTER pMpi25SCSIIORequest_t;
315 /* use MPI2_SCSIIO_MSGFLAGS_ defines for the MsgFlags field */
317 /* Defines for the DMAFlags field
318 * Each setting affects 4 SGLS, from SGL0 to SGL3.
324 #define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F)
325 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00)
326 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01)
327 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02)
328 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03)
329 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04)
330 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05)
331 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06)
332 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07)
333 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08)
334 #define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09)
335 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A)
336 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B)
337 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C)
338 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D)
339 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E)
340 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F)
342 /* number of SGLOffset fields */
343 #define MPI25_SCSIIO_NUM_SGLOFFSETS (4)
345 /* defines for the IoFlags field */
346 #define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000)
347 #define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
348 #define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
350 #define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
351 #define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
352 #define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
354 /* MPI v2.5 defines for the EEDPFlags bits */
355 /* use MPI2_SCSIIO_EEDPFLAGS_ defines for the other EEDPFlags bits */
356 #define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0)
357 #define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000)
358 #define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040)
359 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080)
360 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0)
362 #define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030)
363 #define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000)
364 #define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010)
366 /* use MPI2_LUN_ defines from mpi2.h for the LUN field */
368 /* use MPI2_SCSIIO_CONTROL_ defines for the Control field */
371 /* NOTE: The SCSI IO Reply is nearly the same for MPI 2.0 and MPI 2.5, so
372 * MPI2_SCSI_IO_REPLY is used for both.
375 /* SCSI IO Error Reply Message */
376 typedef struct _MPI2_SCSI_IO_REPLY
378 U16 DevHandle; /* 0x00 */
379 U8 MsgLength; /* 0x02 */
380 U8 Function; /* 0x03 */
381 U16 Reserved1; /* 0x04 */
382 U8 Reserved2; /* 0x06 */
383 U8 MsgFlags; /* 0x07 */
386 U16 Reserved3; /* 0x0A */
387 U8 SCSIStatus; /* 0x0C */
388 U8 SCSIState; /* 0x0D */
389 U16 IOCStatus; /* 0x0E */
390 U32 IOCLogInfo; /* 0x10 */
391 U32 TransferCount; /* 0x14 */
392 U32 SenseCount; /* 0x18 */
393 U32 ResponseInfo; /* 0x1C */
394 U16 TaskTag; /* 0x20 */
395 U16 SCSIStatusQualifier; /* 0x22 */
396 U32 BidirectionalTransferCount; /* 0x24 */
397 U32 EEDPErrorOffset; /* 0x28 */ /* MPI 2.5 only; Reserved in MPI 2.0 */
398 U32 Reserved6; /* 0x2C */
399 } MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY,
400 Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t;
402 /* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
404 #define MPI2_SCSI_STATUS_GOOD (0x00)
405 #define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
406 #define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
407 #define MPI2_SCSI_STATUS_BUSY (0x08)
408 #define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
409 #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
410 #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
411 #define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */
412 #define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
413 #define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
414 #define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
416 /* SCSI IO Reply SCSIState flags */
418 #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
419 #define MPI2_SCSI_STATE_TERMINATED (0x08)
420 #define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
421 #define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
422 #define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
424 /* masks and shifts for the ResponseInfo field */
426 #define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
427 #define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
429 #define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
432 /****************************************************************************
433 * SCSI Task Management messages
434 ****************************************************************************/
436 /* SCSI Task Management Request Message */
437 typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST
439 U16 DevHandle; /* 0x00 */
440 U8 ChainOffset; /* 0x02 */
441 U8 Function; /* 0x03 */
442 U8 Reserved1; /* 0x04 */
443 U8 TaskType; /* 0x05 */
444 U8 Reserved2; /* 0x06 */
445 U8 MsgFlags; /* 0x07 */
448 U16 Reserved3; /* 0x0A */
449 U8 LUN[8]; /* 0x0C */
450 U32 Reserved4[7]; /* 0x14 */
451 U16 TaskMID; /* 0x30 */
452 U16 Reserved5; /* 0x32 */
453 } MPI2_SCSI_TASK_MANAGE_REQUEST,
454 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
455 Mpi2SCSITaskManagementRequest_t,
456 MPI2_POINTER pMpi2SCSITaskManagementRequest_t;
458 /* TaskType values */
460 #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
461 #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
462 #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
463 #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
464 #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
465 #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
466 #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
467 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
468 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
470 /* obsolete TaskType name */
471 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
475 #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
476 #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
477 #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
478 #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
480 #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
484 /* SCSI Task Management Reply Message */
485 typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
487 U16 DevHandle; /* 0x00 */
488 U8 MsgLength; /* 0x02 */
489 U8 Function; /* 0x03 */
490 U8 ResponseCode; /* 0x04 */
491 U8 TaskType; /* 0x05 */
492 U8 Reserved1; /* 0x06 */
493 U8 MsgFlags; /* 0x07 */
496 U16 Reserved2; /* 0x0A */
497 U16 Reserved3; /* 0x0C */
498 U16 IOCStatus; /* 0x0E */
499 U32 IOCLogInfo; /* 0x10 */
500 U32 TerminationCount; /* 0x14 */
501 U32 ResponseInfo; /* 0x18 */
502 } MPI2_SCSI_TASK_MANAGE_REPLY,
503 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
504 Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t;
506 /* ResponseCode values */
508 #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
509 #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
510 #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
511 #define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
512 #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
513 #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
514 #define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
515 #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
517 /* masks and shifts for the ResponseInfo field */
519 #define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
520 #define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
521 #define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
522 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
523 #define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
524 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
525 #define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
526 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
529 /****************************************************************************
530 * SCSI Enclosure Processor messages
531 ****************************************************************************/
533 /* SCSI Enclosure Processor Request Message */
534 typedef struct _MPI2_SEP_REQUEST
536 U16 DevHandle; /* 0x00 */
537 U8 ChainOffset; /* 0x02 */
538 U8 Function; /* 0x03 */
539 U8 Action; /* 0x04 */
541 U8 Reserved1; /* 0x06 */
542 U8 MsgFlags; /* 0x07 */
545 U16 Reserved2; /* 0x0A */
546 U32 SlotStatus; /* 0x0C */
547 U32 Reserved3; /* 0x10 */
548 U32 Reserved4; /* 0x14 */
549 U32 Reserved5; /* 0x18 */
551 U16 EnclosureHandle; /* 0x1E */
552 } MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST,
553 Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t;
556 #define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
557 #define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
560 #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
561 #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
563 /* SlotStatus defines */
564 #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
565 #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
566 #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
567 #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
568 #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
569 #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
570 #define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
571 #define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
572 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
573 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
574 #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
577 /* SCSI Enclosure Processor Reply Message */
578 typedef struct _MPI2_SEP_REPLY
580 U16 DevHandle; /* 0x00 */
581 U8 MsgLength; /* 0x02 */
582 U8 Function; /* 0x03 */
583 U8 Action; /* 0x04 */
585 U8 Reserved1; /* 0x06 */
586 U8 MsgFlags; /* 0x07 */
589 U16 Reserved2; /* 0x0A */
590 U16 Reserved3; /* 0x0C */
591 U16 IOCStatus; /* 0x0E */
592 U32 IOCLogInfo; /* 0x10 */
593 U32 SlotStatus; /* 0x14 */
594 U32 Reserved4; /* 0x18 */
596 U16 EnclosureHandle; /* 0x1E */
597 } MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY,
598 Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t;
600 /* SlotStatus defines */
601 #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
602 #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
603 #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
604 #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
605 #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
606 #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
607 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
608 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
609 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
610 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
611 #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)