2 * Copyright (c) 2013-2014 Bjoern A. Zeeb
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249
7 * ("MRC2"), as part of the DARPA MRC research programme.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * This driver is modelled after atse(4). We need to seriously reduce the
31 * per-driver code we have to write^wcopy & paste.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
42 #include <sys/socket.h>
43 #include <sys/systm.h>
45 #include <machine/bus.h>
46 #include <machine/resource.h>
48 #include <net/ethernet.h>
50 #include <net/if_media.h>
51 #include <net/if_var.h>
53 #include <dev/fdt/fdt_common.h>
54 #include <dev/ofw/openfirm.h>
55 #include <dev/ofw/ofw_bus.h>
56 #include <dev/ofw/ofw_bus_subr.h>
58 #include "if_nf10bmacreg.h"
61 nf10bmac_probe_fdt(device_t dev)
64 if (!ofw_bus_status_okay(dev))
67 if (ofw_bus_is_compatible(dev, "netfpag10g,nf10bmac")) {
68 device_set_desc(dev, "NetFPGA-10G Embedded CPU Ethernet Core");
69 return (BUS_PROBE_DEFAULT);
76 nf10bmac_attach_fdt(device_t dev)
78 struct nf10bmac_softc *sc;
81 sc = device_get_softc(dev);
82 sc->nf10bmac_dev = dev;
83 sc->nf10bmac_unit = device_get_unit(dev);
86 * FDT lists our resources. For convenience we use three different
87 * mappings. We need to attach them in the oder specified in .dts:
88 * LOOP (size 0x1f), TX (0x2f), RX (0x2f), INTR (0xf).
92 * LOOP memory region (this could be a general control region).
93 * 0x00: 32/64bit register to enable a Y-"lopback".
95 sc->nf10bmac_ctrl_rid = 0;
96 sc->nf10bmac_ctrl_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
97 &sc->nf10bmac_ctrl_rid, RF_ACTIVE);
98 if (sc->nf10bmac_ctrl_res == NULL) {
99 device_printf(dev, "failed to map memory for CTRL region\n");
104 device_printf(sc->nf10bmac_dev, "CTRL region at mem %p-%p\n",
105 (void *)rman_get_start(sc->nf10bmac_ctrl_res),
106 (void *)(rman_get_start(sc->nf10bmac_ctrl_res) +
107 rman_get_size(sc->nf10bmac_ctrl_res)));
110 * TX and TX metadata FIFO memory region.
111 * 0x00: 32/64bit FIFO data,
112 * 0x08: 32/64bit FIFO metadata,
113 * 0x10: 32/64bit packet length.
115 sc->nf10bmac_tx_mem_rid = 1;
116 sc->nf10bmac_tx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
117 &sc->nf10bmac_tx_mem_rid, RF_ACTIVE);
118 if (sc->nf10bmac_tx_mem_res == NULL) {
119 device_printf(dev, "failed to map memory for TX FIFO\n");
124 device_printf(sc->nf10bmac_dev, "TX FIFO at mem %p-%p\n",
125 (void *)rman_get_start(sc->nf10bmac_tx_mem_res),
126 (void *)(rman_get_start(sc->nf10bmac_tx_mem_res) +
127 rman_get_size(sc->nf10bmac_tx_mem_res)));
130 * RX and RXC metadata FIFO memory region.
131 * 0x00: 32/64bit FIFO data,
132 * 0x08: 32/64bit FIFO metadata,
133 * 0x10: 32/64bit packet length.
135 sc->nf10bmac_rx_mem_rid = 2;
136 sc->nf10bmac_rx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
137 &sc->nf10bmac_rx_mem_rid, RF_ACTIVE);
138 if (sc->nf10bmac_rx_mem_res == NULL) {
139 device_printf(dev, "failed to map memory for RX FIFO\n");
144 device_printf(sc->nf10bmac_dev, "RX FIFO at mem %p-%p\n",
145 (void *)rman_get_start(sc->nf10bmac_rx_mem_res),
146 (void *)(rman_get_start(sc->nf10bmac_rx_mem_res) +
147 rman_get_size(sc->nf10bmac_rx_mem_res)));
150 * Interrupt handling registers.
151 * 0x00: 32/64bit register to clear (and disable) the RX interrupt.
152 * 0x08: 32/64bit register to enable or disable the RX interrupt.
154 sc->nf10bmac_intr_rid = 3;
155 sc->nf10bmac_intr_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
156 &sc->nf10bmac_intr_rid, RF_ACTIVE);
157 if (sc->nf10bmac_intr_res == NULL) {
158 device_printf(dev, "failed to map memory for INTR region\n");
163 device_printf(sc->nf10bmac_dev, "INTR region at mem %p-%p\n",
164 (void *)rman_get_start(sc->nf10bmac_intr_res),
165 (void *)(rman_get_start(sc->nf10bmac_intr_res) +
166 rman_get_size(sc->nf10bmac_intr_res)));
168 /* (Optional) RX and TX IRQ. */
169 sc->nf10bmac_rx_irq_rid = 0;
170 sc->nf10bmac_rx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
171 &sc->nf10bmac_rx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
173 error = nf10bmac_attach(dev);
181 nf10bmac_detach_resources(dev);
186 static device_method_t nf10bmac_methods_fdt[] = {
187 /* Device interface */
188 DEVMETHOD(device_probe, nf10bmac_probe_fdt),
189 DEVMETHOD(device_attach, nf10bmac_attach_fdt),
190 DEVMETHOD(device_detach, nf10bmac_detach_dev),
195 static driver_t nf10bmac_driver_fdt = {
197 nf10bmac_methods_fdt,
198 sizeof(struct nf10bmac_softc)
201 DRIVER_MODULE(nf10bmac, simplebus, nf10bmac_driver_fdt, nf10bmac_devclass, 0,0);