1 /******************************************************************************
2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided
5 *that the following conditions are met:
6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
8 *2. Redistributions in binary form must reproduce the above copyright notice,
9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided
10 *with the distribution.
12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
23 ******************************************************************************/
24 /*****************************************************************************/
26 * \brief The file defines the constants defined by sas spec
29 /*****************************************************************************/
34 /****************************************************************
35 * SAS Specification related defines *
36 ****************************************************************/
37 #define SA_SAS_PROTOCOL_SMP 0x00
38 #define SA_SAS_PROTOCOL_SSP 0x01
39 #define SA_SAS_PROTOCOL_STP 0x02
41 #define SA_OPENFRM_SIZE (28)
42 #define SA_IDENTIFY_FRAME_SIZE (28)
43 //#define SAS_IDENTIFY_FRM_SIZE SA_IDENTIFY_FRAME_SIZE
45 #define SA_SAS_FRAME_TYPE_SSP_DATA 0x01
46 #define SA_SAS_FRAME_TYPE_SSP_XRDY 0x05
47 #define SA_SAS_FRAME_TYPE_SSP_CMD 0x06
48 #define SA_SAS_FRAME_TYPE_SSP_RSP 0x07
49 #define SA_SAS_FRAME_TYPE_SSP_TASK 0x16
50 #define SA_SAS_FRAME_TYPE_SMP_REQ 0x40
51 #define SA_SAS_FRAME_TYPE_SMP_RSP 0x41
53 #define SA_SAS_CONNECTION_RATE_1_5G 0x08
54 #define SA_SAS_CONNECTION_RATE_3_0G 0x09
55 #define SA_SAS_CONNECTION_RATE_6_0G 0x0A
56 #define SA_SAS_CONNECTION_RATE_12_0G 0x0B
58 #define SA_SAS_DEV_TYPE_NO_DEVICE 0x00
59 #define SA_SAS_DEV_TYPE_END_DEVICE 0x01
60 #define SA_SAS_DEV_TYPE_EDGE_EXPANDER 0x02
61 #define SA_SAS_DEV_TYPE_FANOUT_EXPANDER 0x03
63 #define AGSA_DEV_TYPE_END_DEVICE (SA_SAS_DEV_TYPE_END_DEVICE << 4)
64 #define AGSA_DEV_TYPE_EDGE_EXPANDER (SA_SAS_DEV_TYPE_EDGE_EXPANDER << 4)
65 #define AGSA_DEV_TYPE_FAN_EXPANDER (SA_SAS_DEV_TYPE_FANOUT_EXPANDER << 4)
67 #define SA_SAS_SMP_REPORT_GENERAL 0x00
68 #define SA_SAS_SMP_REPORT_MANUFACTURE_INFORMATION 0x01
69 #define SA_SAS_SMP_READ_GPIO_REGISTER 0x02
70 #define SA_SAS_SMP_DISCOVER 0x10
71 #define SA_SAS_SMP_REPORT_PHY_ERROR_LOG 0x11
72 #define SA_SAS_SMP_REPORT_PHY_SATA 0x12
73 #define SA_SAS_SMP_REPORT_ROUTING_INFORMATION 0x13
74 #define SA_SAS_SMP_WRITE_GPIO_REGISTER 0x82
75 #define SA_SAS_SMP_CONFIGURE_ROUTING_INFORMATION 0x90
76 #define SA_SAS_SMP_PHY_CONTROL 0x91
77 #define SA_SAS_SMP_PHY_TEST 0x92
79 #define SA_SAS_SMP_FUNCTION_ACCEPTED 0x00
80 #define SA_SAS_SMP_FUNCTION_UNKNOWN 0x01
81 #define SA_SAS_SMP_FUNCTION_FAILED 0x02
82 #define SA_SAS_SMP_INVALID_REQ_FRAME_LENGTH 0x03
83 #define SA_SAS_SMP_PHY_NOT_EXIST 0x10
85 #define SA_SAS_ROUTING_DIRECT 0x00
86 #define SA_SAS_ROUTING_SUBTRACTIVE 0x01
87 #define SA_SAS_ROUTING_TABLE 0x02
89 #define SA_SAS_PHYCTL_LINK_RESET 0x01
90 #define SA_SAS_PHYCTL_HARD_RESET 0x02
91 #define SA_SAS_PHYCTL_DISABLE 0x03
92 #define SA_SAS_PHYCTL_CLEAR_ERROR_LOG 0x05
93 #define SA_SAS_PHYCTL_CLEAR_AFFILIATION 0x06
94 #define SA_SAS_PHYCTL_TRANSMIT_PS_SIGNAL 0x07
96 #define SA_SSP_CMDIU_LEN_BYTES 28
97 #define SA_SSP_TMIU_LEN_BYTES 28
100 #define SASD_DEV_SATA_MASK 0xF0
101 #define SASD_DEV_SAS_MASK 0x0F
103 #define SASD_DEV_SAS_END_DEVICE 0x01 /* SAS end device type */
104 #define SASD_DEV_SAS_EDGE_EXPANDER 0x02 /* SAS edge expander device type */
105 #define SASD_DEV_SAS_FAN_EXPANDER 0x03 /* SAS fan out expander device type */
107 #define SASD_DEV_SATA_ATA_DEVICE 0x10 /* SATA ATA device type */
108 #define SASD_DEV_SATA_ATAPI_DEVICE 0x20 /* SATA ATAPI device type */
109 #define SASD_DEV_SATA_PM_DEVICE 0x30 /* SATA PM device type */
110 #define SASD_DEV_SATA_SEMB_DEVICE 0x40 /* SATA SEMB device type */
111 #define SASD_DEV_SATA_SEMB_WO_SEP_DEVICE 0x50 /* SATA SEMB without SEP device type */
113 #define SASD_DEV_SATA_UNKNOWN_DEVICE 0xFF /* SAS SATA unknown device type */
116 #define SASD_TASK_ATTR_SIMPLE 0x0
117 #define SASD_TASK_ATTR_HEAD_OF_QUEUE 0x1
118 #define SASD_TASK_ATTR_ORDERED 0x2
119 #define SASD_TASK_ATTR_ACA 0x4
122 /*****************************************************************************
123 ** SAS TM Function definitions
124 *****************************************************************************/
125 #define SASD_SAS_ABORT_TASK 0x01
126 #define SASD_SAS_ABORT_TASK_SET 0x02
127 #define SASD_SAS_CLEAR_TASK_SET 0x04
128 #define SASD_SAS_LOGICAL_UNIT_RESET 0x08
129 #define SASD_SAS_CLEAR_ACA 0x40
130 #define SASD_SAS_QUARY_TASK 0x80
132 /****************************************************************
133 * SATA Specification related defines *
134 ****************************************************************/
135 #define SA_SATA_MAX_QUEUED_COMMANDS 32
136 #define SA_SATA_MAX_PM_PORTS 15
138 #define SA_SATA_FIS_TYPE_HOST_2_DEV 0x27
139 #define SA_SATA_FIS_TYPE_DEV_2_HOST 0x34
140 #define SA_SATA_FIS_TYPE_SET_DEVICE 0xA1
141 #define SA_SATA_FIS_TYPE_DMA_ACTIVE 0x39
142 #define SA_SATA_FIS_TYPE_FDMA_SETUP 0x41
143 #define SA_SATA_FIS_TYPE_BIST 0x58
145 #define SA_SATA_CMD_IDENTIFY_DEVICE 0xEC
146 #define SA_SATA_CMD_EXEC_DEV_DIAG 0x90
148 #define SA_SATA_CONTROL_SRST 0x04
150 #define SA_SATA_H2DREG_LEN_BYTES 20
151 #define SA_SATA_H2D_BIST_LEN_BYTES 12
152 /****************************************************************
153 * SAS Specification related structures *
154 ****************************************************************/
158 /** \brief Structure for SATA BIST FIS
160 * The agsaFisBIST_t data structure describes a SATA FIS (Frame Information Structures)
161 * for FIS type BIST (Built In Self Test) Activate Bidirectional.
163 * This data structure is one instance of the SATA request structure agsaSATAInitiatorRequest_t,
164 * which is one instance of the generic request, issued to saSATAStart().
168 #define SA_SATA_BIST_PATTERN_T_BIT 0x80
169 #define SA_SATA_BIST_PATTERN_A_BIT 0x40
170 #define SA_SATA_BIST_PATTERN_S_BIT 0x20
171 #define SA_SATA_BIST_PATTERN_L_BIT 0x10
172 #define SA_SATA_BIST_PATTERN_F_BIT 0x08
173 #define SA_SATA_BIST_PATTERN_P_BIT 0x04
174 #define SA_SATA_BIST_PATTERN_R_BIT 0x02
175 #define SA_SATA_BIST_PATTERN_V_BIT 0x01
178 * The first SATA DWORD types.
180 typedef struct agsaFisBISTHeader_s
182 bit8 fisType; /* fisType, set to 58h for BIST */
185 /* b3-b0 PM Port. device port address that the PM should deliver the FIS to */
186 bit8 patternDefinition;
187 /* b7 : T Far end transmit only mode */
188 /* b6 : A ALIGN Bypass (Do not Transmit Align Primitives) (valid only in combination with T Bit) (optional behavior) */
189 /* b5 : S Bypass Scrambling (valid only in combination with T Bit) (optional behavior) */
190 /* b4 : L Far End Retimed Loopback. Transmitter shall insert additional ALIGNS) */
191 /* b3 : F Far End Analog (AFE) Loopback (Optional) */
192 /* b2 : P Primitive bit. (valid only in combination with the T Bit) (optional behavior) */
193 /* b1 : R Reserved */
194 /* b0 : V Vendor Specific Test Mode. Causes all other bits to be ignored */
195 bit8 reserved5; /* Reserved */
196 } agsaFisBISTHeader_t;
199 typedef struct agsaFisRegD2HHeader_s
201 bit8 fisType; /* fisType, set to 34h for DeviceToHostReg */
204 /* b6 : I Interrupt bit */
205 /* b5-b4 : reserved */
206 /* b3-b0 : PM Port */
207 bit8 status; /* Contains the contents to be placed in the Status(and Alternate status)
208 Register of the Shadow Command Block */
209 bit8 error; /* Contains the contents to be placed in the Error register of the Shadow Command Block */
210 } agsaFisRegD2HHeader_t;
212 typedef struct agsaFisSetDevBitsHeader_s
214 bit8 fisType; /* fisType, set to A1h for SetDeviceBit */
216 /* b7 : n Bit. Notification bit. If set device needs attention. */
217 /* b6 : i Bit. Interrupt Bit */
218 /* b5-b4: reserved2 */
222 /* b6-b4: Status Hi. Contains the contents to be placed in bits 6, 5, and 4 of
223 the Status register of the Shadow Command Block */
225 /* b2-b0: Status Lo Contains the contents to be placed in bits 2,1, and 0 of the
226 Status register of the Shadow Command Block */
227 bit8 error; /* Contains the contents to be placed in the Error register of
228 the Shadow Command Block */
229 } agsaFisSetDevBitsHeader_t;
231 typedef struct agsaFisRegH2DHeader_s
233 bit8 fisType; /* fisType, set to 27h for DeviceToHostReg */
235 /* b7 : C_bit This bit is set to one when the register transfer is
236 due to an update of the Command register */
237 /* b6-b4: reserved */
239 bit8 command; /* Contains the contents of the Command register of
240 the Shadow Command Block */
241 bit8 features; /* Contains the contents of the Features register of
242 the Shadow Command Block */
243 } agsaFisRegH2DHeader_t;
245 typedef struct agsaFisPioSetupHeader_s
247 bit8 fisType; /* set to 5F */
250 /* b6 : i bit. Interrupt bit */
251 /* b5 : d bit. data transfer direction. set to 1 for device to host xfer */
256 } agsaFisPioSetupHeader_t;
258 typedef union agsaFisHeader_s
260 agsaFisBISTHeader_t Bist;
261 agsaFisRegD2HHeader_t D2H;
262 agsaFisRegH2DHeader_t H2D;
263 agsaFisSetDevBitsHeader_t SetDevBits;
264 agsaFisPioSetupHeader_t PioSetup;
268 typedef struct agsaFisBISTData_s
270 bit8 data[8]; /* BIST data */
274 typedef struct agsaFisBIST_s
276 agsaFisBISTHeader_t h;
280 /** \brief Structure for SATA Device to Host Register FIS
282 * The agsaFisRegDeviceToHost_t data structure describes a SATA FIS (Frame Information
283 * Structures) for FIS type Register Device to Host.
285 * This structure is used only as inbound data (device to host) to describe device to
289 #define SA_SATA_RD2H_I_BIT 0x40
291 typedef struct agsaFisRegD2HData_s
293 bit8 lbaLow; /* Contains the contents to be placed in the LBA Low register
294 of the Shadow Command Block */
295 bit8 lbaMid; /* Contains the contents to be placed in the LBA Mid register
296 of the Shadow Command Block */
298 bit8 lbaHigh; /* Contains the contents to be placed in the LBA High register
299 of the Shadow Command Block */
300 bit8 device; /* Contains the contents to be placed in the Device register of the Shadow Command Block */
302 bit8 lbaLowExp; /* Contains the contents of the expanded address field
303 of the Shadow Command Block */
304 bit8 lbaMidExp; /* Contains the contents of the expanded address field
305 of the Shadow Command Block */
306 bit8 lbaHighExp; /* Contains the contents of the expanded address field
307 of the Shadow Command Block */
308 bit8 reserved4; /** reserved */
310 bit8 sectorCount; /* Contains the contents to be placed in the Sector
311 Count register of the Shadow Command Block */
312 bit8 sectorCountExp; /* Contains the contents of the expanded address
313 field of the Shadow Command Block */
314 bit8 reserved6; /* Reserved */
315 bit8 reserved5; /* Reserved */
316 bit32 reserved7; /* Reserved */
317 } agsaFisRegD2HData_t;
320 typedef struct agsaFisRegDeviceToHost_s
322 agsaFisRegD2HHeader_t h;
323 agsaFisRegD2HData_t d;
324 } agsaFisRegDeviceToHost_t;
328 /** \brief Structure for SATA Host to Device Register FIS
330 * The agsaFisRegHostToDevice_t data structure describes a SATA FIS
331 * (Frame Information Structures) for FIS type Register Host to Device.
333 * This data structure is one instance of the SATA request structure
334 * agsaSATAInitiatorRequest_t, which is one instance of the generic request,
335 * issued to saSATAStart().
337 typedef struct agsaFisRegH2DData_s
339 bit8 lbaLow; /* Contains the contents of the LBA Low register of the Shadow Command Block */
340 bit8 lbaMid; /* Contains the contents of the LBA Mid register of the Shadow Command Block */
341 bit8 lbaHigh; /* Contains the contents of the LBA High register of the Shadow Command Block */
342 bit8 device; /* Contains the contents of the Device register of the Shadow Command Block */
344 bit8 lbaLowExp; /* Contains the contents of the expanded address field of the
345 Shadow Command Block */
346 bit8 lbaMidExp; /* Contains the contents of the expanded address field of the
347 Shadow Command Block */
348 bit8 lbaHighExp; /* Contains the contents of the expanded address field of the
349 Shadow Command Block */
350 bit8 featuresExp; /* Contains the contents of the expanded address field of the
351 Shadow Command Block */
353 bit8 sectorCount; /* Contains the contents of the Sector Count register of the
354 Shadow Command Block */
355 bit8 sectorCountExp; /* Contains the contents of the expanded address field of
356 the Shadow Command Block */
357 bit8 reserved4; /* Reserved */
358 bit8 control; /* Contains the contents of the Device Control register of the
359 Shadow Command Block */
360 bit32 reserved5; /* Reserved */
361 } agsaFisRegH2DData_t;
363 typedef struct agsaFisRegHostToDevice_s
365 agsaFisRegH2DHeader_t h;
366 agsaFisRegH2DData_t d;
367 } agsaFisRegHostToDevice_t;
370 /** \brief Structure for SATA SetDeviceBit FIS
372 * The agsaFisSetDevBits_t data structure describes a SATA FIS (Frame Information Structures)
373 * for FIS type Set Device Bits - Device to Host.
375 * This structure is used only as inbound data (device to host) to describe device to host
378 typedef struct agsaFisSetDevBitsData_s
380 bit32 reserved6; /* Reserved */
381 } agsaFisSetDevBitsData_t;
384 typedef struct agsaFisSetDevBits_s
386 agsaFisSetDevBitsHeader_t h;
387 agsaFisSetDevBitsData_t d;
388 } agsaFisSetDevBits_t;
391 /** \brief union data structure specifies a FIS from host software
393 * union data structure specifies a FIS from host software
395 typedef union agsaSATAHostFis_u
397 agsaFisRegHostToDevice_t fisRegHostToDev; /* Structure containing the FIS request
398 for Register - Host to Device */
399 agsaFisBIST_t fisBIST; /* Structure containing the FIS request for BIST */
404 * This structure is used
407 typedef struct agsaFisPioSetupData_s
409 bit8 lbaLow; /* Contains the contents of the LBA Low register of the Shadow Command Block */
410 bit8 lbaMid; /* Contains the contents of the LBA Mid register of the Shadow Command Block */
411 bit8 lbaHigh; /* Contains the contents of the LBA High register of the Shadow Command Block */
412 bit8 device; /* Contains the contents of the Device register of the Shadow Command Block */
414 bit8 lbaLowExp; /* Contains the contents of the expanded address field of the
415 Shadow Command Block */
416 bit8 lbaMidExp; /* Contains the contents of the expanded address field of the
417 Shadow Command Block */
418 bit8 lbaHighExp; /* Contains the contents of the expanded address field of the
419 Shadow Command Block */
420 bit8 reserved1; /* reserved */
422 bit8 sectorCount; /* Contains the contents of the Sector Count register of the
423 Shadow Command Block */
424 bit8 sectorCountExp; /* Contains the contents of the expanded address field of
425 the Shadow Command Block */
426 bit8 reserved2; /* Reserved */
427 bit8 e_status; /* Contains the new value of Status Reg of the Command block
428 at the conclusion of the subsequent Data FIS */
429 bit8 reserved4[2]; /* Reserved */
430 bit8 transferCount[2]; /* the number of bytes to be xfered in the subsequent Data FiS */
431 } agsaFisPioSetupData_t;
434 typedef struct agsaFisPioSetup_s
436 agsaFisPioSetupHeader_t h;
437 agsaFisPioSetupData_t d;
442 /** \brief describe SAS IDENTIFY address frame
444 * describe SAS IDENTIFY address frame, the CRC field is not included in the structure
447 typedef struct agsaSASIdentify_s
449 bit8 deviceType_addressFrameType;
451 /* b6-4 : device type */
452 /* b3-0 : address frame type */
453 bit8 reason; /* reserved */
454 /* b7-4 : reserved */
455 /* b3-0 : reason SAS2 */
456 bit8 initiator_ssp_stp_smp;
457 /* b8-4 : reserved */
458 /* b3 : SSP initiator port */
459 /* b2 : STP initiator port */
460 /* b1 : SMP initiator port */
462 bit8 target_ssp_stp_smp;
463 /* b8-4 : reserved */
464 /* b3 : SSP target port */
465 /* b2 : STP target port */
466 /* b1 : SMP target port */
468 bit8 deviceName[8]; /* reserved */
470 bit8 sasAddressHi[4]; /* BE SAS address Lo */
471 bit8 sasAddressLo[4]; /* BE SAS address Hi */
473 bit8 phyIdentifier; /* phy identifier of the phy transmitting the IDENTIFY address frame */
474 bit8 zpsds_breakReplyCap;
475 /* b7-3 : reserved */
476 /* b2 : Inside ZPSDS Persistent */
477 /* b1 : Requested Inside ZPSDS */
478 /* b0 : Break Reply Capable */
479 bit8 reserved3[6]; /* reserved */
482 #define SA_IDFRM_GET_SAS_ADDRESSLO(identFrame) \
483 DMA_BEBIT32_TO_BIT32(*(bit32 *)(identFrame)->sasAddressLo)
485 #define SA_IDFRM_GET_SAS_ADDRESSHI(identFrame) \
486 DMA_BEBIT32_TO_BIT32(*(bit32 *)(identFrame)->sasAddressHi)
488 #define SA_IDFRM_GET_DEVICETTYPE(identFrame) \
489 (((identFrame)->deviceType_addressFrameType & 0x70) >> 4)
491 #define SA_IDFRM_PUT_SAS_ADDRESSLO(identFrame, src32) \
492 ((*(bit32 *)((identFrame)->sasAddressLo)) = BIT32_TO_DMA_BEBIT32(src32))
494 #define SA_IDFRM_PUT_SAS_ADDRESSHI(identFrame, src32) \
495 ((*(bit32 *)((identFrame)->sasAddressHi)) = BIT32_TO_DMA_BEBIT32(src32))
497 #define SA_IDFRM_SSP_BIT 0x8 /* SSP Initiator port */
498 #define SA_IDFRM_STP_BIT 0x4 /* STP Initiator port */
499 #define SA_IDFRM_SMP_BIT 0x2 /* SMP Initiator port */
500 #define SA_IDFRM_SATA_BIT 0x1 /* SATA device, valid in the discovery response only */
503 #define SA_IDFRM_IS_SSP_INITIATOR(identFrame) \
504 (((identFrame)->initiator_ssp_stp_smp & SA_IDFRM_SSP_BIT) == SA_IDFRM_SSP_BIT)
506 #define SA_IDFRM_IS_STP_INITIATOR(identFrame) \
507 (((identFrame)->initiator_ssp_stp_smp & SA_IDFRM_STP_BIT) == SA_IDFRM_STP_BIT)
509 #define SA_IDFRM_IS_SMP_INITIATOR(identFrame) \
510 (((identFrame)->initiator_ssp_stp_smp & SA_IDFRM_SMP_BIT) == SA_IDFRM_SMP_BIT)
512 #define SA_IDFRM_IS_SSP_TARGET(identFrame) \
513 (((identFrame)->target_ssp_stp_smp & SA_IDFRM_SSP_BIT) == SA_IDFRM_SSP_BIT)
515 #define SA_IDFRM_IS_STP_TARGET(identFrame) \
516 (((identFrame)->target_ssp_stp_smp & SA_IDFRM_STP_BIT) == SA_IDFRM_STP_BIT)
518 #define SA_IDFRM_IS_SMP_TARGET(identFrame) \
519 (((identFrame)->target_ssp_stp_smp & SA_IDFRM_SMP_BIT) == SA_IDFRM_SMP_BIT)
521 #define SA_IDFRM_IS_SATA_DEVICE(identFrame) \
522 (((identFrame)->target_ssp_stp_smp & SA_IDFRM_SATA_BIT) == SA_IDFRM_SATA_BIT)
524 /** \brief data structure provides the identify data of the SATA device
526 * data structure provides the identify data of the SATA device
529 typedef struct agsaSATAIdentifyData_s
535 /* b0 : removableMedia */
536 bit16 word1_9[9]; /**< word 1 to 9 of identify device information */
537 bit8 serialNumber[20]; /**< word 10 to 19 of identify device information, 20 ASCII chars */
538 bit16 word20_22[3]; /**< word 20 to 22 of identify device information */
539 bit8 firmwareVersion[8]; /**< word 23 to 26 of identify device information, 4 ASCII chars */
540 bit8 modelNumber[40]; /**< word 27 to 46 of identify device information, 40 ASCII chars */
541 bit16 word47_48[2]; /**< word 47 to 48 of identify device information, 40 ASCII chars */
542 bit16 dma_lba_iod_ios_stimer;
543 /* b15-b14:word49_bit14_15 */
544 /* b13 : standbyTimerSupported */
545 /* b12 : word49_bit12 */
546 /* b11 : IORDYSupported */
547 /* b10 : IORDYDisabled */
548 /* b9 : lbaSupported */
549 /* b8 : dmaSupported */
550 /* b7-b0 : retired */
551 bit16 word50_52[3]; /**< word 50 to 52 of identify device information, 40 ASCII chars */
553 /* b15-3 : word53_bit3_15 */
554 /* b2 : validWord88 */
555 /* b1 : validWord70_64 */
556 /* b0 : word53_bit0 */
557 bit16 word54_59[6]; /**< word54-59 of identify device information */
558 bit16 numOfUserAddressableSectorsLo; /**< word60 of identify device information */
559 bit16 numOfUserAddressableSectorsHi; /**< word61 of identify device information */
560 bit16 word62_74[13]; /**< word62-74 of identify device information */
562 /* b15-5 : word75_bit5_15 */
563 /* b4-0 : queueDepth */
564 bit16 sataCapabilities;
565 /* b15-b11: word76_bit11_15 */
566 /* b10 : phyEventCountersSupport */
567 /* b9 : hostInitPowerMangment */
568 /* b8 : nativeCommandQueuing */
569 /* b7-b3 : word76_bit4_7 */
570 /* b2 : sataGen2Supported (3.0 Gbps) */
571 /* b1 : sataGen1Supported (1.5 Gbps) */
572 /* b0 :word76_bit0 */
573 bit16 word77; /**< word77 of identify device information */
574 /* b15-b6 : word77 bit6_15, Reserved */
575 /* b5 : DMA Setup Auto-Activate support */
576 /* b4 : NCQ streaming support */
577 /* b3-b1 : coded value indicating current negotiated SATA signal speed */
578 /* b0 : shall be zero */
579 bit16 sataFeaturesSupported;
580 /* b15-b7 : word78_bit7_15 */
581 /* b6 : softSettingPreserveSupported */
582 /* b5 : word78_bit5 */
583 /* b4 : inOrderDataDeliverySupported */
584 /* b3 : devInitPowerManagementSupported */
585 /* b2 : autoActiveDMASupported */
586 /* b1 : nonZeroBufOffsetSupported */
587 /* b0 : word78_bit0 */
588 bit16 sataFeaturesEnabled;
589 /* b15-7 : word79_bit7_15 */
590 /* b6 : softSettingPreserveEnabled */
591 /* b5 : word79_bit5 */
592 /* b4 : inOrderDataDeliveryEnabled */
593 /* b3 : devInitPowerManagementEnabled */
594 /* b2 : autoActiveDMAEnabled */
595 /* b1 : nonZeroBufOffsetEnabled */
596 /* b0 : word79_bit0 */
597 bit16 majorVersionNumber;
598 /* b15 : word80_bit15 */
599 /* b14 : supportATA_ATAPI14 */
600 /* b13 : supportATA_ATAPI13 */
601 /* b12 : supportATA_ATAPI12 */
602 /* b11 : supportATA_ATAPI11 */
603 /* b10 : supportATA_ATAPI10 */
604 /* b9 : supportATA_ATAPI9 */
605 /* b8 : supportATA_ATAPI8 */
606 /* b7 : supportATA_ATAPI7 */
607 /* b6 : supportATA_ATAPI6 */
608 /* b5 : supportATA_ATAPI5 */
609 /* b4 : supportATA_ATAPI4 */
610 /* b3 : supportATA3 */
611 /* b2-0 : word80_bit0_2 */
612 bit16 minorVersionNumber; /**< word81 of identify device information */
613 bit16 commandSetSupported;
614 /* b15 : word82_bit15 */
615 /* b14 : NOPSupported */
616 /* b13 : READ_BUFFERSupported */
617 /* b12 : WRITE_BUFFERSupported */
618 /* b11 : word82_bit11 */
619 /* b10 : hostProtectedAreaSupported */
620 /* b9 : DEVICE_RESETSupported */
621 /* b8 : SERVICEInterruptSupported */
622 /* b7 : releaseInterruptSupported */
623 /* b6 : lookAheadSupported */
624 /* b5 : writeCacheSupported */
625 /* b4 : word82_bit4 */
626 /* b3 : mandPowerManagmentSupported */
627 /* b2 : removableMediaSupported */
628 /* b1 : securityModeSupported */
629 /* b0 : SMARTSupported */
630 bit16 commandSetSupported1;
631 /* b15-b14: word83_bit14_15 */
632 /* b13 : FLUSH_CACHE_EXTSupported */
633 /* b12 : mandatoryFLUSH_CACHESupported */
634 /* b11 : devConfOverlaySupported */
635 /* b10 : address48BitsSupported */
636 /* b9 : autoAcousticManageSupported */
637 /* b8 : SET_MAX_SecurityExtSupported */
638 /* b7 : word83_bit7 */
639 /* b6 : SET_FEATUREReqSpinupSupported */
640 /* b5 : powerUpInStandyBySupported */
641 /* b4 : removableMediaStNotifSupported */
642 /* b3 : advanPowerManagmentSupported */
643 /* b2 : CFASupported */
644 /* b1 : DMAQueuedSupported */
645 /* b0 : DOWNLOAD_MICROCODESupported */
646 bit16 commandSetFeatureSupportedExt;
647 /* b15-b13: word84_bit13_15 */
648 /* b12 : timeLimitRWContSupported */
649 /* b11 : timeLimitRWSupported */
650 /* b10 : writeURGBitSupported */
651 /* b9 : readURGBitSupported */
652 /* b8 : wwwNameSupported */
653 /* b7 : WRITE_DMAQ_FUA_EXTSupported */
654 /* b6 : WRITE_FUA_EXTSupported */
655 /* b5 : generalPurposeLogSupported */
656 /* b4 : streamingSupported */
657 /* b3 : mediaCardPassThroughSupported */
658 /* b2 : mediaSerialNoSupported */
659 /* b1 : SMARTSelfRestSupported */
660 /* b0 : SMARTErrorLogSupported */
661 bit16 commandSetFeatureEnabled;
662 /* b15 : word85_bit15 */
663 /* b14 : NOPEnabled */
664 /* b13 : READ_BUFFEREnabled */
665 /* b12 : WRITE_BUFFEREnabled */
666 /* b11 : word85_bit11 */
667 /* b10 : hostProtectedAreaEnabled */
668 /* b9 : DEVICE_RESETEnabled */
669 /* b8 : SERVICEInterruptEnabled */
670 /* b7 : releaseInterruptEnabled */
671 /* b6 : lookAheadEnabled */
672 /* b5 : writeCacheEnabled */
673 /* b4 : word85_bit4 */
674 /* b3 : mandPowerManagmentEnabled */
675 /* b2 : removableMediaEnabled */
676 /* b1 : securityModeEnabled */
677 /* b0 : SMARTEnabled */
678 bit16 commandSetFeatureEnabled1;
679 /* b15-b14: word86_bit14_15 */
680 /* b13 : FLUSH_CACHE_EXTEnabled */
681 /* b12 : mandatoryFLUSH_CACHEEnabled */
682 /* b11 : devConfOverlayEnabled */
683 /* b10 : address48BitsEnabled */
684 /* b9 : autoAcousticManageEnabled */
685 /* b8 : SET_MAX_SecurityExtEnabled */
686 /* b7 : word86_bit7 */
687 /* b6 : SET_FEATUREReqSpinupEnabled */
688 /* b5 : powerUpInStandyByEnabled */
689 /* b4 : removableMediaStNotifEnabled */
690 /* b3 : advanPowerManagmentEnabled */
691 /* b2 : CFAEnabled */
692 /* b1 : DMAQueuedEnabled */
693 /* b0 : DOWNLOAD_MICROCODEEnabled */
694 bit16 commandSetFeatureDefault;
695 /* b15-b13: word87_bit13_15 */
696 /* b12 : timeLimitRWContEnabled */
697 /* b11 : timeLimitRWEnabled */
698 /* b10 : writeURGBitEnabled */
699 /* b9 : readURGBitEnabled */
700 /* b8 : wwwNameEnabled */
701 /* b7 : WRITE_DMAQ_FUA_EXTEnabled */
702 /* b6 : WRITE_FUA_EXTEnabled */
703 /* b5 : generalPurposeLogEnabled */
704 /* b4 : streamingEnabled */
705 /* b3 : mediaCardPassThroughEnabled */
706 /* b2 : mediaSerialNoEnabled */
707 /* b1 : SMARTSelfRestEnabled */
708 /* b0 : SMARTErrorLogEnabled */
710 /* b15 : word88_bit15 */
711 /* b14 : ultraDMAMode6Selected */
712 /* b13 : ultraDMAMode5Selected */
713 /* b12 : ultraDMAMode4Selected */
714 /* b11 : ultraDMAMode3Selected */
715 /* b10 : ultraDMAMode2Selected */
716 /* b9 : ultraDMAMode1Selected */
717 /* b8 : ultraDMAMode0Selected */
718 /* b7 : word88_bit7 */
719 /* b6 : ultraDMAMode6Supported */
720 /* b5 : ultraDMAMode5Supported */
721 /* b4 : ultraDMAMode4Supported */
722 /* b3 : ultraDMAMode3Supported */
723 /* b2 : ultraDMAMode2Supported */
724 /* b1 : ultraDMAMode1Supported */
725 /* b0 : ultraDMAMode0Supported */
726 bit16 timeToSecurityErase;
727 bit16 timeToEnhhancedSecurityErase;
728 bit16 currentAPMValue;
729 bit16 masterPasswordRevCode;
730 bit16 hardwareResetResult;
731 /* b15-b14: word93_bit15_14 */
732 /* b13 : deviceDetectedCBLIBbelow Vil */
733 /* b12-b8 : device1 HardwareResetResult */
734 /* b7-b0 : device0 HardwareResetResult */
735 bit16 currentAutoAccousticManagementValue;
736 /* b15-b8 : Vendor recommended value */
737 /* b7-b0 : current value */
738 bit16 word95_99[5]; /**< word85-99 of identify device information */
739 bit16 maxLBA0_15; /**< word100 of identify device information */
740 bit16 maxLBA16_31; /**< word101 of identify device information */
741 bit16 maxLBA32_47; /**< word102 of identify device information */
742 bit16 maxLBA48_63; /**< word103 of identify device information */
743 bit16 word104_107[4]; /**< word104-107 of identify device information */
744 bit16 namingAuthority;
745 /* b15-b12: NAA_bit0_3 */
746 /* b11-b0 : IEEE_OUI_bit12_23*/
747 bit16 namingAuthority1;
748 /* b15-b4 : IEEE_OUI_bit0_11 */
749 /* b3-b0 : uniqueID_bit32_35 */
750 bit16 uniqueID_bit16_31; /**< word110 of identify device information */
751 bit16 uniqueID_bit0_15; /**< word111 of identify device information */
752 bit16 word112_126[15];
753 bit16 removableMediaStatusNotificationFeature;
754 /* b15-b2 : word127_b16_2 */
755 /* b1-b0 : supported set see ATAPI6 spec */
756 bit16 securityStatus;
757 /* b15-b9 : word128_b15_9 */
758 /* b8 : securityLevel */
759 /* b7-b6 : word128_b7_6 */
760 /* b5 : enhancedSecurityEraseSupported */
761 /* b4 : securityCountExpired */
762 /* b3 : securityFrozen */
763 /* b2 : securityLocked */
764 /* b1 : securityEnabled */
765 /* b0 : securitySupported */
766 bit16 vendorSpecific[31];
768 /* b15 : word 160 supported */
769 /* b14 : word160_b14 */
770 /* b13 : cfaPowerRequired */
771 /* b12 : cfaPowerModeDisabled */
772 /* b11-b0 : maxCurrentInMa */
773 bit16 word161_175[15];
774 bit16 currentMediaSerialNumber[30];
775 bit16 word206_254[49]; /**< word206-254 of identify device information */
777 /* b15-b8 : cheksum */
778 /* b7-b0 : signature */
779 } agsaSATAIdentifyData_t;
784 /** \brief data structure describes an SSP Command INFORMATION UNIT
786 * data structure describes an SSP Command INFORMATION UNIT used for SSP command and is part of
789 * Currently, only CDB up to 16 bytes is supported. Additional CDB length is supported to 0 bytes..
792 typedef struct agsaSSPCmdInfoUnit_s
794 bit8 lun[8]; /* SCSI Logical Unit Number */
795 bit8 reserved1; /* reserved */
796 bit8 efb_tp_taskAttribute;
797 /* B7 : enabledFirstBurst */
798 /* B6-3 : taskPriority */
799 /* B2-0 : taskAttribute */
800 bit8 reserved2; /* reserved */
801 bit8 additionalCdbLen;
802 /* B7-2 : additionalCdbLen */
803 /* B1-0 : reserved */
804 bit8 cdb[16]; /* The SCSI CDB up to 16 bytes length */
805 } agsaSSPCmdInfoUnit_t;
807 #define SA_SSPCMD_GET_TASKATTRIB(pCmd) ((pCmd)->efb_tp_taskAttribute & 0x7)
810 /** \brief structure describes an SSP Response INFORMATION UNIT
812 * data structure describes an SSP Response INFORMATION UNIT used for SSP response to Command IU
813 * or Task IU and is part of the SSP frame
817 typedef struct agsaSSPResponseInfoUnit_s
819 bit8 reserved1[10]; /* reserved */
821 bit8 dataPres; /* which data is present */
822 /* B7-2 : reserved */
823 /* B1-0 : data Present */
824 bit8 status; /* SCSI status as define by SAM-3 */
825 bit8 reserved4[4]; /* reserved */
826 bit8 senseDataLen[4]; /* SCSI Sense Data length */
827 bit8 responsedataLen[4]; /* Response data length */
828 /* Follow by Response Data if any */
829 /* Follow by Sense Data if any */
830 } agsaSSPResponseInfoUnit_t;
833 typedef struct agsaSSPFrameFormat_s
835 bit8 frameType; /* frame type */
836 bit8 hdsa[3]; /* Hashed destination SAS Address */
838 bit8 hssa[3]; /* Hashed source SAS Address */
842 /* B7-5 : reserved */
843 /* B4-3 : TLR control*/
844 /* B2 : Retry Data Frames */
845 /* B1 : Retransmit */
846 /* B0 : Changing Data Pointer */
848 /* B7-2 : reserved */
849 /* B1-0 : Number of Fill bytes*/
852 bit8 tag[2]; /* CMD or TM tag */
853 bit8 tptt[2]; /* target port transfer tag */
854 bit8 dataOffset[4]; /* data offset */
856 } agsaSSPFrameFormat_t;
859 typedef struct agsaSSPOpenFrame_s
861 bit8 frameType; /* frame type */
862 /* B7 : Initiator Port */
863 /* B6-4 : Protocol */
864 /* B3-0 : Address Frame Type */
866 /* B7-4 : features */
867 /* B3-0 : connection rate */
868 bit8 initiatorConnTag[2]; /* Initiator connection tag */
869 bit8 dstSasAddr[8]; /* Destination SAS Address */
870 bit8 srcSasAddr[8]; /* Source SAS Address */
871 bit8 zoneSrcGroup; /* Zone source group */
872 bit8 pathwayBlockCount; /* pathway block count */
873 bit8 arbWaitTime[2]; /* Arbitration Wait Time */
874 bit8 moreCompatFeat[4]; /* More Compatibility Features */
876 } agsaSSPOpenFrame_t;
878 #define SA_SSPRESP_GET_SENSEDATALEN(pSSPResp) \
879 DMA_BEBIT32_TO_BIT32(*(bit32*)(pSSPResp)->senseDataLen)
881 #define SA_SSPRESP_GET_RESPONSEDATALEN(pSSPResp) \
882 DMA_BEBIT32_TO_BIT32(*(bit32*)(pSSPResp)->responsedataLen)
884 #define SA_SSPRESP_GET_DATAPRES(pSSPResp) ((pSSPResp)->dataPres & 0x3)
886 /** \brief structure describes a SAS SSP Task Management command request
888 * The agsaSSPScsiTaskMgntReq_t data structure describes a SAS SSP Task Management command request sent by the
889 * initiator or received by the target.
891 * The response to Task Management is specified by agsaSSPResponseInfoUnit_t.
893 * This data structure is one instance of the generic request issued to saSSPStart() and is passed
894 * as an agsaSASRequestBody_t
897 typedef struct agsaSSPScsiTaskMgntReq_s
899 bit8 lun[8]; /* SCSI Logical Unit Number */
900 bit16 reserved1; /* reserved */
901 bit8 taskMgntFunction; /* task management function code */
902 bit8 reserved2; /* reserved */
903 bit16 tagOfTaskToBeManaged; /* Tag/context of task to be managed */
904 bit16 reserved3; /* reserved */
905 bit32 reserved4[3]; /* reserved */
906 bit32 tmOption; /* Not part of SSP TMF IU */
907 /* B7-2 : reserved */
909 /* B0 : ADS_OPTION */
910 } agsaSSPScsiTaskMgntReq_t;
913 /** \brief data structure describes the first four bytes of the SMP frame.
915 * The agsaSMPFrameHeader_t data structure describes the first four bytes of the SMP frame.
920 typedef struct agsaSMPFrameHeader_s
922 bit8 smpFrameType; /* The first byte of SMP frame represents the SMP FRAME TYPE */
923 bit8 smpFunction; /* The second byte of the SMP frame represents the SMP FUNCTION */
924 bit8 smpFunctionResult; /* The third byte of SMP frame represents FUNCTION RESULT of the SMP response. */
925 bit8 smpReserved; /* reserved */
926 } agsaSMPFrameHeader_t;
928 /****************************************************************
929 * report general response
930 ****************************************************************/
931 #define SA_REPORT_GENERAL_CONFIGURING_BIT 0x2
932 #define SA_REPORT_GENERAL_CONFIGURABLE_BIT 0x1
934 typedef struct agsaSmpRespReportGeneral_s
936 bit8 expanderChangeCount16[2];
937 bit8 expanderRouteIndexes16[2];
940 bit8 configuring_configurable;
941 /* B7-2 : reserved */
942 /* B1 : configuring */
943 /* B0 : configurable */
945 } agsaSmpRespReportGeneral_t;
947 #define SA_REPORT_GENERAL_IS_CONFIGURING(pResp) \
948 (((pResp)->configuring_configurable & SA_REPORT_GENERAL_CONFIGURING_BIT) == \
949 SA_REPORT_GENERAL_CONFIGURING_BIT)
951 #define SA_REPORT_GENERAL_IS_CONFIGURABLE(pResp) \
952 (((pResp)->configuring_configurable & SA_REPORT_GENERAL_CONFIGURABLE_BIT) == \
953 SA_REPORT_GENERAL_CONFIGURABLE_BIT)
955 #define SA_REPORT_GENERAL_GET_ROUTEINDEXES(pResp) \
956 DMA_BEBIT16_TO_BIT16(*(bit16 *)((pResp)->expanderRouteIndexes16))
958 /****************************************************************
959 * report manufacturer info response
960 ****************************************************************/
961 typedef struct agsaSmpRespReportManufactureInfo_s
964 bit8 vendorIdentification[8];
965 bit8 productIdentification[16];
966 bit8 productRevisionLevel[4];
967 bit8 vendorSpecific[20];
968 } agsaSmpRespReportManufactureInfo_t;
970 /****************************************************************
972 ****************************************************************/
973 typedef struct agsaSmpReqDiscover_s
980 } agsaSmpReqDiscover_t;
982 /****************************************************************
984 ****************************************************************/
985 typedef struct agsaSmpRespDiscover_s
991 bit8 attachedDeviceType;
993 /* B6-4 : attachedDeviceType */
994 /* B3-0 : reserved */
995 bit8 negotiatedPhyLinkRate;
996 /* B7-4 : reserved */
997 /* B3-0 : negotiatedPhyLinkRate */
998 bit8 attached_Ssp_Stp_Smp_Sata_Initiator;
999 /* B7-4 : reserved */
1000 /* B3 : attachedSspInitiator */
1001 /* B2 : attachedStpInitiator */
1002 /* B1 : attachedSmpInitiator */
1003 /* B0 : attachedSataHost */
1004 bit8 attached_SataPS_Ssp_Stp_Smp_Sata_Target;
1005 /* B7 : attachedSataPortSelector */
1006 /* B6-4 : reserved */
1007 /* B3 : attachedSspTarget */
1008 /* B2 : attachedStpTarget */
1009 /* B1 : attachedSmpTarget */
1010 /* B0 : attachedSatadevice */
1011 bit8 sasAddressHi[4];
1012 bit8 sasAddressLo[4];
1013 bit8 attachedSasAddressHi[4];
1014 bit8 attachedSasAddressLo[4];
1015 bit8 attachedPhyIdentifier;
1017 bit8 programmedAndHardware_MinPhyLinkRate;
1018 /* B7-4 : programmedMinPhyLinkRate */
1019 /* B3-0 : hardwareMinPhyLinkRate */
1020 bit8 programmedAndHardware_MaxPhyLinkRate;
1021 /* B7-4 : programmedMaxPhyLinkRate */
1022 /* B3-0 : hardwareMaxPhyLinkRate */
1023 bit8 phyChangeCount;
1024 bit8 virtualPhy_partialPathwayTimeout;
1025 /* B7 : virtualPhy*/
1026 /* B6-4 : reserved */
1027 /* B3-0 : partialPathwayTimeout */
1028 bit8 routingAttribute;
1029 /* B7-4 : reserved */
1030 /* B3-0 : routingAttribute */
1032 bit8 vendorSpecific[2];
1033 } agsaSmpRespDiscover_t;
1035 #define SA_DISCRSP_SSP_BIT 0x08
1036 #define SA_DISCRSP_STP_BIT 0x04
1037 #define SA_DISCRSP_SMP_BIT 0x02
1038 #define SA_DISCRSP_SATA_BIT 0x01
1040 #define SA_DISCRSP_SATA_PS_BIT 0x80
1042 #define SA_DISCRSP_GET_ATTACHED_DEVTYPE(pResp) \
1043 (((pResp)->attachedDeviceType & 0x70) >> 4)
1044 #define SA_DISCRSP_GET_LINKRATE(pResp) \
1045 ((pResp)->negotiatedPhyLinkRate & 0x0F)
1047 #define SA_DISCRSP_IS_SSP_INITIATOR(pResp) \
1048 (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & SA_DISCRSP_SSP_BIT) == SA_DISCRSP_SSP_BIT)
1049 #define SA_DISCRSP_IS_STP_INITIATOR(pResp) \
1050 (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & SA_DISCRSP_STP_BIT) == SA_DISCRSP_STP_BIT)
1051 #define SA_DISCRSP_IS_SMP_INITIATOR(pResp) \
1052 (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & SA_DISCRSP_SMP_BIT) == SA_DISCRSP_SMP_BIT)
1053 #define SA_DISCRSP_IS_SATA_HOST(pResp) \
1054 (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & SA_DISCRSP_SATA_BIT) == SA_DISCRSP_SATA_BIT)
1056 #define SA_DISCRSP_IS_SSP_TARGET(pResp) \
1057 (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & SA_DISCRSP_SSP_BIT) == SA_DISCRSP_SSP_BIT)
1058 #define SA_DISCRSP_IS_STP_TARGET(pResp) \
1059 (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & SA_DISCRSP_STP_BIT) == SA_DISCRSP_STP_BIT)
1060 #define SA_DISCRSP_IS_SMP_TARGET(pResp) \
1061 (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & SA_DISCRSP_SMP_BIT) == SA_DISCRSP_SMP_BIT)
1062 #define SA_DISCRSP_IS_SATA_DEVICE(pResp) \
1063 (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & SA_DISCRSP_SATA_BIT) == SA_DISCRSP_SATA_BIT)
1064 #define SA_DISCRSP_IS_SATA_PORTSELECTOR(pResp) \
1065 (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & SA_DISCRSP_SATA_PS_BIT) == SA_DISCRSP_SATA_PS_BIT)
1067 #define SA_DISCRSP_GET_SAS_ADDRESSHI(pResp) \
1068 DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->sasAddressHi)
1069 #define SA_DISCRSP_GET_SAS_ADDRESSLO(pResp) \
1070 DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->sasAddressLo)
1072 #define SA_DISCRSP_GET_ATTACHED_SAS_ADDRESSHI(pResp) \
1073 DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->attachedSasAddressHi)
1074 #define SA_DISCRSP_GET_ATTACHED_SAS_ADDRESSLO(pResp) \
1075 DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->attachedSasAddressLo)
1077 #define SA_DISCRSP_VIRTUALPHY_BIT 0x80
1078 #define SA_DISCRSP_IS_VIRTUALPHY(pResp) \
1079 (((pResp)->virtualPhy_partialPathwayTimeout & SA_DISCRSP_VIRTUALPHY_BIT) == SA_DISCRSP_VIRTUALPHY_BIT)
1081 #define SA_DISCRSP_GET_ROUTINGATTRIB(pResp) \
1082 ((pResp)->routingAttribute & 0x0F)
1084 /****************************************************************
1085 * report route table request
1086 ****************************************************************/
1087 typedef struct agsaSmpReqReportRouteTable_s
1090 bit8 expanderRouteIndex16[20];
1094 } agsaSmpReqReportRouteTable_t;
1096 /****************************************************************
1097 * report route response
1098 ****************************************************************/
1099 typedef struct agsaSmpRespReportRouteTable_s
1102 bit8 expanderRouteIndex16[2];
1107 /* B7 : expander route entry disabled */
1108 /* B6-0 : reserved */
1110 bit8 routedSasAddressHi32[4];
1111 bit8 routedSasAddressLo32[4];
1113 } agsaSmpRespReportRouteTable_t;
1115 /****************************************************************
1116 * configure route information request
1117 ****************************************************************/
1118 typedef struct agsaSmpReqConfigureRouteInformation_s
1121 bit8 expanderRouteIndex[2];
1125 bit8 disabledBit_reserved4;
1127 bit8 routedSasAddressHi[4];
1128 bit8 routedSasAddressLo[4];
1130 } agsaSmpReqConfigureRouteInformation_t;
1132 /****************************************************************
1133 * report Phy Sata request
1134 ****************************************************************/
1135 typedef struct agsaSmpReqReportPhySata_s
1141 } agsaSmpReqReportPhySata_t;
1143 /****************************************************************
1144 * report Phy Sata response
1145 ****************************************************************/
1146 typedef struct agsaSmpRespReportPhySata_s
1152 bit8 affiliations_sup_valid;
1153 /* b7-2 : reserved */
1154 /* b1 : Affiliations supported */
1155 /* b0 : Affiliation valid */
1157 bit8 stpSasAddressHi[4];
1158 bit8 stpSasAddressLo[4];
1159 bit8 regDevToHostFis[20];
1161 bit8 affiliatedStpInitiatorSasAddressHi[4];
1162 bit8 affiliatedStpInitiatorSasAddressLo[4];
1163 } agsaSmpRespReportPhySata_t;
1165 /****************************************************************
1166 * Phy Control request
1167 ****************************************************************/
1168 typedef struct agsaSmpReqPhyControl_s
1174 bit8 updatePartialPathwayTOValue;
1175 /* b7-1 : reserved */
1176 /* b0 : update partial pathway timeout value */
1178 bit8 programmedMinPhysicalLinkRate;
1179 /* b7-4 : programmed Minimum Physical Link Rate*/
1180 /* b3-0 : reserved */
1181 bit8 programmedMaxPhysicalLinkRate;
1182 /* b7-4 : programmed Maximum Physical Link Rate*/
1183 /* b3-0 : reserved */
1185 bit8 partialPathwayTOValue;
1186 /* b7-4 : reserved */
1187 /* b3-0 : partial Pathway TO Value */
1189 } agsaSmpReqPhyControl_t;
1194 #endif /*__SASPEC_H__ */