2 * Copyright (c) 2010-2015 Solarflare Communications Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * The views and conclusions contained in the software and documentation are
30 * those of the authors and should not be interpreted as representing official
31 * policies, either expressed or implied, of the FreeBSD Project.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/types.h>
38 #include <sys/limits.h>
39 #include <net/ethernet.h>
40 #include <net/if_dl.h>
42 #include "common/efx.h"
46 static int sfxge_phy_cap_mask(struct sfxge_softc *, int, uint32_t *);
49 sfxge_mac_stat_update(struct sfxge_softc *sc)
51 struct sfxge_port *port = &sc->port;
52 efsys_mem_t *esmp = &(port->mac_stats.dma_buf);
57 SFXGE_PORT_LOCK_ASSERT_OWNED(port);
59 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) {
65 if (now - port->mac_stats.update_time < hz) {
70 port->mac_stats.update_time = now;
72 /* If we're unlucky enough to read statistics wduring the DMA, wait
73 * up to 10ms for it to finish (typically takes <500us) */
74 for (count = 0; count < 100; ++count) {
75 EFSYS_PROBE1(wait, unsigned int, count);
77 /* Try to update the cached counters */
78 if ((rc = efx_mac_stats_update(sc->enp, esmp,
79 port->mac_stats.decode_buf, NULL)) != EAGAIN)
91 sfxge_port_update_stats(struct sfxge_softc *sc)
96 SFXGE_PORT_LOCK(&sc->port);
98 /* Ignore error and use old values */
99 (void)sfxge_mac_stat_update(sc);
102 mac_stats = (uint64_t *)sc->port.mac_stats.decode_buf;
104 ifp->if_ipackets = mac_stats[EFX_MAC_RX_PKTS];
105 ifp->if_ierrors = mac_stats[EFX_MAC_RX_ERRORS];
106 ifp->if_opackets = mac_stats[EFX_MAC_TX_PKTS];
107 ifp->if_oerrors = mac_stats[EFX_MAC_TX_ERRORS];
109 mac_stats[EFX_MAC_TX_SGL_COL_PKTS] +
110 mac_stats[EFX_MAC_TX_MULT_COL_PKTS] +
111 mac_stats[EFX_MAC_TX_EX_COL_PKTS] +
112 mac_stats[EFX_MAC_TX_LATE_COL_PKTS];
113 ifp->if_ibytes = mac_stats[EFX_MAC_RX_OCTETS];
114 ifp->if_obytes = mac_stats[EFX_MAC_TX_OCTETS];
115 /* if_imcasts is maintained in net/if_ethersubr.c */
117 mac_stats[EFX_MAC_TX_MULTICST_PKTS] +
118 mac_stats[EFX_MAC_TX_BRDCST_PKTS];
119 /* if_iqdrops is maintained in net/if_ethersubr.c */
120 /* if_noproto is maintained in net/if_ethersubr.c */
122 SFXGE_PORT_UNLOCK(&sc->port);
126 sfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS)
128 struct sfxge_softc *sc = arg1;
129 unsigned int id = arg2;
133 SFXGE_PORT_LOCK(&sc->port);
134 if ((rc = sfxge_mac_stat_update(sc)) == 0)
135 val = ((uint64_t *)sc->port.mac_stats.decode_buf)[id];
136 SFXGE_PORT_UNLOCK(&sc->port);
139 rc = SYSCTL_OUT(req, &val, sizeof(val));
144 sfxge_mac_stat_init(struct sfxge_softc *sc)
146 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
147 struct sysctl_oid_list *stat_list;
151 stat_list = SYSCTL_CHILDREN(sc->stats_node);
153 /* Initialise the named stats */
154 for (id = 0; id < EFX_MAC_NSTATS; id++) {
155 name = efx_mac_stat_name(sc->enp, id);
158 OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD,
159 sc, id, sfxge_mac_stat_handler, "Q",
164 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
167 sfxge_port_wanted_fc(struct sfxge_softc *sc)
169 struct ifmedia_entry *ifm = sc->media.ifm_cur;
171 if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO))
172 return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE);
173 return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) |
174 ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0));
178 sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
180 unsigned int wanted_fc, link_fc;
182 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
183 return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) |
184 ((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0);
187 #else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */
190 sfxge_port_wanted_fc(struct sfxge_softc *sc)
192 return (sc->port.wanted_fc);
196 sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
202 sfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS)
204 struct sfxge_softc *sc;
205 struct sfxge_port *port;
212 if (req->newptr != NULL) {
213 if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0)
216 SFXGE_PORT_LOCK(port);
218 if (port->wanted_fc != fcntl) {
219 if (port->init_state == SFXGE_PORT_STARTED)
220 error = efx_mac_fcntl_set(sc->enp,
224 port->wanted_fc = fcntl;
227 SFXGE_PORT_UNLOCK(port);
229 SFXGE_PORT_LOCK(port);
230 fcntl = port->wanted_fc;
231 SFXGE_PORT_UNLOCK(port);
233 error = SYSCTL_OUT(req, &fcntl, sizeof(fcntl));
240 sfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS)
242 struct sfxge_softc *sc;
243 struct sfxge_port *port;
244 unsigned int wanted_fc, link_fc;
249 SFXGE_PORT_LOCK(port);
250 if (__predict_true(port->init_state == SFXGE_PORT_STARTED) &&
252 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
255 SFXGE_PORT_UNLOCK(port);
257 return (SYSCTL_OUT(req, &link_fc, sizeof(link_fc)));
260 #endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */
262 static const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = {
263 [EFX_LINK_10HDX] = IF_Mbps(10),
264 [EFX_LINK_10FDX] = IF_Mbps(10),
265 [EFX_LINK_100HDX] = IF_Mbps(100),
266 [EFX_LINK_100FDX] = IF_Mbps(100),
267 [EFX_LINK_1000HDX] = IF_Gbps(1),
268 [EFX_LINK_1000FDX] = IF_Gbps(1),
269 [EFX_LINK_10000FDX] = IF_Gbps(10),
270 [EFX_LINK_40000FDX] = IF_Gbps(40),
274 sfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode)
276 struct sfxge_port *port;
281 if (port->link_mode == mode)
284 port->link_mode = mode;
286 /* Push link state update to the OS */
287 link_state = (port->link_mode != EFX_LINK_DOWN ?
288 LINK_STATE_UP : LINK_STATE_DOWN);
289 if_initbaudrate(sc->ifnet, sfxge_link_baudrate[port->link_mode]);
290 if_link_state_change(sc->ifnet, link_state);
294 sfxge_mac_poll_work(void *arg, int npending)
296 struct sfxge_softc *sc;
298 struct sfxge_port *port;
299 efx_link_mode_t mode;
301 sc = (struct sfxge_softc *)arg;
305 SFXGE_PORT_LOCK(port);
307 if (__predict_false(port->init_state != SFXGE_PORT_STARTED))
310 /* This may sleep waiting for MCDI completion */
311 (void)efx_port_poll(enp, &mode);
312 sfxge_mac_link_update(sc, mode);
315 SFXGE_PORT_UNLOCK(port);
319 sfxge_mac_multicast_list_set(struct sfxge_softc *sc)
321 struct ifnet *ifp = sc->ifnet;
322 struct sfxge_port *port = &sc->port;
323 uint8_t *mcast_addr = port->mcast_addrs;
324 struct ifmultiaddr *ifma;
325 struct sockaddr_dl *sa;
328 mtx_assert(&port->lock, MA_OWNED);
330 port->mcast_count = 0;
332 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
333 if (ifma->ifma_addr->sa_family == AF_LINK) {
334 if (port->mcast_count == EFX_MAC_MULTICAST_LIST_MAX) {
335 device_printf(sc->dev,
336 "Too many multicast addresses\n");
341 sa = (struct sockaddr_dl *)ifma->ifma_addr;
342 memcpy(mcast_addr, LLADDR(sa), EFX_MAC_ADDR_LEN);
343 mcast_addr += EFX_MAC_ADDR_LEN;
347 if_maddr_runlock(ifp);
350 rc = efx_mac_multicast_list_set(sc->enp, port->mcast_addrs,
353 device_printf(sc->dev,
354 "Cannot set multicast address list\n");
361 sfxge_mac_filter_set_locked(struct sfxge_softc *sc)
363 struct ifnet *ifp = sc->ifnet;
364 struct sfxge_port *port = &sc->port;
365 boolean_t all_mulcst;
368 mtx_assert(&port->lock, MA_OWNED);
370 all_mulcst = !!(ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI));
372 rc = sfxge_mac_multicast_list_set(sc);
373 /* Fallback to all multicast if cannot set multicast list */
377 rc = efx_mac_filter_set(sc->enp, !!(ifp->if_flags & IFF_PROMISC),
378 (port->mcast_count > 0), all_mulcst, B_TRUE);
384 sfxge_mac_filter_set(struct sfxge_softc *sc)
386 struct sfxge_port *port = &sc->port;
389 SFXGE_PORT_LOCK(port);
391 * The function may be called without softc_lock held in the
392 * case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler
393 * checks IFF_DRV_RUNNING flag which implies port started, but
394 * it is not guaranteed to remain. softc_lock shared lock can't
395 * be held in the case of these ioctls processing, since it
396 * results in failure where kernel complains that non-sleepable
397 * lock is held in sleeping thread. Both problems are repeatable
398 * on LAG with LACP proto bring up.
400 if (__predict_true(port->init_state == SFXGE_PORT_STARTED))
401 rc = sfxge_mac_filter_set_locked(sc);
404 SFXGE_PORT_UNLOCK(port);
409 sfxge_port_stop(struct sfxge_softc *sc)
411 struct sfxge_port *port;
417 SFXGE_PORT_LOCK(port);
419 KASSERT(port->init_state == SFXGE_PORT_STARTED,
420 ("port not started"));
422 port->init_state = SFXGE_PORT_INITIALIZED;
424 port->mac_stats.update_time = 0;
426 /* This may call MCDI */
427 (void)efx_mac_drain(enp, B_TRUE);
429 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
431 port->link_mode = EFX_LINK_UNKNOWN;
433 /* Destroy the common code port object. */
436 efx_filter_fini(enp);
438 SFXGE_PORT_UNLOCK(port);
442 sfxge_port_start(struct sfxge_softc *sc)
444 uint8_t mac_addr[ETHER_ADDR_LEN];
445 struct ifnet *ifp = sc->ifnet;
446 struct sfxge_port *port;
450 uint32_t phy_cap_mask;
455 SFXGE_PORT_LOCK(port);
457 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
458 ("port not initialized"));
460 /* Initialise the required filtering */
461 if ((rc = efx_filter_init(enp)) != 0)
462 goto fail_filter_init;
464 /* Initialize the port object in the common code. */
465 if ((rc = efx_port_init(sc->enp)) != 0)
469 pdu = EFX_MAC_PDU(ifp->if_mtu);
470 if ((rc = efx_mac_pdu_set(enp, pdu)) != 0)
473 if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE))
477 /* Set the unicast address */
479 bcopy(LLADDR((struct sockaddr_dl *)ifp->if_addr->ifa_addr),
480 mac_addr, sizeof(mac_addr));
481 if_addr_runlock(ifp);
482 if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0)
485 sfxge_mac_filter_set_locked(sc);
487 /* Update MAC stats by DMA every second */
488 if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf,
489 1000, B_FALSE)) != 0)
492 if ((rc = efx_mac_drain(enp, B_FALSE)) != 0)
495 if ((rc = sfxge_phy_cap_mask(sc, sc->media.ifm_cur->ifm_media,
496 &phy_cap_mask)) != 0)
499 if ((rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask)) != 0)
502 port->init_state = SFXGE_PORT_STARTED;
504 /* Single poll in case there were missing initial events */
505 SFXGE_PORT_UNLOCK(port);
506 sfxge_mac_poll_work(sc, 0);
512 (void)efx_mac_drain(enp, B_TRUE);
514 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
522 efx_filter_fini(enp);
524 SFXGE_PORT_UNLOCK(port);
530 sfxge_phy_stat_update(struct sfxge_softc *sc)
532 struct sfxge_port *port = &sc->port;
533 efsys_mem_t *esmp = &port->phy_stats.dma_buf;
538 SFXGE_PORT_LOCK_ASSERT_OWNED(port);
540 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) {
546 if (now - port->phy_stats.update_time < hz) {
551 port->phy_stats.update_time = now;
553 /* If we're unlucky enough to read statistics wduring the DMA, wait
554 * up to 10ms for it to finish (typically takes <500us) */
555 for (count = 0; count < 100; ++count) {
556 EFSYS_PROBE1(wait, unsigned int, count);
558 /* Synchronize the DMA memory for reading */
559 bus_dmamap_sync(esmp->esm_tag, esmp->esm_map,
560 BUS_DMASYNC_POSTREAD);
562 /* Try to update the cached counters */
563 if ((rc = efx_phy_stats_update(sc->enp, esmp,
564 port->phy_stats.decode_buf)) != EAGAIN)
576 sfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS)
578 struct sfxge_softc *sc = arg1;
579 unsigned int id = arg2;
583 SFXGE_PORT_LOCK(&sc->port);
584 if ((rc = sfxge_phy_stat_update(sc)) == 0)
585 val = ((uint32_t *)sc->port.phy_stats.decode_buf)[id];
586 SFXGE_PORT_UNLOCK(&sc->port);
589 rc = SYSCTL_OUT(req, &val, sizeof(val));
594 sfxge_phy_stat_init(struct sfxge_softc *sc)
596 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
597 struct sysctl_oid_list *stat_list;
600 uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask;
602 stat_list = SYSCTL_CHILDREN(sc->stats_node);
604 /* Initialise the named stats */
605 for (id = 0; id < EFX_PHY_NSTATS; id++) {
606 if (!(stat_mask & ((uint64_t)1 << id)))
608 name = efx_phy_stat_name(sc->enp, id);
611 OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RD,
612 sc, id, sfxge_phy_stat_handler,
613 id == EFX_PHY_STAT_OUI ? "IX" : "IU",
619 sfxge_port_fini(struct sfxge_softc *sc)
621 struct sfxge_port *port;
625 esmp = &port->mac_stats.dma_buf;
627 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
628 ("Port not initialized"));
630 port->init_state = SFXGE_PORT_UNINITIALIZED;
632 port->link_mode = EFX_LINK_UNKNOWN;
634 /* Finish with PHY DMA memory */
635 sfxge_dma_free(&port->phy_stats.dma_buf);
636 free(port->phy_stats.decode_buf, M_SFXGE);
638 sfxge_dma_free(esmp);
639 free(port->mac_stats.decode_buf, M_SFXGE);
641 SFXGE_PORT_LOCK_DESTROY(port);
647 sfxge_port_init(struct sfxge_softc *sc)
649 struct sfxge_port *port;
650 struct sysctl_ctx_list *sysctl_ctx;
651 struct sysctl_oid *sysctl_tree;
652 efsys_mem_t *mac_stats_buf, *phy_stats_buf;
656 mac_stats_buf = &port->mac_stats.dma_buf;
657 phy_stats_buf = &port->phy_stats.dma_buf;
659 KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED,
660 ("Port already initialized"));
664 SFXGE_PORT_LOCK_INIT(port, device_get_nameunit(sc->dev));
666 DBGPRINT(sc->dev, "alloc PHY stats");
667 port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t),
668 M_SFXGE, M_WAITOK | M_ZERO);
669 if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0)
671 sfxge_phy_stat_init(sc);
673 DBGPRINT(sc->dev, "init sysctl");
674 sysctl_ctx = device_get_sysctl_ctx(sc->dev);
675 sysctl_tree = device_get_sysctl_tree(sc->dev);
677 #ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
678 /* If flow control cannot be configured or reported through
679 * ifmedia, provide sysctls for it. */
680 port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
681 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
682 "wanted_fc", CTLTYPE_UINT|CTLFLAG_RW, sc, 0,
683 sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode");
684 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
685 "link_fc", CTLTYPE_UINT|CTLFLAG_RD, sc, 0,
686 sfxge_port_link_fc_handler, "IU", "link flow control mode");
689 DBGPRINT(sc->dev, "alloc MAC stats");
690 port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t),
691 M_SFXGE, M_WAITOK | M_ZERO);
692 if ((rc = sfxge_dma_alloc(sc, EFX_MAC_STATS_SIZE, mac_stats_buf)) != 0)
694 sfxge_mac_stat_init(sc);
696 port->init_state = SFXGE_PORT_INITIALIZED;
698 DBGPRINT(sc->dev, "success");
702 free(port->mac_stats.decode_buf, M_SFXGE);
703 sfxge_dma_free(phy_stats_buf);
705 free(port->phy_stats.decode_buf, M_SFXGE);
706 SFXGE_PORT_LOCK_DESTROY(port);
708 DBGPRINT(sc->dev, "failed %d", rc);
712 static const int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = {
713 [EFX_PHY_MEDIA_CX4] = {
714 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4,
716 [EFX_PHY_MEDIA_KX4] = {
717 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4,
719 [EFX_PHY_MEDIA_XFP] = {
720 /* Don't know the module type, but assume SR for now. */
721 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
723 [EFX_PHY_MEDIA_QSFP_PLUS] = {
724 /* Don't know the module type, but assume SR for now. */
725 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
726 [EFX_LINK_40000FDX] = IFM_ETHER | IFM_FDX | IFM_40G_CR4,
728 [EFX_PHY_MEDIA_SFP_PLUS] = {
729 /* Don't know the module type, but assume SX/SR for now. */
730 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX,
731 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
733 [EFX_PHY_MEDIA_BASE_T] = {
734 [EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T,
735 [EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T,
736 [EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX,
737 [EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX,
738 [EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T,
739 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T,
740 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T,
745 sfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
747 struct sfxge_softc *sc;
748 efx_phy_media_type_t medium_type;
749 efx_link_mode_t mode;
752 SFXGE_ADAPTER_LOCK(sc);
754 ifmr->ifm_status = IFM_AVALID;
755 ifmr->ifm_active = IFM_ETHER;
757 if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) {
758 ifmr->ifm_status |= IFM_ACTIVE;
760 efx_phy_media_type_get(sc->enp, &medium_type);
761 mode = sc->port.link_mode;
762 ifmr->ifm_active |= sfxge_link_mode[medium_type][mode];
763 ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc);
766 SFXGE_ADAPTER_UNLOCK(sc);
769 static efx_phy_cap_type_t
770 sfxge_link_mode_to_phy_cap(efx_link_mode_t mode)
774 return (EFX_PHY_CAP_10HDX);
776 return (EFX_PHY_CAP_10FDX);
777 case EFX_LINK_100HDX:
778 return (EFX_PHY_CAP_100HDX);
779 case EFX_LINK_100FDX:
780 return (EFX_PHY_CAP_100FDX);
781 case EFX_LINK_1000HDX:
782 return (EFX_PHY_CAP_1000HDX);
783 case EFX_LINK_1000FDX:
784 return (EFX_PHY_CAP_1000FDX);
785 case EFX_LINK_10000FDX:
786 return (EFX_PHY_CAP_10000FDX);
787 case EFX_LINK_40000FDX:
788 return (EFX_PHY_CAP_40000FDX);
790 EFSYS_ASSERT(B_FALSE);
791 return (EFX_PHY_CAP_INVALID);
796 sfxge_phy_cap_mask(struct sfxge_softc *sc, int ifmedia, uint32_t *phy_cap_mask)
798 /* Get global options (duplex), type and subtype bits */
799 int ifmedia_masked = ifmedia & (IFM_GMASK | IFM_NMASK | IFM_TMASK);
800 efx_phy_media_type_t medium_type;
801 boolean_t mode_found = B_FALSE;
802 uint32_t cap_mask, mode_cap_mask;
803 efx_link_mode_t mode;
804 efx_phy_cap_type_t phy_cap;
806 efx_phy_media_type_get(sc->enp, &medium_type);
807 if (medium_type >= nitems(sfxge_link_mode)) {
808 if_printf(sc->ifnet, "unexpected media type %d\n", medium_type);
812 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
814 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) {
815 if (ifmedia_masked == sfxge_link_mode[medium_type][mode]) {
823 * If media is not in the table, it must be IFM_AUTO.
825 KASSERT((cap_mask & (1 << EFX_PHY_CAP_AN)) &&
826 ifmedia_masked == (IFM_ETHER | IFM_AUTO),
827 ("%s: no mode for media %#x", __func__, ifmedia));
828 *phy_cap_mask = (cap_mask & ~(1 << EFX_PHY_CAP_ASYM));
832 phy_cap = sfxge_link_mode_to_phy_cap(mode);
833 if (phy_cap == EFX_PHY_CAP_INVALID) {
835 "cannot map link mode %d to phy capability\n",
840 mode_cap_mask = (1 << phy_cap);
841 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN);
842 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
843 if (ifmedia & IFM_ETH_RXPAUSE)
844 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
845 if (!(ifmedia & IFM_ETH_TXPAUSE))
846 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_ASYM);
848 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
851 *phy_cap_mask = mode_cap_mask;
856 sfxge_media_change(struct ifnet *ifp)
858 struct sfxge_softc *sc;
859 struct ifmedia_entry *ifm;
861 uint32_t phy_cap_mask;
864 ifm = sc->media.ifm_cur;
866 SFXGE_ADAPTER_LOCK(sc);
868 if (!SFXGE_RUNNING(sc)) {
873 rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE);
877 if ((rc = sfxge_phy_cap_mask(sc, ifm->ifm_media, &phy_cap_mask)) != 0)
880 rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask);
882 SFXGE_ADAPTER_UNLOCK(sc);
887 int sfxge_port_ifmedia_init(struct sfxge_softc *sc)
889 efx_phy_media_type_t medium_type;
890 uint32_t cap_mask, mode_cap_mask;
891 efx_link_mode_t mode;
892 efx_phy_cap_type_t phy_cap;
893 int mode_ifm, best_mode_ifm = 0;
897 * We need port state to initialise the ifmedia list.
898 * It requires initialized NIC what is already done in
899 * sfxge_create() when resources are estimated.
901 if ((rc = efx_filter_init(sc->enp)) != 0)
903 if ((rc = efx_port_init(sc->enp)) != 0)
907 * Register ifconfig callbacks for querying and setting the
908 * link mode and link status.
910 ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change,
914 * Map firmware medium type and capabilities to ifmedia types.
915 * ifmedia does not distinguish between forcing the link mode
916 * and disabling auto-negotiation. 1000BASE-T and 10GBASE-T
917 * require AN even if only one link mode is enabled, and for
918 * 100BASE-TX it is useful even if the link mode is forced.
919 * Therefore we never disable auto-negotiation.
921 * Also enable and advertise flow control by default.
924 efx_phy_media_type_get(sc->enp, &medium_type);
925 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
927 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) {
928 phy_cap = sfxge_link_mode_to_phy_cap(mode);
929 if (phy_cap == EFX_PHY_CAP_INVALID)
932 mode_cap_mask = (1 << phy_cap);
933 mode_ifm = sfxge_link_mode[medium_type][mode];
935 if ((cap_mask & mode_cap_mask) && mode_ifm) {
936 /* No flow-control */
937 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
939 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
940 /* Respond-only. If using AN, we implicitly
941 * offer symmetric as well, but that doesn't
942 * mean we *have* to generate pause frames.
944 mode_ifm |= IFM_ETH_RXPAUSE;
945 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
948 mode_ifm |= IFM_ETH_TXPAUSE;
949 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
952 /* Link modes are numbered in order of speed,
953 * so assume the last one available is the best.
955 best_mode_ifm = mode_ifm;
959 if (cap_mask & (1 << EFX_PHY_CAP_AN)) {
960 /* Add autoselect mode. */
961 mode_ifm = IFM_ETHER | IFM_AUTO;
962 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
963 best_mode_ifm = mode_ifm;
966 if (best_mode_ifm != 0)
967 ifmedia_set(&sc->media, best_mode_ifm);
969 /* Now discard port state until interface is started. */
970 efx_port_fini(sc->enp);
972 efx_filter_fini(sc->enp);