4 * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #ifndef _DWC_OTGREG_H_
29 #define _DWC_OTGREG_H_
31 #define DOTG_GOTGCTL 0x0000
32 #define DOTG_GOTGINT 0x0004
33 #define DOTG_GAHBCFG 0x0008
34 #define DOTG_GUSBCFG 0x000C
35 #define DOTG_GRSTCTL 0x0010
36 #define DOTG_GINTSTS 0x0014
37 #define DOTG_GINTMSK 0x0018
38 #define DOTG_GRXSTSRD 0x001C
39 #define DOTG_GRXSTSRH 0x001C
40 #define DOTG_GRXSTSPD 0x0020
41 #define DOTG_GRXSTSPH 0x0020
42 #define DOTG_GRXFSIZ 0x0024
43 #define DOTG_GNPTXFSIZ 0x0028
44 #define DOTG_GNPTXSTS 0x002C
45 #define DOTG_GI2CCTL 0x0030
46 #define DOTG_GPVNDCTL 0x0034
47 #define DOTG_GGPIO 0x0038
48 #define DOTG_GUID 0x003C
49 #define DOTG_GSNPSID 0x0040
50 #define DOTG_GSNPSID_REV_2_80a 0x4f54280a /* RPi model B/RPi2 */
51 #define DOTG_GSNPSID_REV_3_10a 0x4f54310a /* ODROID-C1 */
52 #define DOTG_GHWCFG1 0x0044
53 #define DOTG_GHWCFG2 0x0048
54 #define DOTG_GHWCFG3 0x004C
55 #define DOTG_GHWCFG4 0x0050
56 #define DOTG_GLPMCFG 0x0054
57 #define DOTG_GPWRDN 0x0058
58 #define DOTG_GDFIFOCFG 0x005C
59 #define DOTG_GADPCTL 0x0060
61 #define DOTG_HPTXFSIZ 0x0100
62 /* start from 0x104, but fifo0 not exists */
63 #define DOTG_DPTXFSIZ(fifo) (0x0100 + (4*(fifo)))
64 #define DOTG_DIEPTXF(fifo) (0x0100 + (4*(fifo)))
66 #define DOTG_HCFG 0x0400
67 #define DOTG_HFIR 0x0404
68 #define DOTG_HFNUM 0x0408
69 #define DOTG_HPTXSTS 0x0410
70 #define DOTG_HAINT 0x0414
71 #define DOTG_HAINTMSK 0x0418
72 #define DOTG_HPRT 0x0440
74 #define DOTG_HCCHAR(ch) (0x0500 + (32*(ch)))
75 #define DOTG_HCSPLT(ch) (0x0504 + (32*(ch)))
76 #define DOTG_HCINT(ch) (0x0508 + (32*(ch)))
77 #define DOTG_HCINTMSK(ch) (0x050C + (32*(ch)))
78 #define DOTG_HCTSIZ(ch) (0x0510 + (32*(ch)))
79 #define DOTG_HCDMA(ch) (0x0514 + (32*(ch)))
80 #define DOTG_HCDMAI(ch) (0x0514 + (32*(ch)))
81 #define DOTG_HCDMAO(ch) (0x0514 + (32*(ch)))
82 #define DOTG_HCDMAB(ch) (0x051C + (32*(ch)))
85 #define DOTG_DCFG 0x0800
86 #define DOTG_DCTL 0x0804
87 #define DOTG_DSTS 0x0808
88 #define DOTG_DIEPMSK 0x0810
89 #define DOTG_DOEPMSK 0x0814
90 #define DOTG_DAINT 0x0818
91 #define DOTG_DAINTMSK 0x081C
92 #define DOTG_DTKNQR1 0x0820
93 #define DOTG_DTKNQR2 0x0824
94 #define DOTG_DVBUSDIS 0x0828
95 #define DOTG_DVBUSPULSE 0x082C
96 #define DOTG_DTHRCTL 0x0830
97 #define DOTG_DTKNQR4 0x0834
98 #define DOTG_DIEPEMPMSK 0x0834
99 #define DOTG_DEACHINT 0x0838
100 #define DOTG_DEACHINTMSK 0x083C
101 #define DOTG_DIEPEACHINTMSK(ch) (0x0840 + (4*(ch)))
102 #define DOTG_DOEPEACHINTMSK(ch) (0x0880 + (4*(ch)))
104 #define DOTG_DIEPCTL(ep) (0x0900 + (32*(ep)))
105 #define DOTG_DIEPINT(ep) (0x0908 + (32*(ep)))
106 #define DOTG_DIEPTSIZ(ep) (0x0910 + (32*(ep)))
107 #define DOTG_DIEPDMA(ep) (0x0914 + (32*(ep)))
108 #define DOTG_DTXFSTS(ep) (0x0918 + (32*(ep)))
109 #define DOTG_DIEPDMAB(ep) (0x091c + (32*(ep)))
111 #define DOTG_DOEPCTL(ep) (0x0B00 + (32*(ep)))
112 #define DOTG_DOEPFN(ep) (0x0B04 + (32*(ep)))
113 #define DOTG_DOEPINT(ep) (0x0B08 + (32*(ep)))
114 #define DOTG_DOEPTSIZ(ep) (0x0B10 + (32*(ep)))
115 #define DOTG_DOEPDMA(ep) (0x0B14 + (32*(ep)))
116 #define DOTG_DOEPDMAB(ep) (0x0B1c + (32*(ep)))
117 /* End Device Mode */
120 #define DOTG_CTL_STATUS 0x0800
121 #define DOTG_DMA0_INB_CHN0 0x0818
122 #define DOTG_DMA0_INB_CHN1 0x0820
123 #define DOTG_DMA0_INB_CHN2 0x0828
124 #define DOTG_DVBUSDIS 0x0828
125 #define DOTG_DVBUSPULSE 0x082c
126 #define DOTG_DMA0_INB_CHN3 0x0830
127 #define DOTG_DMA0_INB_CHN4 0x0838
128 #define DOTG_DMA0_INB_CHN5 0x0840
129 #define DOTG_DMA0_INB_CHN6 0x0848
130 #define DOTG_DMA0_INB_CHN7 0x0850
131 #define DOTG_DMA0_OUTB_CHN0 0x0858
132 #define DOTG_DMA0_OUTB_CHN1 0x0860
133 #define DOTG_DMA0_OUTB_CHN2 0x0868
134 #define DOTG_DMA0_OUTB_CHN3 0x0870
135 #define DOTG_DMA0_OUTB_CHN4 0x0878
136 #define DOTG_DMA0_OUTB_CHN5 0x0880
137 #define DOTG_DMA0_OUTB_CHN6 0x0888
138 #define DOTG_DMA0_OUTB_CHN7 0x0890
141 /* Power and clock gating CSR */
143 #define DOTG_PCGCCTL 0x0E00
145 /* FIFO access registers (PIO-mode) */
147 #define DOTG_DFIFO(n) (0x1000 + (0x1000 * (n)))
149 #define GOTGCTL_CHIRP_ON (1<<27)
150 #define GOTGCTL_BSESVLD (1<<19)
151 #define GOTGCTL_ASESVLD (1<<18)
152 #define GOTGCTL_DBNCTIME (1<<17)
153 #define GOTGCTL_CONIDSTS (1<<16)
154 #define GOTGCTL_DEVHNPEN (1<<11)
155 #define GOTGCTL_HSTSETHNPEN (1<<10)
156 #define GOTGCTL_HNPREQ (1<<9)
157 #define GOTGCTL_HSTNEGSCS (1<<8)
158 #define GOTGCTL_SESREQ (1<<1)
159 #define GOTGCTL_SESREQSCS (1<<0)
161 #define GOTGCTL_DBNCEDONE (1<<19)
162 #define GOTGCTL_ADEVTOUTCHG (1<<18)
163 #define GOTGCTL_HSTNEGDET (1<<17)
164 #define GOTGCTL_HSTNEGSUCSTSCHG (1<<9)
165 #define GOTGCTL_SESREQSUCSTSCHG (1<<8)
166 #define GOTGCTL_SESENDDET (1<<2)
168 #define GAHBCFG_PTXFEMPLVL (1<<8)
169 #define GAHBCFG_NPTXFEMPLVL (1<<7)
170 #define GAHBCFG_DMAEN (1<<5)
171 #define GAHBCFG_HBSTLEN_MASK 0x0000001e
172 #define GAHBCFG_HBSTLEN_SHIFT 1
173 #define GAHBCFG_GLBLINTRMSK (1<<0)
175 #define GUSBCFG_CORRUPTTXPACKET (1<<31)
176 #define GUSBCFG_FORCEDEVMODE (1<<30)
177 #define GUSBCFG_FORCEHOSTMODE (1<<29)
178 #define GUSBCFG_NO_PULLUP (1<<27)
179 #define GUSBCFG_IC_USB_CAP (1<<26)
180 #define GUSBCFG_TERMSELDLPULSE (1<<22)
181 #define GUSBCFG_ULPIEXTVBUSINDICATOR (1<<21)
182 #define GUSBCFG_ULPIEXTVBUSDRV (1<<20)
183 #define GUSBCFG_ULPICLKSUSM (1<<19)
184 #define GUSBCFG_ULPIAUTORES (1<<18)
185 #define GUSBCFG_ULPIFSLS (1<<17)
186 #define GUSBCFG_OTGI2CSEL (1<<16)
187 #define GUSBCFG_PHYLPWRCLKSEL (1<<15)
188 #define GUSBCFG_USBTRDTIM_MASK 0x00003c00
189 #define GUSBCFG_USBTRDTIM_SHIFT 10
190 #define GUSBCFG_TRD_TIM_SET(x) (((x) & 15) << 10)
191 #define GUSBCFG_HNPCAP (1<<9)
192 #define GUSBCFG_SRPCAP (1<<8)
193 #define GUSBCFG_DDRSEL (1<<7)
194 #define GUSBCFG_PHYSEL (1<<6)
195 #define GUSBCFG_FSINTF (1<<5)
196 #define GUSBCFG_ULPI_UTMI_SEL (1<<4)
197 #define GUSBCFG_PHYIF (1<<3)
198 #define GUSBCFG_TOUTCAL_MASK 0x00000007
199 #define GUSBCFG_TOUTCAL_SHIFT 0
202 #define DOTG_GGPIO_NOVBUSSENS (1 << 21)
203 #define DOTG_GGPIO_SOFOUTEN (1 << 20)
204 #define DOTG_GGPIO_VBUSBSEN (1 << 19)
205 #define DOTG_GGPIO_VBUSASEN (1 << 18)
206 #define DOTG_GGPIO_I2CPADEN (1 << 17)
207 #define DOTG_GGPIO_PWRDWN (1 << 16)
209 #define GRSTCTL_AHBIDLE (1<<31)
210 #define GRSTCTL_DMAREQ (1<<30)
211 #define GRSTCTL_TXFNUM_MASK 0x000007c0
212 #define GRSTCTL_TXFNUM_SHIFT 6
213 #define GRSTCTL_TXFIFO(n) (((n) & 31) << 6)
214 #define GRSTCTL_TXFFLSH (1<<5)
215 #define GRSTCTL_RXFFLSH (1<<4)
216 #define GRSTCTL_INTKNQFLSH (1<<3)
217 #define GRSTCTL_FRMCNTRRST (1<<2)
218 #define GRSTCTL_HSFTRST (1<<1)
219 #define GRSTCTL_CSFTRST (1<<0)
221 #define GINTSTS_WKUPINT (1<<31)
222 #define GINTSTS_SESSREQINT (1<<30)
223 #define GINTSTS_DISCONNINT (1<<29)
224 #define GINTSTS_CONIDSTSCHNG (1<<28)
225 #define GINTSTS_LPM (1<<27)
226 #define GINTSTS_PTXFEMP (1<<26)
227 #define GINTSTS_HCHINT (1<<25)
228 #define GINTSTS_PRTINT (1<<24)
229 #define GINTSTS_RESETDET (1<<23)
230 #define GINTSTS_FETSUSP (1<<22)
231 #define GINTSTS_INCOMPLP (1<<21)
232 #define GINTSTS_INCOMPISOIN (1<<20)
233 #define GINTSTS_OEPINT (1<<19)
234 #define GINTSTS_IEPINT (1<<18)
235 #define GINTSTS_EPMIS (1<<17)
236 #define GINTSTS_RESTORE_DONE (1<<16)
237 #define GINTSTS_EOPF (1<<15)
238 #define GINTSTS_ISOOUTDROP (1<<14)
239 #define GINTSTS_ENUMDONE (1<<13)
240 #define GINTSTS_USBRST (1<<12)
241 #define GINTSTS_USBSUSP (1<<11)
242 #define GINTSTS_ERLYSUSP (1<<10)
243 #define GINTSTS_I2CINT (1<<9)
244 #define GINTSTS_ULPICKINT (1<<8)
245 #define GINTSTS_GOUTNAKEFF (1<<7)
246 #define GINTSTS_GINNAKEFF (1<<6)
247 #define GINTSTS_NPTXFEMP (1<<5)
248 #define GINTSTS_RXFLVL (1<<4)
249 #define GINTSTS_SOF (1<<3)
250 #define GINTSTS_OTGINT (1<<2)
251 #define GINTSTS_MODEMIS (1<<1)
252 #define GINTSTS_CURMOD (1<<0)
254 #define GINTMSK_WKUPINTMSK (1<<31)
255 #define GINTMSK_SESSREQINTMSK (1<<30)
256 #define GINTMSK_DISCONNINTMSK (1<<29)
257 #define GINTMSK_CONIDSTSCHNGMSK (1<<28)
258 #define GINTMSK_PTXFEMPMSK (1<<26)
259 #define GINTMSK_HCHINTMSK (1<<25)
260 #define GINTMSK_PRTINTMSK (1<<24)
261 #define GINTMSK_FETSUSPMSK (1<<22)
262 #define GINTMSK_INCOMPLPMSK (1<<21)
263 #define GINTMSK_INCOMPISOINMSK (1<<20)
264 #define GINTMSK_OEPINTMSK (1<<19)
265 #define GINTMSK_IEPINTMSK (1<<18)
266 #define GINTMSK_EPMISMSK (1<<17)
267 #define GINTMSK_EOPFMSK (1<<15)
268 #define GINTMSK_ISOOUTDROPMSK (1<<14)
269 #define GINTMSK_ENUMDONEMSK (1<<13)
270 #define GINTMSK_USBRSTMSK (1<<12)
271 #define GINTMSK_USBSUSPMSK (1<<11)
272 #define GINTMSK_ERLYSUSPMSK (1<<10)
273 #define GINTMSK_I2CINTMSK (1<<9)
274 #define GINTMSK_ULPICKINTMSK (1<<8)
275 #define GINTMSK_GOUTNAKEFFMSK (1<<7)
276 #define GINTMSK_GINNAKEFFMSK (1<<6)
277 #define GINTMSK_NPTXFEMPMSK (1<<5)
278 #define GINTMSK_RXFLVLMSK (1<<4)
279 #define GINTMSK_SOFMSK (1<<3)
280 #define GINTMSK_OTGINTMSK (1<<2)
281 #define GINTMSK_MODEMISMSK (1<<1)
282 #define GINTMSK_CURMODMSK (1<<0)
284 #define GRXSTSRH_PKTSTS_MASK 0x001e0000
285 #define GRXSTSRH_PKTSTS_SHIFT 17
286 #define GRXSTSRH_DPID_MASK 0x00018000
287 #define GRXSTSRH_DPID_SHIFT 15
288 #define GRXSTSRH_BCNT_MASK 0x00007ff0
289 #define GRXSTSRH_BCNT_SHIFT 4
290 #define GRXSTSRH_CHNUM_MASK 0x0000000f
291 #define GRXSTSRH_CHNUM_SHIFT 0
293 #define GRXSTSRD_FN_MASK 0x01e00000
294 #define GRXSTSRD_FN_GET(x) (((x) >> 21) & 15)
295 #define GRXSTSRD_FN_SHIFT 21
296 #define GRXSTSRD_PKTSTS_MASK 0x001e0000
297 #define GRXSTSRD_PKTSTS_SHIFT 17
298 #define GRXSTSRH_IN_DATA (2<<17)
299 #define GRXSTSRH_IN_COMPLETE (3<<17)
300 #define GRXSTSRH_DT_ERROR (5<<17)
301 #define GRXSTSRH_HALTED (7<<17)
302 #define GRXSTSRD_GLOB_OUT_NAK (1<<17)
303 #define GRXSTSRD_OUT_DATA (2<<17)
304 #define GRXSTSRD_OUT_COMPLETE (3<<17)
305 #define GRXSTSRD_STP_COMPLETE (4<<17)
306 #define GRXSTSRD_STP_DATA (6<<17)
307 #define GRXSTSRD_DPID_MASK 0x00018000
308 #define GRXSTSRD_DPID_SHIFT 15
309 #define GRXSTSRD_DPID_DATA0 (0<<15)
310 #define GRXSTSRD_DPID_DATA1 (2<<15)
311 #define GRXSTSRD_DPID_DATA2 (1<<15)
312 #define GRXSTSRD_DPID_MDATA (3<<15)
313 #define GRXSTSRD_BCNT_MASK 0x00007ff0
314 #define GRXSTSRD_BCNT_GET(x) (((x) >> 4) & 0x7FF)
315 #define GRXSTSRD_BCNT_SHIFT 4
316 #define GRXSTSRD_CHNUM_MASK 0x0000000f
317 #define GRXSTSRD_CHNUM_GET(x) ((x) & 15)
318 #define GRXSTSRD_CHNUM_SHIFT 0
320 #define GRXFSIZ_RXFDEP_MASK 0x0000ffff
321 #define GRXFSIZ_RXFDEP_SHIFT 0
323 #define GNPTXFSIZ_NPTXFDEP_MASK 0xffff0000
324 #define GNPTXFSIZ_NPTXFDEP_SHIFT 0
325 #define GNPTXFSIZ_NPTXFSTADDR_MASK 0x0000ffff
326 #define GNPTXFSIZ_NPTXFSTADDR_SHIFT 16
328 #define GNPTXSTS_NPTXQTOP_SHIFT 24
329 #define GNPTXSTS_NPTXQTOP_MASK 0x7f000000
330 #define GNPTXSTS_NPTXQSPCAVAIL_SHIFT 16
331 #define GNPTXSTS_NPTXQSPCAVAIL_MASK 0x00ff0000
332 #define GNPTXSTS_NPTXFSPCAVAIL_SHIFT 0
333 #define GNPTXSTS_NPTXFSPCAVAIL_MASK 0x0000ffff
335 #define GI2CCTL_BSYDNE_SC (1<<31)
336 #define GI2CCTL_RW (1<<30)
337 #define GI2CCTL_I2CDATSE0 (1<<28)
338 #define GI2CCTL_I2CDEVADR_SHIFT 26
339 #define GI2CCTL_I2CDEVADR_MASK 0x0c000000
340 #define GI2CCTL_I2CSUSPCTL (1<<25)
341 #define GI2CCTL_ACK (1<<24)
342 #define GI2CCTL_I2CEN (1<<23)
343 #define GI2CCTL_ADDR_SHIFT 16
344 #define GI2CCTL_ADDR_MASK 0x007f0000
345 #define GI2CCTL_REGADDR_SHIFT 8
346 #define GI2CCTL_REGADDR_MASK 0x0000ff00
347 #define GI2CCTL_RWDATA_SHIFT 0
348 #define GI2CCTL_RWDATA_MASK 0x000000ff
350 #define GPVNDCTL_DISULPIDRVR (1<<31)
351 #define GPVNDCTL_VSTSDONE (1<<27)
352 #define GPVNDCTL_VSTSBSY (1<<26)
353 #define GPVNDCTL_NEWREGREQ (1<<25)
354 #define GPVNDCTL_REGWR (1<<22)
355 #define GPVNDCTL_REGADDR_SHIFT 16
356 #define GPVNDCTL_REGADDR_MASK 0x003f0000
357 #define GPVNDCTL_VCTRL_SHIFT 8
358 #define GPVNDCTL_VCTRL_MASK 0x0000ff00
359 #define GPVNDCTL_REGDATA_SHIFT 0
360 #define GPVNDCTL_REGDATA_MASK 0x000000ff
362 #define GGPIO_GPO_SHIFT 16
363 #define GGPIO_GPO_MASK 0xffff0000
364 #define GGPIO_GPI_SHIFT 0
365 #define GGPIO_GPI_MASK 0x0000ffff
367 #define GHWCFG1_GET_DIR(x, n) (((x) >> (2 * (n))) & 3)
368 #define GHWCFG1_BIDIR 0
370 #define GHWCFG1_OUT 2
372 #define GHWCFG2_TKNQDEPTH_SHIFT 26
373 #define GHWCFG2_TKNQDEPTH_MASK 0x7c000000
374 #define GHWCFG2_PTXQDEPTH_SHIFT 24
375 #define GHWCFG2_PTXQDEPTH_MASK 0x03000000
376 #define GHWCFG2_NPTXQDEPTH_SHIFT 22
377 #define GHWCFG2_NPTXQDEPTH_MASK 0x00c00000
378 #define GHWCFG2_MPI (1<<20)
379 #define GHWCFG2_DYNFIFOSIZING (1<<19)
380 #define GHWCFG2_PERIOSUPPORT (1<<18)
381 #define GHWCFG2_NUMHSTCHNL_SHIFT 14
382 #define GHWCFG2_NUMHSTCHNL_MASK 0x0003c000
383 #define GHWCFG2_NUMHSTCHNL_GET(x) ((((x) >> 14) & 15) + 1)
384 #define GHWCFG2_NUMDEVEPS_SHIFT 10
385 #define GHWCFG2_NUMDEVEPS_MASK 0x00003c00
386 #define GHWCFG2_NUMDEVEPS_GET(x) ((((x) >> 10) & 15) + 1)
387 #define GHWCFG2_FSPHYTYPE_SHIFT 8
388 #define GHWCFG2_FSPHYTYPE_MASK 0x00000300
389 #define GHWCFG2_HSPHYTYPE_SHIFT 6
390 #define GHWCFG2_HSPHYTYPE_MASK 0x000000c0
391 #define GHWCFG2_SINGPNT (1<<5)
392 #define GHWCFG2_OTGARCH_SHIFT 3
393 #define GHWCFG2_OTGARCH_MASK 0x00000018
394 #define GHWCFG2_OTGMODE_SHIFT 0
395 #define GHWCFG2_OTGMODE_MASK 0x00000007
397 #define GHWCFG3_DFIFODEPTH_SHIFT 16
398 #define GHWCFG3_DFIFODEPTH_MASK 0xffff0000
399 #define GHWCFG3_DFIFODEPTH_GET(x) ((x) >> 16)
400 #define GHWCFG3_RSTTYPE (1<<11)
401 #define GHWCFG3_OPTFEATURE (1<<10)
402 #define GHWCFG3_VNDCTLSUPT (1<<9)
403 #define GHWCFG3_I2CINTSEL (1<<8)
404 #define GHWCFG3_OTGEN (1<<7)
405 #define GHWCFG3_PKTSIZEWIDTH_SHIFT 4
406 #define GHWCFG3_PKTSIZEWIDTH_MASK 0x00000070
407 #define GHWCFG3_PKTSIZE_GET(x) (0x10<<(((x) >> 4) & 7))
408 #define GHWCFG3_XFERSIZEWIDTH_SHIFT 0
409 #define GHWCFG3_XFERSIZEWIDTH_MASK 0x0000000f
410 #define GHWCFG3_XFRRSIZE_GET(x) (0x400<<(((x) >> 0) & 15))
412 #define GHWCFG4_NUM_IN_EP_GET(x) ((((x) >> 26) & 15) + 1)
413 #define GHWCFG4_SESSENDFLTR (1<<24)
414 #define GHWCFG4_BVALIDFLTR (1<<23)
415 #define GHWCFG4_AVALIDFLTR (1<<22)
416 #define GHWCFG4_VBUSVALIDFLTR (1<<21)
417 #define GHWCFG4_IDDGFLTR (1<<20)
418 #define GHWCFG4_NUMCTLEPS_SHIFT 16
419 #define GHWCFG4_NUMCTLEPS_MASK 0x000f0000
420 #define GHWCFG4_NUMCTLEPS_GET(x) (((x) >> 16) & 15)
421 #define GHWCFG4_PHYDATAWIDTH_SHIFT 14
422 #define GHWCFG4_PHYDATAWIDTH_MASK 0x0000c000
423 #define GHWCFG4_AHBFREQ (1<<5)
424 #define GHWCFG4_ENABLEPWROPT (1<<4)
425 #define GHWCFG4_NUMDEVPERIOEPS_SHIFT 0
426 #define GHWCFG4_NUMDEVPERIOEPS_MASK 0x0000000f
427 #define GHWCFG4_NUMDEVPERIOEPS_GET(x) (((x) >> 0) & 15)
429 #define GLPMCFG_HSIC_CONN (1<<30)
431 #define GPWRDN_BVALID (1<<22)
432 #define GPWRDN_IDDIG (1<<21)
433 #define GPWRDN_CONNDET_INT (1<<14)
434 #define GPWRDN_CONNDET (1<<13)
435 #define GPWRDN_DISCONN_INT (1<<12)
436 #define GPWRDN_DISCONN (1<<11)
437 #define GPWRDN_RESETDET_INT (1<<10)
438 #define GPWRDN_RESETDET (1<<9)
439 #define GPWRDN_LINESTATE_INT (1<<8)
440 #define GPWRDN_LINESTATE (1<<7)
441 #define GPWRDN_DISABLE_VBUS (1<<6)
442 #define GPWRDN_POWER_DOWN (1<<5)
443 #define GPWRDN_POWER_DOWN_RST (1<<4)
444 #define GPWRDN_POWER_DOWN_CLAMP (1<<3)
445 #define GPWRDN_RESTORE (1<<2)
446 #define GPWRDN_PMU_ACTIVE (1<<1)
447 #define GPWRDN_PMU_IRQ_SEL (1<<0)
449 #define HPTXFSIZ_PTXFSIZE_SHIFT 16
450 #define HPTXFSIZ_PTXFSIZE_MASK 0xffff0000
451 #define HPTXFSIZ_PTXFSTADDR_SHIFT 0
452 #define HPTXFSIZ_PTXFSTADDR_MASK 0x0000ffff
454 #define DPTXFSIZN_DPTXFSIZE_SHIFT 16
455 #define DPTXFSIZN_DPTXFSIZE_MASK 0xffff0000
456 #define DPTXFSIZN_PTXFSTADDR_SHIFT 0
457 #define DPTXFSIZN_PTXFSTADDR_MASK 0x0000ffff
459 #define DIEPTXFN_INEPNTXFDEP_SHIFT 16
460 #define DIEPTXFN_INEPNTXFDEP_MASK 0xffff0000
461 #define DIEPTXFN_INEPNTXFSTADDR_SHIFT 0
462 #define DIEPTXFN_INEPNTXFSTADDR_MASK 0x0000ffff
464 #define HCFG_MODECHANGERDY (1<<31)
465 #define HCFG_PERSCHEDENABLE (1<<26)
466 #define HCFG_FLENTRIES_SHIFT 24
467 #define HCFG_FLENTRIES_MASK 0x03000000
468 #define HCFG_FLENTRIES_8 (0)
469 #define HCFG_FLENTRIES_16 (1)
470 #define HCFG_FLENTRIES_32 (2)
471 #define HCFG_FLENTRIES_64 (3)
472 #define HCFG_MULTISEGDMA (1<<23)
473 #define HCFG_32KHZSUSPEND (1<<7)
474 #define HCFG_FSLSSUPP (1<<2)
475 #define HCFG_FSLSPCLKSEL_SHIFT 0
476 #define HCFG_FSLSPCLKSEL_MASK 0x00000003
478 #define HFIR_RELOADCTRL (1<<16)
479 #define HFIR_FRINT_SHIFT 0
480 #define HFIR_FRINT_MASK 0x0000ffff
482 #define HFNUM_FRREM_SHIFT 16
483 #define HFNUM_FRREM_MASK 0xffff0000
484 #define HFNUM_FRNUM_SHIFT 0
485 #define HFNUM_FRNUM_MASK 0x0000ffff
487 #define HPTXSTS_ODD (1<<31)
488 #define HPTXSTS_CHAN_SHIFT 27
489 #define HPTXSTS_CHAN_MASK 0x78000000
490 #define HPTXSTS_TOKEN_SHIFT 25
491 #define HPTXSTS_TOKEN_MASK 0x06000000
492 #define HPTXSTS_TOKEN_ZL 0
493 #define HPTXSTS_TOKEN_PING 1
494 #define HPTXSTS_TOKEN_DISABLE 2
495 #define HPTXSTS_TERMINATE (1<<24)
496 #define HPTXSTS_PTXQSPCAVAIL_SHIFT 16
497 #define HPTXSTS_PTXQSPCAVAIL_MASK 0x00ff0000
498 #define HPTXSTS_PTXFSPCAVAIL_SHIFT 0
499 #define HPTXSTS_PTXFSPCAVAIL_MASK 0x0000ffff
501 #define HAINT_HAINT_SHIFT 0
502 #define HAINT_HAINT_MASK 0x0000ffff
503 #define HAINTMSK_HAINTMSK_SHIFT 0
504 #define HAINTMSK_HAINTMSK_MASK 0x0000ffff
506 #define HPRT_PRTSPD_SHIFT 17
507 #define HPRT_PRTSPD_MASK 0x00060000
508 #define HPRT_PRTSPD_HIGH 0
509 #define HPRT_PRTSPD_FULL 1
510 #define HPRT_PRTSPD_LOW 2
511 #define HPRT_PRTSPD_MASK 0x00060000
512 #define HPRT_PRTTSTCTL_SHIFT 13
513 #define HPRT_PRTTSTCTL_MASK 0x0001e000
514 #define HPRT_PRTPWR (1<<12)
515 #define HPRT_PRTLNSTS_SHIFT 10
516 #define HPRT_PRTLNSTS_MASK 0x00000c00
517 #define HPRT_PRTRST (1<<8)
518 #define HPRT_PRTSUSP (1<<7)
519 #define HPRT_PRTRES (1<<6)
520 #define HPRT_PRTOVRCURRCHNG (1<<5)
521 #define HPRT_PRTOVRCURRACT (1<<4)
522 #define HPRT_PRTENCHNG (1<<3)
523 #define HPRT_PRTENA (1<<2)
524 #define HPRT_PRTCONNDET (1<<1)
525 #define HPRT_PRTCONNSTS (1<<0)
527 #define HCCHAR_CHENA (1<<31)
528 #define HCCHAR_CHDIS (1<<30)
529 #define HCCHAR_ODDFRM (1<<29)
530 #define HCCHAR_DEVADDR_SHIFT 22
531 #define HCCHAR_DEVADDR_MASK 0x1fc00000
532 #define HCCHAR_MC_SHIFT 20
533 #define HCCHAR_MC_MASK 0x00300000
534 #define HCCHAR_EPTYPE_SHIFT 18
535 #define HCCHAR_EPTYPE_MASK 0x000c0000
536 #define HCCHAR_LSPDDEV (1<<17)
537 #define HCCHAR_EPDIR (1<<15)
538 #define HCCHAR_EPDIR_IN (1<<15)
539 #define HCCHAR_EPDIR_OUT 0
540 #define HCCHAR_EPNUM_SHIFT 11
541 #define HCCHAR_EPNUM_MASK 0x00007800
542 #define HCCHAR_MPS_SHIFT 0
543 #define HCCHAR_MPS_MASK 0x000007ff
545 #define HCSPLT_SPLTENA (1<<31)
546 #define HCSPLT_COMPSPLT (1<<16)
547 #define HCSPLT_XACTPOS_SHIFT 14
548 #define HCSPLT_XACTPOS_MASK 0x0000c000
549 #define HCSPLT_XACTPOS_MIDDLE 0
550 #define HCSPLT_XACTPOS_LAST 1
551 #define HCSPLT_XACTPOS_BEGIN 2
552 #define HCSPLT_XACTPOS_ALL 3
553 #define HCSPLT_XACTLEN_BURST 1023 /* bytes */
554 #define HCSPLT_HUBADDR_SHIFT 7
555 #define HCSPLT_HUBADDR_MASK 0x00003f80
556 #define HCSPLT_PRTADDR_SHIFT 0
557 #define HCSPLT_PRTADDR_MASK 0x0000007f
559 #define HCINT_ERRORS \
560 (HCINT_BBLERR | HCINT_XACTERR)
561 #define HCINT_RETRY \
562 (HCINT_DATATGLERR | HCINT_FRMOVRUN | HCINT_NAK)
563 #define HCINT_DEFAULT_MASK \
564 (HCINT_STALL | HCINT_BBLERR | \
565 HCINT_XACTERR | HCINT_NAK | HCINT_ACK | HCINT_NYET | \
566 HCINT_CHHLTD | HCINT_FRMOVRUN | \
568 #define HCINT_HCH_DONE_MASK \
569 (HCINT_ACK | HCINT_RETRY | HCINT_NYET | \
570 HCINT_ERRORS | HCINT_STALL | HCINT_SOFTWARE_ONLY)
572 #define HCINT_SOFTWARE_ONLY (1<<20) /* BSD only */
573 #define HCINT_DATATGLERR (1<<10)
574 #define HCINT_FRMOVRUN (1<<9)
575 #define HCINT_BBLERR (1<<8)
576 #define HCINT_XACTERR (1<<7)
577 #define HCINT_NYET (1<<6)
578 #define HCINT_ACK (1<<5)
579 #define HCINT_NAK (1<<4)
580 #define HCINT_STALL (1<<3)
581 #define HCINT_AHBERR (1<<2)
582 #define HCINT_CHHLTD (1<<1)
583 #define HCINT_XFERCOMPL (1<<0)
585 #define HCINTMSK_DATATGLERRMSK (1<<10)
586 #define HCINTMSK_FRMOVRUNMSK (1<<9)
587 #define HCINTMSK_BBLERRMSK (1<<8)
588 #define HCINTMSK_XACTERRMSK (1<<7)
589 #define HCINTMSK_NYETMSK (1<<6)
590 #define HCINTMSK_ACKMSK (1<<5)
591 #define HCINTMSK_NAKMSK (1<<4)
592 #define HCINTMSK_STALLMSK (1<<3)
593 #define HCINTMSK_AHBERRMSK (1<<2)
594 #define HCINTMSK_CHHLTDMSK (1<<1)
595 #define HCINTMSK_XFERCOMPLMSK (1<<0)
597 #define HCTSIZ_DOPNG (1<<31)
598 #define HCTSIZ_PID_SHIFT 29
599 #define HCTSIZ_PID_MASK 0x60000000
600 #define HCTSIZ_PID_DATA0 0
601 #define HCTSIZ_PID_DATA2 1
602 #define HCTSIZ_PID_DATA1 2
603 #define HCTSIZ_PID_MDATA 3
604 #define HCTSIZ_PID_SETUP 3
605 #define HCTSIZ_PKTCNT_SHIFT 19
606 #define HCTSIZ_PKTCNT_MASK 0x1ff80000
607 #define HCTSIZ_XFERSIZE_SHIFT 0
608 #define HCTSIZ_XFERSIZE_MASK 0x0007ffff
610 #define DCFG_EPMISCNT_SHIFT 18
611 #define DCFG_EPMISCNT_MASK 0x007c0000
612 #define DCFG_PERFRINT_SHIFT 11
613 #define DCFG_PERFRINT_MASK 0x00001800
614 #define DCFG_DEVADDR_SHIFT 4
615 #define DCFG_DEVADDR_MASK 0x000007f0
616 #define DCFG_DEVADDR_SET(x) (((x) & 0x7F) << 4)
617 #define DCFG_NZSTSOUTHSHK (1<<2)
618 #define DCFG_DEVSPD_SHIFT 0
619 #define DCFG_DEVSPD_MASK 0x00000003
620 #define DCFG_DEVSPD_SET(x) ((x) & 0x3)
621 #define DCFG_DEVSPD_HI 0
622 #define DCFG_DEVSPD_FULL20 1
623 #define DCFG_DEVSPD_FULL10 3
625 #define DCTL_PWRONPRGDONE (1<<11)
626 #define DCTL_CGOUTNAK (1<<10)
627 #define DCTL_SGOUTNAK (1<<9)
628 #define DCTL_CGNPINNAK (1<<8)
629 #define DCTL_SGNPINNAK (1<<7)
630 #define DCTL_TSTCTL_SHIFT 4
631 #define DCTL_TSTCTL_MASK 0x00000070
632 #define DCTL_GOUTNAKSTS (1<<3)
633 #define DCTL_GNPINNAKSTS (1<<2)
634 #define DCTL_SFTDISCON (1<<1)
635 #define DCTL_RMTWKUPSIG (1<<0)
637 #define DSTS_SOFFN_SHIFT 8
638 #define DSTS_SOFFN_MASK 0x003fff00
639 #define DSTS_SOFFN_GET(x) (((x) >> 8) & 0x3FFF)
640 #define DSTS_ERRTICERR (1<<3)
641 #define DSTS_ENUMSPD_SHIFT 1
642 #define DSTS_ENUMSPD_MASK 0x00000006
643 #define DSTS_ENUMSPD_GET(x) (((x) >> 1) & 3)
644 #define DSTS_ENUMSPD_HI 0
645 #define DSTS_ENUMSPD_FULL20 1
646 #define DSTS_ENUMSPD_LOW10 2
647 #define DSTS_ENUMSPD_FULL10 3
648 #define DSTS_SUSPSTS (1<<0)
650 #define DIEPMSK_TXFIFOUNDRNMSK (1<<8)
651 #define DIEPMSK_INEPNAKEFFMSK (1<<6)
652 #define DIEPMSK_INTKNEPMISMSK (1<<5)
653 #define DIEPMSK_INTKNTXFEMPMSK (1<<4)
654 #define DIEPMSK_FIFOEMPTY (1<<4)
655 #define DIEPMSK_TIMEOUTMSK (1<<3)
656 #define DIEPMSK_AHBERRMSK (1<<2)
657 #define DIEPMSK_EPDISBLDMSK (1<<1)
658 #define DIEPMSK_XFERCOMPLMSK (1<<0)
660 #define DOEPMSK_OUTPKTERRMSK (1<<8)
661 #define DOEPMSK_BACK2BACKSETUP (1<<6)
662 #define DOEPMSK_OUTTKNEPDISMSK (1<<4)
663 #define DOEPMSK_FIFOEMPTY (1<<4)
664 #define DOEPMSK_SETUPMSK (1<<3)
665 #define DOEPMSK_AHBERRMSK (1<<2)
666 #define DOEPMSK_EPDISBLDMSK (1<<1)
667 #define DOEPMSK_XFERCOMPLMSK (1<<0)
669 #define DIEPINT_TXFIFOUNDRN (1<<8)
670 #define DIEPINT_INEPNAKEFF (1<<6)
671 #define DIEPINT_INTKNEPMIS (1<<5)
672 #define DIEPINT_INTKNTXFEMP (1<<4)
673 #define DIEPINT_TIMEOUT (1<<3)
674 #define DIEPINT_AHBERR (1<<2)
675 #define DIEPINT_EPDISBLD (1<<1)
676 #define DIEPINT_XFERCOMPL (1<<0)
678 #define DOEPINT_OUTPKTERR (1<<8)
679 #define DOEPINT_BACK2BACKSETUP (1<<6)
680 #define DOEPINT_OUTTKNEPDIS (1<<4)
681 #define DOEPINT_SETUP (1<<3)
682 #define DOEPINT_AHBERR (1<<2)
683 #define DOEPINT_EPDISBLD (1<<1)
684 #define DOEPINT_XFERCOMPL (1<<0)
686 #define DAINT_INEPINT_MASK 0xffff0000
687 #define DAINT_INEPINT_SHIFT 0
688 #define DAINT_OUTEPINT_MASK 0x0000ffff
689 #define DAINT_OUTEPINT_SHIFT 16
691 #define DAINTMSK_INEPINT_MASK 0xffff0000
692 #define DAINTMSK_INEPINT_SHIFT 0
693 #define DAINTMSK_OUTEPINT_MASK 0x0000ffff
694 #define DAINTMSK_OUTEPINT_SHIFT 16
696 #define DTKNQR1_EPTKN_SHIFT 8
697 #define DTKNQR1_EPTKN_MASK 0xffffff00
698 #define DTKNQR1_WRAPBIT (1<<7)
699 #define DTKNQR1_INTKNWPTR_SHIFT 0
700 #define DTKNQR1_INTKNWPTR_MASK 0x0000001f
702 #define DVBUSDIS_DVBUSDIS_SHIFT 0
703 #define DVBUSDIS_DVBUSDIS_MASK 0x0000ffff
705 #define DVBUSPULSE_DVBUSPULSE_SHIFT 0
706 #define DVBUSPULSE_DVBUSPULSE_MASK 0x00000fff
708 #define DTHRCTL_ARBPRKEN (1<<27)
709 #define DTHRCTL_RXTHRLEN_SHIFT 17
710 #define DTHRCTL_RXTHRLEN_MASK 0x03fe0000
711 #define DTHRCTL_RXTHREN (1<<16)
712 #define DTHRCTL_TXTHRLEN_SHIFT 2
713 #define DTHRCTL_TXTHRLEN_MASK 0x000007fc
714 #define DTHRCTL_ISOTHREN (1<<1)
715 #define DTHRCTL_NONISOTHREN (1<<0)
717 #define DIEPEMPMSK_INEPTXFEMPMSK_SHIFT 0
718 #define DIEPEMPMSK_INEPTXFEMPMSK_MASK 0x0000ffff
720 #define DIEPCTL_EPENA (1<<31)
721 #define DIEPCTL_EPDIS (1<<30)
722 #define DIEPCTL_SETD1PID (1<<29)
723 #define DIEPCTL_SETD0PID (1<<28)
724 #define DIEPCTL_SNAK (1<<27)
725 #define DIEPCTL_CNAK (1<<26)
726 #define DIEPCTL_TXFNUM_SHIFT 22
727 #define DIEPCTL_TXFNUM_MASK 0x03c00000
728 #define DIEPCTL_TXFNUM_SET(n) (((n) & 15) << 22)
729 #define DIEPCTL_STALL (1<<21)
730 #define DIEPCTL_EPTYPE_SHIFT 18
731 #define DIEPCTL_EPTYPE_MASK 0x000c0000
732 #define DIEPCTL_EPTYPE_SET(n) (((n) & 3) << 18)
733 #define DIEPCTL_EPTYPE_CONTROL 0
734 #define DIEPCTL_EPTYPE_ISOC 1
735 #define DIEPCTL_EPTYPE_BULK 2
736 #define DIEPCTL_EPTYPE_INTERRUPT 3
737 #define DIEPCTL_NAKSTS (1<<17)
738 #define DIEPCTL_USBACTEP (1<<15)
739 #define DIEPCTL_NEXTEP_SHIFT 11
740 #define DIEPCTL_NEXTEP_MASK 0x00007800
741 #define DIEPCTL_MPS_SHIFT 0
742 #define DIEPCTL_MPS_MASK 0x000007ff
743 #define DIEPCTL_MPS_SET(n) ((n) & 0x7FF)
744 #define DIEPCTL_MPS_64 (0<<0)
745 #define DIEPCTL_MPS_32 (1<<0)
746 #define DIEPCTL_MPS_16 (2<<0)
747 #define DIEPCTL_MPS_8 (3<<0)
749 #define DOEPCTL_EPENA (1<<31)
750 #define DOEPCTL_EPDIS (1<<30)
751 #define DOEPCTL_SETD1PID (1<<29)
752 #define DOEPCTL_SETD0PID (1<<28)
753 #define DOEPCTL_SNAK (1<<27)
754 #define DOEPCTL_CNAK (1<<26)
755 #define DOEPCTL_FNUM_SET(n) (((n) & 15) << 22)
756 #define DOEPCTL_STALL (1<<21)
757 #define DOEPCTL_EPTYPE_SHIFT 18
758 #define DOEPCTL_EPTYPE_MASK 0x000c0000
759 #define DOEPCTL_EPTYPE_SET(n) (((n) & 3) << 18)
760 #define DOEPCTL_NAKSTS (1<<17)
761 #define DOEPCTL_USBACTEP (1<<15)
762 #define DOEPCTL_MPS_SHIFT 0
763 #define DOEPCTL_MPS_MASK 0x000007ff
764 #define DOEPCTL_MPS_SET(n) ((n) & 0x7FF)
765 #define DOEPCTL_MPS_64 (0<<0)
766 #define DOEPCTL_MPS_32 (1<<0)
767 #define DOEPCTL_MPS_16 (2<<0)
768 #define DOEPCTL_MPS_8 (3<<0)
771 #define DXEPINT_TXFEMP (1<<7)
772 #define DXEPINT_SETUP (1<<3)
773 #define DXEPINT_XFER_COMPL (1<<0)
775 #define DIEPTSIZ_XFERSIZE_MASK 0x0007ffff
776 #define DIEPTSIZ_XFERSIZE_SHIFT 0
777 #define DIEPTSIZ_PKTCNT_MASK 0x1ff80000
778 #define DIEPTSIZ_PKTCNT_SHIFT 19
779 #define DIEPTSIZ_MC_MASK 0x60000000
780 #define DIEPTSIZ_MC_SHIFT 29
782 #define DOEPTSIZ_XFERSIZE_MASK 0x0007ffff
783 #define DOEPTSIZ_XFERSIZE_SHIFT 0
784 #define DOEPTSIZ_PKTCNT_MASK 0x1ff80000
785 #define DOEPTSIZ_PKTCNT_SHIFT 19
786 #define DOEPTSIZ_MC_MASK 0x60000000
787 #define DOEPTSIZ_MC_SHIFT 29
790 #define DXEPTSIZ_SET_MULTI(n) (((n) & 3) << 29)
791 #define DXEPTSIZ_SET_NPKT(n) (((n) & 0x3FF) << 19)
792 #define DXEPTSIZ_GET_NPKT(n) (((n) >> 19) & 0x3FF)
793 #define DXEPTSIZ_SET_NBYTES(n) (((n) & 0x7FFFFF) << 0)
794 #define DXEPTSIZ_GET_NBYTES(n) (((n) >> 0) & 0x7FFFFF)
796 /* generic endpoint mask */
798 #define ENDPOINT_MASK(x,in) \
799 ((in) ? (1U << ((x) & 15U)) : \
800 (0x10000U << ((x) & 15U)))
802 #endif /* _DWC_OTGREG_H_ */